/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2020 MediaTek Inc.
 *
 */



#ifndef __hdmirx_dolby_meta_h__
#define __hdmirx_dolby_meta_h__

struct hdmirx_dolby_md {
	struct platform_device *pdev;
	void __iomem *dobly_md_base;
	struct clk *clock;
	int irq;

	struct MTK_HDMI *hdmirx;

	bool (*dolby_md_readbit)(struct hdmirx_dolby_md *dolby_md,
		unsigned short reg, unsigned int offset);
	unsigned int (*dolby_md_read)(struct hdmirx_dolby_md *dolby_md,
		unsigned short reg);
	void (*dolby_md_write)(struct hdmirx_dolby_md *dolby_md,
		unsigned short reg, unsigned int val);
	void (*dolby_md_mask)(struct hdmirx_dolby_md *dolby_md,
		unsigned int reg, unsigned int val, unsigned int mask);
};

#define DOLBY_TOP_CTRL        0x000
#define REG_PHILIPS_MD_MON_SEL BIT(8)
#define PCLK_RST BIT(5)
#define PCLK_EN  BIT(4)
#define RESET_MD_DATA BIT(1)
#define MD_WR_EN BIT(0)

#define DOLBY_VID_CTRL        0x004
#define HSYNC_POL BIT(3)
#define VSYNC_POL BIT(2)
#define RGB_INV BIT(1)
#define YUV_422_IN BIT(0)

#define DOLBY_DES_CTRL        0x008
#define DATA_BIT_INV BIT(2)
#define CRC_FORCE_OK BIT(1)
#define SDR_FORCE BIT(0)

#define DOLBY_INT_CTRL        0x00C
#define MD_INT_ALL_CLR GENMASK(22, 16)
#define MD_RCVD_INT_CLR  BIT(22)
#define FIRST_PKT_RCEV_INT_CLR BIT(21)
#define FIRST_BLOCK_CORRECT_CLR BIT(20)
#define SECOND_BLOCK_CORRECT_CLR BIT(19)
#define CRC_ERROR_INT_CLR BIT(18)
#define MD_OK_INT_CLR BIT(17)
#define VSYNC_INT_CLR BIT(16)

#define MD_INT_ALL_MASK GENMASK(6, 0)
#define MD_RCVD_INT_MASK BIT(6)
#define FIRST_PKT_RCEV_INT_MASK BIT(5)
#define FIRST_BLOCK_CORRECT_MASK BIT(4)
#define SECOND_BLOCK_CORRECT_MASK BIT(3)
#define CRC_ERROR_INT_MASK BIT(2)
#define MD_OK_INT_MASK BIT(1)
#define VSYNC_INT_MASK BIT(0)

#define DOLBY_INT_STA         0x010
#define MD_RCVD_INT_STA BIT(6)
#define FIRST_PKT_RCEV_INT_STA BIT(5)
#define FIRST_BLOCK_CORRECT_STA BIT(4)
#define SECOND_BLOCK_CORRECT_STA BIT(3)
#define CRC_ERROR_INT_STA BIT(2)
#define MD_OK_INT_STA BIT(1)
#define VSYNC_INT_STA BIT(0)

#define DOLBY_PKT00_HEADER    0x020
#define DOLBY_PKT00_LENGTH    0x024
#define DOLBY_PKT_LENGTH GENMASK(15, 0)
#define DOLBY_PKT00_BODY00    0x030
#define DOLBY_PKT00_BODY01    0x034
#define DOLBY_PKT00_BODY02    0x038
#define DOLBY_PKT00_BODY03    0x03C
#define DOLBY_PKT00_BODY04    0x040
#define DOLBY_PKT00_BODY05    0x044
#define DOLBY_PKT00_BODY06    0x048
#define DOLBY_PKT00_BODY07    0x04C
#define DOLBY_PKT00_BODY08    0x050
#define DOLBY_PKT00_BODY09    0x054
#define DOLBY_PKT00_BODY10    0x058
#define DOLBY_PKT00_BODY11    0x05C
#define DOLBY_PKT00_BODY12    0x060
#define DOLBY_PKT00_BODY13    0x064
#define DOLBY_PKT00_BODY14    0x068
#define DOLBY_PKT00_BODY15    0x06C
#define DOLBY_PKT00_BODY16    0x070
#define DOLBY_PKT00_BODY17    0x074
#define DOLBY_PKT00_BODY18    0x078
#define DOLBY_PKT00_BODY19    0x07C
#define DOLBY_PKT00_BODY20    0x080
#define DOLBY_PKT00_BODY21    0x084
#define DOLBY_PKT00_BODY22    0x088
#define DOLBY_PKT00_BODY23    0x08C
#define DOLBY_PKT00_BODY24    0x090
#define DOLBY_PKT00_BODY25    0x094
#define DOLBY_PKT00_BODY26    0x098
#define DOLBY_PKT00_BODY27    0x09C
#define DOLBY_PKT00_BODY28    0x0A0
#define DOLBY_PKT00_BODY29    0x0A4

#define DOLBY_PKT01_HEADER    0x120
#define DOLBY_PKT01_BODY00    0x130
#define DOLBY_PKT01_BODY01    0x134
#define DOLBY_PKT01_BODY02    0x138
#define DOLBY_PKT01_BODY03    0x13C
#define DOLBY_PKT01_BODY04    0x140
#define DOLBY_PKT01_BODY05    0x144
#define DOLBY_PKT01_BODY06    0x148
#define DOLBY_PKT01_BODY07    0x14C
#define DOLBY_PKT01_BODY08    0x150
#define DOLBY_PKT01_BODY09    0x154
#define DOLBY_PKT01_BODY10    0x158
#define DOLBY_PKT01_BODY11    0x15C
#define DOLBY_PKT01_BODY12    0x160
#define DOLBY_PKT01_BODY13    0x164
#define DOLBY_PKT01_BODY14    0x168
#define DOLBY_PKT01_BODY15    0x16C
#define DOLBY_PKT01_BODY16    0x170
#define DOLBY_PKT01_BODY17    0x174
#define DOLBY_PKT01_BODY18    0x178
#define DOLBY_PKT01_BODY19    0x17C
#define DOLBY_PKT01_BODY20    0x180
#define DOLBY_PKT01_BODY21    0x184
#define DOLBY_PKT01_BODY22    0x188
#define DOLBY_PKT01_BODY23    0x18C
#define DOLBY_PKT01_BODY24    0x190
#define DOLBY_PKT01_BODY25    0x194
#define DOLBY_PKT01_BODY26    0x198
#define DOLBY_PKT01_BODY27    0x19C
#define DOLBY_PKT01_BODY28    0x1A0
#define DOLBY_PKT01_BODY29    0x1A4
#define DOLBY_PKT01_BODY30    0x1A8

#define DOLBY_PKT10_HEADER    0x220
#define DOLBY_PKT10_BODY00    0x230
#define DOLBY_PKT10_BODY01    0x234
#define DOLBY_PKT10_BODY02    0x238
#define DOLBY_PKT10_BODY03    0x23C
#define DOLBY_PKT10_BODY04    0x240
#define DOLBY_PKT10_BODY05    0x244
#define DOLBY_PKT10_BODY06    0x248
#define DOLBY_PKT10_BODY07    0x24C
#define DOLBY_PKT10_BODY08    0x250
#define DOLBY_PKT10_BODY09    0x254
#define DOLBY_PKT10_BODY10    0x258
#define DOLBY_PKT10_BODY11    0x25C
#define DOLBY_PKT10_BODY12    0x260
#define DOLBY_PKT10_BODY13    0x264
#define DOLBY_PKT10_BODY14    0x268
#define DOLBY_PKT10_BODY15    0x26C
#define DOLBY_PKT10_BODY16    0x270
#define DOLBY_PKT10_BODY17    0x274
#define DOLBY_PKT10_BODY18    0x278
#define DOLBY_PKT10_BODY19    0x27C
#define DOLBY_PKT10_BODY20    0x280
#define DOLBY_PKT10_BODY21    0x284
#define DOLBY_PKT10_BODY22    0x288
#define DOLBY_PKT10_BODY23    0x28C
#define DOLBY_PKT10_BODY24    0x290
#define DOLBY_PKT10_BODY25    0x294
#define DOLBY_PKT10_BODY26    0x298
#define DOLBY_PKT10_BODY27    0x29C
#define DOLBY_PKT10_BODY28    0x2A0
#define DOLBY_PKT10_BODY29    0x2A4
#define DOLBY_PKT10_BODY30    0x2A8

#define DOLBY_PKT11_HEADER    0x320
#define DOLBY_PKT11_BODY00    0x330
#define DOLBY_PKT11_BODY01    0x334
#define DOLBY_PKT11_BODY02    0x338
#define DOLBY_PKT11_BODY03    0x33C
#define DOLBY_PKT11_BODY04    0x340
#define DOLBY_PKT11_BODY05    0x344
#define DOLBY_PKT11_BODY06    0x348
#define DOLBY_PKT11_BODY07    0x34C
#define DOLBY_PKT11_BODY08    0x350
#define DOLBY_PKT11_BODY09    0x354
#define DOLBY_PKT11_BODY10    0x358
#define DOLBY_PKT11_BODY11    0x35C
#define DOLBY_PKT11_BODY12    0x360
#define DOLBY_PKT11_BODY13    0x364
#define DOLBY_PKT11_BODY14    0x368
#define DOLBY_PKT11_BODY15    0x36C
#define DOLBY_PKT11_BODY16    0x370
#define DOLBY_PKT11_BODY17    0x374
#define DOLBY_PKT11_BODY18    0x378
#define DOLBY_PKT11_BODY19    0x37C
#define DOLBY_PKT11_BODY20    0x380
#define DOLBY_PKT11_BODY21    0x384
#define DOLBY_PKT11_BODY22    0x388
#define DOLBY_PKT11_BODY23    0x38C
#define DOLBY_PKT11_BODY24    0x390
#define DOLBY_PKT11_BODY25    0x394
#define DOLBY_PKT11_BODY26    0x398
#define DOLBY_PKT11_BODY27    0x39C
#define DOLBY_PKT11_BODY28    0x3A0
#define DOLBY_PKT11_BODY29    0x3A4
#define DOLBY_PKT11_BODY30    0x3A8

#define DOLYB_MD_DEF_LOG(fmt, arg...) pr_info("[HDMI_Dolby_MD]"fmt, ##arg)

int mtk_hdmirx_dolby_meta_probe(struct platform_device *pdev);

#endif

