/*
 *  File Name	    : linux/arch/arm/mach-mp200/irq.c
 *  Function	    : irq
 *  Release Version : Ver 1.00
 *  Release Date    : 2006/04/28
 *
 *  Copyright (C) NEC Electronics Corporation 2006
 *
 *
 *  This program is free software;you can redistribute it and/or modify it under the terms of
 *  the GNU General Public License as published by Free Softwere Foundation; either version 2
 *  of License, or (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
 *  without even the implied warrnty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 *  See the GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License along with this program;
 *  If not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
 *  MA 02111-1307, USA.
 *
 */

#include <linux/interrupt.h>

#include <asm/io.h>
#include <asm/mach/irq.h>

static void mp200_mask_irq(unsigned int irq)
{
	unsigned long ids;
	unsigned long mask = 0;

	if (irq <= INT_LAST) {
		ids = VA_INTC + MP200_INTC_IT0_IDS0;

		if (irq < 32) {
			mask = 1 << irq;
		} else {
			ids += 4;
			mask = 1 << (irq - 32);
		}

		__raw_writel(mask, ids);	/* disable */
	}
}

static void mp200_unmask_irq(unsigned int irq)
{
	unsigned long ien;
	unsigned long mask = 0;

	if (irq <= INT_LAST) {
		ien = VA_INTC + MP200_INTC_IT0_IEN0;

		if (irq < 32) {
			mask = 1 << irq;
		} else {
			ien += 4;
			mask = 1 << (irq - 32);
		}

		__raw_writel(mask, ien);	/* enable */
	}
}

static void mp200_ack_irq(unsigned int irq)
{
#ifdef CONFIG_MP201
	unsigned long iir;
	unsigned long mask = 0;

	if (irq <= INT_LAST) {
		iir = VA_INTC + MP200_INTC_IT0_IIR0;

		if (irq < 32) {
			mask = 1 << irq;
		} else {
			iir += 4;
			mask = 1 << (irq - 32);
		}

		__raw_writel(mask, iir);	/* clear */
	}
#else
	if ((32 <= irq) && (irq <= INT_LAST)) {
		__raw_writel((1 << (irq - 32)), (VA_INTC + MP200_INTC_IT0_IIR));
	}
#endif				/* CONFIG_MP201 */
}

static struct irqchip mp200_irq_chip_ack = {
	.ack = mp200_ack_irq,
	.mask = mp200_mask_irq,
	.unmask = mp200_unmask_irq,
};

static struct irqchip mp200_irq_chip = {
	.ack = mp200_mask_irq,
	.mask = mp200_mask_irq,
	.unmask = mp200_unmask_irq,
};

void __init mp200_init_irq(void)
{
	unsigned int i;

	/* Disable all interrupts */
	__raw_writel(~0U, VA_INTC + MP200_INTC_IT0_IDS0);
	__raw_writel(~0U, VA_INTC + MP200_INTC_IT0_IDS1);
	__raw_writel(1, VA_INTC + MP200_INTC_IT0_FID);

	for (i = 0; i <= INT_LAST; i++) {
#ifdef CONFIG_MP201
		if ((INT_TI0 <= i && i <= INT_TI5) || (i == INT_IIC)
		    || ((INT_IIS0 <= i) && (i <= INT_IIS7))
		    || ((INT_TW0 <= i) && (i <= INT_TW1))) {
#else
		if ((i == INT_IIC) || (INT_TIMER0 <= i && i <= INT_WDT3)
		    || (INT_TG0 <= i && i <= INT_TG2)
		    || (INT_TG3 <= i && i <= INT_TG5)) {
#endif				/* CONFIG_MP201 */
			set_irq_chip(i, &mp200_irq_chip_ack);
			set_irq_handler(i, do_edge_IRQ);
		} else {
			set_irq_chip(i, &mp200_irq_chip);
			set_irq_handler(i, do_level_IRQ);
		}
		set_irq_flags(i, IRQF_VALID);
	}
}
