/* 2012-09-16: File added by Sony Corporation */
/*
 * icx_pwc.h
 *
 * Copyright 2011 Sony Corporation.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 *
 */

#ifndef __ICX_PWC_H__
#define __ICX_PWC_H__

/*********************/
/*@ register address */
/*********************/

/* register                     address        R/W      reset value     P */
#define PWC_PWR_REGA            0x02        /* (R)/W    0x03            - */
#define PWC_PWR_PSCNT1          0x04        /* (R)/W                    - */
#define PWC_PWR_PSCNT2          0x06        /* (R)/W    0x02(ROM)       - */
#define PWC_PWR_MODESET1        0x08        /* (R)/W                    - */
#define PWC_PWR_VOUTSET1        0x0A        /* (R)/W    0x48            - */
#define PWC_PWR_VOUTSET2        0x0C        /* (R)/W    0x0D            - */
#define PWC_PWR_VOUTSET3        0x0E        /* (R)/W                    - */
#define PWC_GPIO_IOSEL1         0x10        /* (R)/W                    - */
#define PWC_GPIO_IOSEL2         0x12        /* (R)/W                    - */
#define PWC_GPIO_IOOUT1         0x14        /* (R)/W                    - */
#define PWC_GPIO_IOIN1          0x15        /*  R                       - */
#define PWC_GPIO_IOOUT2         0x16        /* (R)/W                    - */
#define PWC_GPIO_IOIN2          0x17        /*  R                       - */
#define PWC_GPIO_GPPUPD1        0x18        /* (R)/W    0x00            - */
#define PWC_GPIO_GPPUPD2        0x1A        /* (R)/W    0x00            - */
#define PWC_GPIO_GPPUPD3        0x1C        /* (R)/W    0x55            - */
#define PWC_GPIO_GPPUPD4        0x1E        /* (R)/W    0x05            - */
#define PWC_INTC_FMASK1         0x20        /* (R)/W                    - */
#define PWC_INTC_FACTOR1        0x21        /*  R                       - */
#define PWC_INTC_FMASK2         0x22        /* (R)/W                    - */
#define PWC_INTC_FACTOR2        0x23        /*  R                       - */
#define PWC_INTC_FMASK3         0x24        /* (R)/W                    - */
#define PWC_INTC_FACTOR3        0x25        /*  R                       - */
#define PWC_INTC_STATE1         0x26        /* (R)/W                    - */
#define PWC_INTC_STATE2         0x28        /* (R)/W                    - */
#define PWC_INTC_STATE3         0x2A        /* (R)/W                    - */
#define PWC_INTC_CLRFACT1       0x2C        /*  W                       - */
#define PWC_INTC_CLRFACT2       0x2E        /*  W                       - */
#define PWC_INTC_CLRFACT3       0x30        /*  W                       - */
#define PWC_INTC_DETMOD1L       0x32        /* (R)/W                    - */
#define PWC_INTC_DETMOD1H       0x34        /* (R)/W                    - */
#define PWC_INTC_DETMOD2L       0x36        /* (R)/W                    - */
#define PWC_INTC_DETMOD2H       0x38        /* (R)/W                    - */
#define PWC_INTC_DETMOD3L       0x3A        /* (R)/W                    - */
#define PWC_INTC_DETMOD3H       0x3C        /* (R)/W                    - */
#define PWC_INTC_BMASK1         0x3E        /* (R)/W                    - */
#define PWC_INTC_BMASK2         0x40        /* (R)/W                    - */
#define PWC_INTC_BMASK3         0x42        /* (R)/W                    - */
#define PWC_INTC_REGPWONMSK     0x4C        /* (R)/W                    - */
#define PWC_ADC_ADDATA1         0x4D        /*  R                       - */
#define PWC_ADC_ADMODE          0x4E        /* (R)/W                    - */
#define PWC_ADC_ADDATA2         0x4F        /*  R                       - */
#define PWC_ADC_VCCVBATSW       0x50        /* (R)/W                    - */
#define PWC_ADC_ADDATA3         0x51        /*  R                       - */
#define PWC_ADC_VCCVBUSSW       0x52        /* (R)/W                    - */
#define PWC_ADC_ADDATA4         0x53        /*  R                       - */
#define PWC_ADC_TIMSET1         0x54        /* (R)/W                    2 */
#define PWC_ADC_ADDATA5         0x55        /*  R                       - */
#define PWC_ADC_ADSET1L         0x56        /* (R)/W                    2 */
#define PWC_ADC_ADDATA6         0x57        /*  R                       - */
#define PWC_ADC_ADSET1H         0x58        /* (R)/W    0xFF            2 */
#define PWC_ADC_ADDATA7         0x59        /*  R                       - */
#define PWC_ADC_ADSET2L         0x5A        /* (R)/W                    2 */
#define PWC_ADC_ADDATA8         0x5B        /*  R                       - */
#define PWC_ADC_ADSET2H         0x5C        /* (R)/W    0xFF            2 */
#define PWC_ADC_ADSET3L         0x5E        /* (R)/W                    2 */
#define PWC_ADC_ADSET3H         0x60        /* (R)/W    0xFF            2 */
#define PWC_ADC_ADSET4L         0x62        /* (R)/W                    2 */
#define PWC_ADC_ADSET4H         0x64        /* (R)/W    0xFF            2 */
#define PWC_CHG_PSW_STATE       0x65        /*  R                       - */
#define PWC_RST_SFTRST          0x66        /*  W                       - */
#define PWC_RST_RDET_CNT        0x68        /* (R)/W                    - */
#define PWC_RST_DETIOCONT       0x6C        /* (R)/W                    - */
#define PWC_INTC_WRSTFCT        0x6D        /*  R                       - */
#define PWC_INTC_WRSTCL         0x6E        /*  W                       - */
#define PWC_LSIVER              0x6F        /*  R                       - */
#define PWC_RTC_SEC             0x70        /*  W                       - */
#define PWC_RTC_SEC_RD          0x71        /*  R                       - */
#define PWC_RTC_MIN             0x72        /*  W                       - */
#define PWC_RTC_MIN_RD          0x73        /*  R                       - */
#define PWC_RTC_HOUR            0x74        /*  W                       - */
#define PWC_RTC_HOUR_RD         0x75        /*  R                       - */
#define PWC_RTC_WEEK            0x76        /*  W                       - */
#define PWC_RTC_WEEK_RD         0x77        /*  R                       - */
#define PWC_RTC_DAY             0x78        /*  W                       - */
#define PWC_RTC_DAY_RD          0x79        /*  R                       - */
#define PWC_RTC_MONTH           0x7A        /*  W                       - */
#define PWC_RTC_MONTH_RD        0x7B        /*  R                       - */
#define PWC_RTC_YEAR            0x7C        /*  W                       - */
#define PWC_RTC_YEAR_RD         0x7D        /*  R                       - */
#define PWC_RTC_TRIM            0x7E        /*  W                       - */
#define PWC_RTC_TRIM_RD         0x7F        /*  R                       - */
#define PWC_RTC_ALM_WM          0x80        /*  W                       - */
#define PWC_RTC_ALM_WM_RD       0x81        /*  R                       - */
#define PWC_RTC_ALM_WH          0x82        /*  W                       - */
#define PWC_RTC_ALM_WH_RD       0x83        /*  R                       - */
#define PWC_RTC_ALM_WW          0x84        /*  W                       - */
#define PWC_RTC_ALM_WW_RD       0x85        /*  R                       - */
#define PWC_RTC_ALM_DM          0x86        /*  W                       - */
#define PWC_RTC_ALM_DM_RD       0x87        /*  R                       - */
#define PWC_RTC_ALM_DH          0x88        /*  W                       - */
#define PWC_RTC_ALM_DH_RD       0x89        /*  R                       - */
#define PWC_RTC_RTC1            0x8A        /*  W                       - */
#define PWC_RTC_RTC1_RD         0x8B        /*  R                       - */
#define PWC_RTC_RTC2            0x8C        /*  W                       - */
#define PWC_RTC_RTC2_RD         0x8D        /*  R                       - */
#define PWC_USB_USBCONT         0x90        /* (R)/W    0x00            - */
#define PWC_INTC_WRSTMSK        0x92        /* (R)/W                    - */
#define PWC_RST_WAKECONT        0x94        /* (R)/W                    - */
#define PWC_ADC_ADINT           0x96        /* (R)/W                    2 */
#define PWC_ADC_ADFACT          0x97        /*  R                       2 */
#define PWC_ADC_CLRADFACT       0x98        /*  W                       2 */
#define PWC_ADC_MASKAD          0x9A        /* (R)/W                    2 */
#define PWC_CHG_VCHG1CNT        0xA2        /* (R)/W                    2 */
#define PWC_CHG_VCHG2CNT        0xA4        /* (R)/W                    2 */
#define PWC_CHG_FET2CNT         0xA6        /* (R)/W                    2 */
#define PWC_CHG_TSET            0xA8        /* (R)/W    0x2F            2 */
#define PWC_CHG_BTMPSET         0xAA        /* (R)/W    0x03            2 */
#define PWC_CHG_CMPSET          0xAC        /* (R)/W                    2 */
#define PWC_CHG_LEDEN           0xAE        /* (R)/W    0x01            2 */
#define PWC_CHG_RDSTATE         0xAF        /*  R                       2 */
#define PWC_CHG_CHGIRMASK       0xB0        /* (R)/W                    2 */
#define PWC_CHG_CHGIRR		    0xB1        /*  R                       2 */
#define PWC_CHG_CHGIRCL         0xB2        /*  W                       2 */
#define PWC_CHG_CHGMONI         0xB3        /*  R                       2 */
#define PWC_CHG_DETMOD4L        0xB4        /* (R)/W                    2 */
#define PWC_CHG_DETMOD4H        0xB6        /* (R)/W                    2 */
#define PWC_IF_RDBAK_ADR        0xBE        /*  W                       2 */
#define PWC_IF_RDBAK_DATA1      0xBF        /*  R                       2 */

/***************/
/*@ bit assign */
/***************/

/* port mask */
#define PWC_GPIO_IO00               0x01
#define PWC_GPIO_IO01               0x02
#define PWC_GPIO_IO02               0x04
#define PWC_GPIO_IO03               0x08
#define PWC_GPIO_IO04               0x10
#define PWC_GPIO_IO05               0x20
#define PWC_GPIO_IO06               0x40
#define PWC_GPIO_IO07               0x80
#define PWC_GPIO_IO08               0x01
#define PWC_GPIO_IO09               0x02
#define PWC_GPIO_IO10               0x04
#define PWC_GPIO_IO11               0x08
#define PWC_GPIO_IO12               0x10
#define PWC_GPIO_IO13               0x20
#define PWC_GPIO_IO14               0x40
#define PWC_GPIO_IO15               0x80

/* in/out value */
#define PWC_GPIO_IOSEL_IN           0x00
#define PWC_GPIO_IOSEL_OUT          0xFF

/* pull value */
#define PWC_GPIO_GPPUPD_OPEN        0x00
#define PWC_GPIO_GPPUPD_DOWN        0x01
#define PWC_GPIO_GPPUPD_UP          0x02
#define PWC_GPIO_GPPUPD_MSK         0x03

/* pull shift */
#define PWC_GPIO_GPPUPD_SFT_IO00    0x00
#define PWC_GPIO_GPPUPD_SFT_IO01    0x02
#define PWC_GPIO_GPPUPD_SFT_IO02    0x04
#define PWC_GPIO_GPPUPD_SFT_IO03    0x06
#define PWC_GPIO_GPPUPD_SFT_IO04    0x00
#define PWC_GPIO_GPPUPD_SFT_IO05    0x02
#define PWC_GPIO_GPPUPD_SFT_IO06    0x04
#define PWC_GPIO_GPPUPD_SFT_IO07    0x06
#define PWC_GPIO_GPPUPD_SFT_IO08    0x00
#define PWC_GPIO_GPPUPD_SFT_IO09    0x02
#define PWC_GPIO_GPPUPD_SFT_IO10    0x04
#define PWC_GPIO_GPPUPD_SFT_IO11    0x06
#define PWC_GPIO_GPPUPD_SFT_IO12    0x00
#define PWC_GPIO_GPPUPD_SFT_IO13    0x02
#define PWC_GPIO_GPPUPD_SFT_IO14    0x04
#define PWC_GPIO_GPPUPD_SFT_IO15    0x06

/* det mode */
#define PWC_DETMOD_LEVEL            0x00
#define PWC_DETMOD_RISE             0x01
#define PWC_DETMOD_FALL             0x02
#define PWC_DETMOD_MASK             0x03

/* factor */
#define PWC_INTC_FACTOR_ALL         0xFF
#define PWC_INTC_FACTOR1_GPIO0      (PWC_GPIO_IO00)
#define PWC_INTC_FACTOR1_GPIO1      (PWC_GPIO_IO01)
#define PWC_INTC_FACTOR1_GPIO2      (PWC_GPIO_IO02)
#define PWC_INTC_FACTOR1_GPIO3      (PWC_GPIO_IO03)
#define PWC_INTC_FACTOR1_GPIO4      (PWC_GPIO_IO04)
#define PWC_INTC_FACTOR1_GPIO5      (PWC_GPIO_IO05)
#define PWC_INTC_FACTOR1_GPIO6      (PWC_GPIO_IO06)
#define PWC_INTC_FACTOR1_GPIO7      (PWC_GPIO_IO07)
#define PWC_INTC_FACTOR3_FRTCINT    0x02
#define PWC_INTC_WRSTFCT_ALL        0x03

/* others */
#define PWC_INTC_WRSTMSK_RTCAL      0x01
#define PWC_PSW_STATE_SDETADP       0x10
#define PWC_PSW_STATE_SDETUSB       0x20

/* rtc */
#define PWC_RTC_RTC1_WALE        0x80
#define PWC_RTC_RTC1_ALE         0xC0
#define PWC_RTC_RTC2_AFG         0x03
#define PWC_RTC_RTC2_ADJ         0x10

/* VOUTSET1 */
#define VOUTSET1_VL0SET2_MASK	0xF0
#define VOUTSET1_VL0SET2_11		0x40
#define VOUTSET1_VL0SET2_1125	0x50

/* VOUTSET2 */
#define VOUTSET2_VPLLSET_MASK	0x1C
#define VOUTSET2_VPLLSET_11		0x0C
#define VOUTSET2_VPLLSET_1125	0x10

/* VOUTSET3 */
#define VOUTSET3_VGP4SET_MASK	0x1C
#define VOUTSET3_VGP4SET_310	0x08
#define VOUTSET3_VGP4SET_285	0x00

/* FET2CNT */
#define CVSET_MASK              0x30
#define CVSET_36                0x30
#define CVSET_40                0x20
#define CVSET_41                0x10
#define CVSET_42                0x00
#define ICHGSET_MASK            0x0F
#define ICHGSET_100             0x00
#define ICHGSET_500             0x04

/* BTMPSET */
#define BTEMPHSET_45            0x0A
#define BTEMPHSET_55            0x05
#define BTEMPHSET_65            0x00
#define BTEMPHSET_MASK          0x0F

/* VCHG1CNT */
#define VCHG1CNT_RVCHG1ENB		0x10

/* VCHG2CNT */
#define VCHG2CNT_EN_REG			0x70
#define VCHG2CNT_EN_REG_MASK	0x70
#define VCHG2CNT_UNRSUSPEND		0x00
#define VCHG2CNT_RSUSPEND		0x04
#define VCHG2CNT_RSUSPEND_MASK	0x04
#define VCHG2CNT_RCHG2ENB		0x00
#define VCHG2CNT_RCHG2DIS		0x02
#define VCHG2CNT_RCHG2ENB_MASK	0x02
#define VCHG2CNT_RCHG2LIM_100	0x00
#define VCHG2CNT_RCHG2LIM_500	0x01
#define VCHG2CNT_RCHG2LIM_MASK	0x01

/***************/
/*@ prototypes */
/***************/

void pwc_init(void);
int  pwc_read(u_int addr, u_char *data);
int  pwc_write(u_int addr, u_char data, u_char mask);

#endif /* __ICX_PWC_H__ */
