/* 2009-08-20: File added and changed by Sony Corporation */
/*
 *  File Name	    : linux/include/asm-arm/arch-mp200/em1_mem_wqvga.h
 *  Function	    : memory map difinition
 *  Release Version : Ver 1.06
 *  Release Date    : 2009/05/21
 *
 *  Copyright (C) NEC Electronics Corporation 2005-2009
 *
 *
 *  This program is free software;you can redistribute it and/or modify it under the terms of
 *  the GNU General Public License as published by Free Softwere Foundation; either version 2
 *  of License, or (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
 *  without even the implied warrnty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 *  See the GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License along with this program;
 *  If not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
 *  MA 02111-1307, USA.
 *
 */

#ifndef __EM1_MEM_H
#define __EM1_MEM_H

#define NUM_BUF_V4L2 			3 /* set 2 or 3 */

/******* SDRAM ********/
#define INTERDSP_SHARED_ADDR		0x33FE0000 /* CPU<->DSP command buffer */
#define INTERDSP_SHARED_SIZE		0x00020000 /*   128KB */

#define INTERDSP_DL_TOP_ADDR		0x33380000 /* DSP-FW downlaod range (top) */
#define INTERDSP_DL_BOTTOM_ADDR		0x33FDFFFF /*                       (end) */

#define OMF_MC_SDRAM_BASE   			0x33900000 /* shared memory for OMF */
#define OMF_MC_ACOUSTIC_PARAM_MEM_SIZE	0x00001000 /*   for param (4KB)  */

#define OMF_MC_FRAME_BUFFER_ADDR		(0x33480000)
#define OMF_MC_FRAME_BUFFER_SIZE		(0x00400000)

#define OMF_MC_DSP_COMMUNICATION_ADDR	(INTERDSP_SHARED_ADDR - 0x00001000)
#define OMF_MC_DSP_COMMUNICATION_SIZE	(0x00001000)

#ifdef CONFIG_FB_MP200
#if (NUM_BUF_V4L2 == 3)
#define FB_FRAME_BUFFER_ADDR	0x32D46000 /* frame buffer , fb driver work */
#else /* (NUM_BUF_V4L2 == 2) */
#define FB_FRAME_BUFFER_ADDR	0x32DE8000 /* frame buffer , fb driver work */
#endif
#define FB_FRAME_BUFFER_SIZE	0x00453000 /*   4428Kbyte  */
#endif	/* CONFIG_FB_MP200 */
#ifdef CONFIG_VIDEO_MP200		/* V4L2 driver */
#if (NUM_BUF_V4L2 == 3)
#define ROT_SHARED_ADDR			0x33199000                  /* buffer for IPU-ROT                            */
#else /* (NUM_BUF_V4L2 == 2) */
#define ROT_SHARED_ADDR			0x3323B000                  /* buffer for IPU-ROT                            */
#endif
#define ROT_SHARED_SIZE			(0x0007E900 * NUM_BUF_V4L2) /*   for YUV420 720x480 (506.25KB)*NUM_BUF_V4L2  */
#define IMG_SHARED_ADDR			(ROT_SHARED_ADDR + ROT_SHARED_SIZE) /* buffer for IPU-IMG                    */
#define IMG_SHARED_SIZE			(0x00023280 * NUM_BUF_V4L2) /*   for YUV420 240x400 (140.625KB)*NUM_BUF_V4L2 */
#endif


/* SDRAM difinition for OMF/kenrel drivers  */

#define SHARED_MEM_ADDRESS 	INTERDSP_SHARED_ADDR	/* CPU<->DSP command buffer start address*/
#define SHARED_MEM_SIZE 	INTERDSP_SHARED_SIZE
#define DOWNLOAD_RANGE_START 	INTERDSP_DL_TOP_ADDR
#define DOWNLOAD_RANGE_END 	INTERDSP_DL_BOTTOM_ADDR

#define OMF_MC_AUDIO_SHARED_MEMORY_ADDR (OMF_MC_SDRAM_BASE + 0x00000000) /* for audio (564KB) */
#define OMF_MC_VIDEO_SHARED_MEMORY_ADDR (OMF_MC_SDRAM_BASE + 0x0008D000) /* for video (6468KB) */
#define OMF_MC_ACOUSTIC_PARAM_MEM_ADDR  0x3337F000 /* for param (4KB)  */

#define FRONT_WIDTH		240	/* for FrameBuf (LCDC) Width  */
#define FRONT_HEIGHT		400	/* for FrameBuf (LCDC) Height */
#define FRONT_WIDTH_V		240	/* for DispBuf  (2D)   Width  */
#define FRONT_HEIGHT_V		400	/* for DispBuf  (2D)   Height */
#define BYTES_PER_PIXEL		2	/* for DispBuf  (2D)   - 16bpp */
#ifdef CONFIG_MP200_LCD_RGB666
#define LCD_DISPLAY_RGB666      1
#define BITS_PER_PIXEL          18      /* for FrameBuf (LCDC RGB666) - 18bpp */
#else
#define LCD_DISPLAY_RGB666      0
#define BITS_PER_PIXEL          16      /* for FrameBuf (LCDC RGB565) - 16bpp */
#endif

/* NTS display size */
#ifdef CONFIG_MP200_NTS
#define NTSC_WIDTH		720
#define NTSC_HEIGHT		486
#define PAL_WIDTH		720
#define PAL_HEIGHT		576
#define NTS_WIDTH		(NTSC_WIDTH  > PAL_WIDTH  ? NTSC_WIDTH  : PAL_WIDTH)
#define NTS_HEIGHT		(NTSC_HEIGHT > PAL_HEIGHT ? NTSC_HEIGHT : PAL_HEIGHT)
#define NTS_WIDTH_V		(NTSC_WIDTH  > PAL_WIDTH  ? NTSC_WIDTH  : PAL_WIDTH)
#define NTS_HEIGHT_V		(NTSC_HEIGHT > PAL_HEIGHT ? NTSC_HEIGHT : PAL_HEIGHT)
#endif /* CONFIG_MP200_NTS */

#ifdef CONFIG_FB_MP200
#define SMEM_START		FB_FRAME_BUFFER_ADDR	/* frame buffer, X/fb driver common, etc */
#define SMEM_LENGTH		FB_FRAME_BUFFER_SIZE
#endif
#ifdef CONFIG_VIDEO_MP200	/* V4L2 driver */
#define ROT_SMEM_START		ROT_SHARED_ADDR		/* for rotate image (common with DSP) */
#define ROT_SMEM_LENGTH		ROT_SHARED_SIZE		/* YUV420 WVGA (800 * 480 * 1.5) */
#define IMG_SMEM_START		IMG_SHARED_ADDR		/* for resize image (common with DSP) */
#define IMG_SMEM_LENGTH		IMG_SHARED_SIZE		/* YUV420 WVGA (800 * 480 * 1.5) */
#endif

#ifdef CONFIG_FB_MP200
#define DISPBUF_A_OFFSET	0x00000000	/* 0x00000000 - 0x0002EDFF (0x2EE00) */
#define DISPBUF_B_OFFSET	0x0002F000	/* 0x0002F000 - 0x0005DDFF (0x2EE00) */
#define DISPBUF_LENGTH		(FRONT_WIDTH_V * FRONT_HEIGHT_V * BYTES_PER_PIXEL)

#ifdef CONFIG_MP200_NTS
#define NTSCFRAME_A_OFFSET	0x0005E000	/* 0x0005E000 - 0x001287FF (0xCA800) */
#define NTSCFRAME_B_OFFSET	0x00128800	/* 0x00128800 - 0x001F2FFF (0xCA800) */
#define NTSCFRAME_LENGTH	(NTS_WIDTH * NTS_HEIGHT * 2) /* YUV422 PAL (720 * 576 * 2) */

#ifdef CONFIG_FB_MP200_NTS
#define NTSCBUF_A_OFFSET	0x001F3000	/* 0x001F3000 + 0x002BD7FF (0xCA800) */
#define NTSCBUF_B_OFFSET	0x002BE000	/* 0x002BE000 + 0x003887FF (0xCA800) */
#define NTSCBUF_LENGTH		(NTS_WIDTH * NTS_HEIGHT * 2) /* RGB565 (720 * 576 * 2) */

#define NTSCWORK_OFFSET		0x00388800	/* 0x00388800 - 0x004CFFFF (0xCA800) */
#define NTSCWORK_LENGTH		(NTS_WIDTH * NTS_HEIGHT * 2) /* RGB565 PAL (720 * 576 * 2) */
#endif /* CONFIG_FB_MP200_NTS */
#endif /* CONFIG_MP200_NTS */
#endif /* CONFIG_FB_MP200 */

#endif /* __EM1_MEM_H */


