Xilinx ZynqMP OCM EDAC driver, it does reports the OCM ECC single bit errors
that are corrected and double bit ecc errors that are detected by the OCM
ECC controller.

Required properties:
- compatible: Should be "xlnx,zynqmp-ocmc-1.0".
- reg: Should contain OCM controller registers location and length.
- interrupt-parent: Should be core interrupt controller.
- interrupts: Property with a value describing the interrupt number.

Example:
++++++++
ocm: memory-controller@ff960000 {
	compatible = "xlnx,zynqmp-ocmc-1.0";
	reg = <0x0 0xff960000 0x1000>;
	interrupt-parent = <&gic>;
	interrupts = <0 10 4>;
};
