Xilinx SPI controller Device Tree Bindings
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Required properties:
- compatible		: Should be "xlnx,xps-spi-2.00.a" or "xlnx,xps-spi-2.00.b"
- reg			: Physical base address and size of SPI registers map.
- interrupts		: Property with a value describing the interrupt
			  number.
- interrupt-parent	: Must be core interrupt controller
- fifo-size		: Depth of TX/RX Fifos

Optional properties:
- num-cs		: Number of chip selects used.
- bits-per-word		: Number of bits per word.
- clock-names		: Can be one or more strings from "axi_clk", "axi4_clk"
			  and "spi_clk" depending on IP configurations.
- clocks		: Input clock specifier. Refer to common clock bindings.

Example:
	axi_quad_spi@41e00000 {
			compatible = "xlnx,xps-spi-2.00.a";
			clock-names = "axi_clk", "axi4_clk", "spi_clk";
			clocks = <&clkc 71>, <&clkc 72>, <&clkc 73>;
			interrupt-parent = <&intc>;
			interrupts = <0 31 1>;
			reg = <0x41e00000 0x10000>;
			num-cs = <0x1>;
			fifo-size = <256>;
			bits-per-word = <8>;
	};

