/*
 * arch/arm/mach-cxd4115/platsmp.c
 *
 * Copyright 2007,2008,2009 Sony Corporation
 *
 * This code is based on arch/arm/mach-realview/platsmp.c
 */
/*
 *  linux/arch/arm/mach-realview/platsmp.c
 *
 *  Copyright (C) 2002 ARM Ltd.
 *  All Rights Reserved
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/smp.h>

#include <asm/cacheflush.h>
#include <asm/hardware/arm_scu.h>
#include <asm/hardware.h>
#include <asm/io.h>

/* logical processor id to physical processor id converter */
#if CONFIG_MPCORE_BOOTCPU > 0
static unsigned int cpuid_tbl[NR_CPUS];

unsigned int phys_cpuid(unsigned int cpu)
{
	return cpuid_tbl[cpu];
}

static cpumask_t cpumap_tbl[1 << NR_CPUS];

cpumask_t phys_cpumap(cpumask_t cpumap)
{
	return cpumap_tbl[*cpus_addr(cpumap)];
}
#else
unsigned int phys_cpuid(unsigned int cpu)
{
	return cpu;
}

cpumask_t phys_cpumap(cpumask_t cpumap)
{
	return cpumap;
}
#endif

/*
 * control for which core is the next to come out of the secondary
 * boot "holding pen"
 */
volatile int __cpuinitdata pen_release = -1;

static unsigned int __init get_core_count(void)
{
	unsigned int ncores;

	ncores = readl(VA_SCU + SCU_CONFIG);
	return (ncores & 0x03) + 1;
}

static DEFINE_SPINLOCK(boot_lock);

void __cpuinit platform_secondary_init(unsigned int cpu)
{
	/*
	 * the primary core may have used a "cross call" soft interrupt
	 * to get this processor out of WFI in the BootMonitor - make
	 * sure that we are no longer being sent this soft interrupt
	 */
	smp_cross_call_done(cpumask_of_cpu(cpu));

	/*
	 * if any interrupts are already enabled for the primary
	 * core (e.g. timer irq), then they will not have been enabled
	 * for us: do so
	 */
	gic_cpu_init(0, VA_GIC_CPU);

	/*
	 * let the primary processor know we're out of the
	 * pen, then head off into the C entry point
	 */
	pen_release = -1;
	smp_wmb();

	/*
	 * Synchronise with the boot thread.
	 */
	spin_lock(&boot_lock);
	spin_unlock(&boot_lock);
}

int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
{
	unsigned long timeout;

	/*
	 * set synchronisation state between this boot processor
	 * and the secondary one
	 */
	spin_lock(&boot_lock);

	/*
	 * The secondary processor is waiting to be released from
	 * the holding pen - release it, then wait for it to flag
	 * that it has been released by resetting pen_release.
	 *
	 * Note that "pen_release" is the hardware CPU ID, whereas
	 * "cpu" is Linux's internal ID.
	 */
	pen_release = phys_cpuid(cpu);
	flush_cache_all();

	/*
	 * XXX
	 *
	 * This is a later addition to the booting protocol: the
	 * bootMonitor now puts secondary cores into WFI, so
	 * poke_milo() no longer gets the cores moving; we need
	 * to send a soft interrupt to wake the secondary core.
	 * Use smp_cross_call() for this, since there's little
	 * point duplicating the code here
	 */
	smp_cross_call(cpumask_of_cpu(cpu));

	timeout = jiffies + (1 * HZ);
	while (time_before(jiffies, timeout)) {
		smp_rmb();
		if (pen_release == -1)
			break;

		udelay(10);
	}

	/*
	 * now the secondary core is starting up let it run its
	 * calibrations, then wait for it to finish
	 */
	spin_unlock(&boot_lock);

	return pen_release != -1 ? -ENOSYS : 0;
}

/*
 * Initialise the CPU possible map early - this describes the CPUs
 * which may be present or become present in the system.
 */
void __init smp_init_cpus(void)
{
	unsigned int i, ncores = get_core_count();
#if CONFIG_MPCORE_BOOTCPU > 0
	unsigned int id, mask, phys_map;

	if (CONFIG_MPCORE_BOOTCPU + NR_CPUS > ncores){
# ifdef CONFIG_DEBUG_LL
		printascii("smp_init_cpus: BOOTCPU+NR_CPUS exceed ncores\n");
# endif
		BUG();
	}
	/* logical cpuid to physical cpuid convert table */
	id = CONFIG_MPCORE_BOOTCPU; /* BOOTCPU is logical CPU#0 */
	for (i = 0; i < NR_CPUS; i++) {
		cpuid_tbl[i] = id++;
		if (id == ncores)
			id = 0;
	}

	/* logical cpumap to physical cpumap convert table */
	mask = (1 << ncores) - 1;
	for (i = 0; i < (1 << NR_CPUS); i++) {
		phys_map = (i << CONFIG_MPCORE_BOOTCPU) & mask;
		phys_map |= (i >> (ncores - CONFIG_MPCORE_BOOTCPU));
		*cpus_addr(cpumap_tbl[i]) = phys_map;
	}
#endif

	for (i = 0; i < ncores; i++)
		cpu_set(i, cpu_possible_map);
}

void __init smp_prepare_cpus(unsigned int max_cpus)
{
	unsigned int ncores = get_core_count();
	unsigned int cpu = smp_processor_id();
	int i;

	/* sanity check */
	if (ncores == 0) {
		printk(KERN_ERR
		       "Realview: strange CM count of 0? Default to 1\n");

		ncores = 1;
	}

	if (ncores > NR_CPUS) {
		printk(KERN_WARNING
		       "Realview: no. of cores (%d) greater than configured "
		       "maximum of %d - clipping\n",
		       ncores, NR_CPUS);
		ncores = NR_CPUS;
	}

	smp_store_cpu_info(cpu);

	/*
	 * are we trying to boot more cores than exist?
	 */
	if (max_cpus > ncores)
		max_cpus = ncores;

	/*
	 * Enable the local timer for primary CPU
	 */
	local_timer_setup(cpu);

	/*
	 * Initialise the present map, which describes the set of CPUs
	 * actually populated at the present time.
	 */
	for (i = 0; i < max_cpus; i++)
		cpu_set(i, cpu_present_map);
}
