/*
 * arch/arm/mach-cxd4105/clock.c
 *
 * clock manager
 *
 * Copyright 2007 Sony Corporation
 *
 * This code is based on arch/arm/mach-integrator/clock.c.
 */
/*
 *  linux/arch/arm/mach-integrator/clock.c
 *
 *  Copyright (C) 2004 ARM Limited.
 *  Written by Deep Blue Solutions Limited.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/string.h>
#include <linux/clk.h>
#include <linux/mutex.h>
#include <asm/semaphore.h>

#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/arch/regs-clk.h>

#include "clock.h"

/*-------------------------- UART -----------------------------*/
static int cxd4105_enable_uart(struct clk *clk, int enable)
{
#ifdef CONFIG_SERIAL_AMBA2_DEBUG_USE_UART0
	if (clk->chan == 0)
		return 0;
#endif
	writeb(enable, VA_CLKBLK_BASE+CLKBLK_UART(clk->chan));
	return 0;
}

#if defined(CONFIG_ARCH_CXD4105)
static unsigned long cxd4105_getrate_uart(struct clk *clk)
{
	return (readb(VA_CLKBLK_BASE+CLKBLK_UARTSEL(clk->chan)) & 1) ?
		CXD4105_UART_CLK_LOW : CXD4105_UART_CLK_HIGH;
}

static int cxd4105_setrate_uart(struct clk *clk, unsigned long rate)
{
	int n;

#ifdef CONFIG_SERIAL_AMBA2_DEBUG_USE_UART0
	if (clk->chan == 0)
		return 0;
#endif
	/* 1. Stop UART CLK */
	writeb(0, VA_CLKBLK_BASE+CLKBLK_UART(clk->chan));

	/* 2. Wait for clock stop */
	n = CXD4105_CLKSTOP_WAIT;
	while (readb(VA_CLKBLK_BASE+CLKBLK_UARTSTAT(clk->chan)) & 1) {
		if (--n == 0)
			break;
	}

	/* 3. Select UARTCLK */
	writeb((rate==48000000)?0:1, VA_CLKBLK_BASE+CLKBLK_UARTSEL(clk->chan));

	return 0;
}
#endif /* CONFIG_ARCH_CXD4105 */
/*-------------------------------------------------------------*/

static struct clk clocks[] = {
	/*-------------------- UART --------------------*/
#if defined(CONFIG_ARCH_CXD4108)
	{
		.name		= "UARTCLK0",
		.rate		= CXD4108_UART_CLK,
		.chan		= 0,
		.enable		= cxd4105_enable_uart,
	},
	{
		.name		= "UARTCLK1",
		.rate		= CXD4108_UART_CLK,
		.chan		= 1,
		.enable		= cxd4105_enable_uart,
	},
#else  /* CONFIG_ARCH_CXD4105 */
	{
		.name		= "UARTCLK0",
		.chan		= 0,
		.get_rate	= cxd4105_getrate_uart,
		.set_rate	= cxd4105_setrate_uart,
		.enable		= cxd4105_enable_uart,
	},
	{
		.name		= "UARTCLK1",
		.chan		= 1,
		.get_rate	= cxd4105_getrate_uart,
		.set_rate	= cxd4105_setrate_uart,
		.enable		= cxd4105_enable_uart,
	},
	{
		.name		= "UARTCLK2",
		.chan		= 2,
		.get_rate	= cxd4105_getrate_uart,
		.set_rate	= cxd4105_setrate_uart,
		.enable		= cxd4105_enable_uart,
	},
	{
		.name		= "UARTCLK3",
		.chan		= 3,
		.get_rate	= cxd4105_getrate_uart,
		.set_rate	= cxd4105_setrate_uart,
		.enable		= cxd4105_enable_uart,
	},
#endif
	/*----------------------------------------------*/
};

static DEFINE_MUTEX(clocks_mutex);

struct clk *clk_get(struct device *dev, const char *id)
{
	int i;
	struct clk *p, *clk = ERR_PTR(-ENOENT);

	mutex_lock(&clocks_mutex);
	for (i = 0, p = clocks; i < ARRAY_SIZE(clocks); i++, p++) {
		if (strcmp(p->name, id) == 0) {
			clk = p;
			break;
		}
	}
	mutex_unlock(&clocks_mutex);

	return clk;
}
EXPORT_SYMBOL(clk_get);

void clk_put(struct clk *clk)
{
}
EXPORT_SYMBOL(clk_put);

int clk_enable(struct clk *clk)
{
	mutex_lock(&clocks_mutex);
	(clk->enable)(clk, 1);
	mutex_unlock(&clocks_mutex);
	return 0;
}
EXPORT_SYMBOL(clk_enable);

void clk_disable(struct clk *clk)
{
	mutex_lock(&clocks_mutex);
	(clk->enable)(clk, 0);
	mutex_unlock(&clocks_mutex);
}
EXPORT_SYMBOL(clk_disable);

unsigned long clk_get_rate(struct clk *clk)
{
	if (clk->rate != 0)
		return clk->rate;
	if (clk->get_rate != NULL)
		return (clk->get_rate)(clk);
	return clk->rate;
}
EXPORT_SYMBOL(clk_get_rate);

long clk_round_rate(struct clk *clk, unsigned long rate)
{
	return rate;
}
EXPORT_SYMBOL(clk_round_rate);

int clk_set_rate(struct clk *clk, unsigned long rate)
{
	int ret;

	mutex_lock(&clocks_mutex);
	ret = (clk->set_rate)(clk, rate);
	mutex_unlock(&clocks_mutex);
	return ret;
}
EXPORT_SYMBOL(clk_set_rate);

static int __init clk_init(void)
{
	return 0;
}
arch_initcall(clk_init);
