#define PQ_MM_DS_rule_FBL_ID_Main_Ex 2
#define PQ_MM_DS_rule_FBL_IP_NUM_Main_Ex 10
#define PQ_MM_DS_rule_FBL_NUM_Main_Ex 14

#define PQ_MM_DS_RULE_FBL_L_SD_I_MAIN_EX 1
#define PQ_MM_DS_RULE_FBL_SD_I_MAIN_EX 1
#define PQ_MM_DS_RULE_FBL_H_SD_I_MAIN_EX 1
#define PQ_MM_DS_RULE_FBL_FHD_I_MAIN_EX 1
#define PQ_MM_DS_RULE_FBL_H_FHD_I_MAIN_EX 1
#define PQ_MM_DS_RULE_FBL_4K_1K_I_MAIN_EX 1
#define PQ_MM_DS_RULE_FBL_4K_I_MAIN_EX 1
#define PQ_MM_DS_RULE_FBL_L_SD_P_MAIN_EX 1
#define PQ_MM_DS_RULE_FBL_SD_P_MAIN_EX 1
#define PQ_MM_DS_RULE_FBL_H_SD_P_MAIN_EX 1
#define PQ_MM_DS_RULE_FBL_FHD_P_MAIN_EX 1
#define PQ_MM_DS_RULE_FBL_H_FHD_P_MAIN_EX 1
#define PQ_MM_DS_RULE_FBL_4K_1K_P_MAIN_EX 1
#define PQ_MM_DS_RULE_FBL_4K_P_MAIN_EX 1

typedef enum
{
PQ_MM_DS_rule_FBL_L_SD_I_Main_Ex,
PQ_MM_DS_rule_FBL_SD_I_Main_Ex,
PQ_MM_DS_rule_FBL_H_SD_I_Main_Ex,
PQ_MM_DS_rule_FBL_FHD_I_Main_Ex,
PQ_MM_DS_rule_FBL_H_FHD_I_Main_Ex,
PQ_MM_DS_rule_FBL_4K_1K_I_Main_Ex,
PQ_MM_DS_rule_FBL_4K_I_Main_Ex,
PQ_MM_DS_rule_FBL_L_SD_P_Main_Ex,
PQ_MM_DS_rule_FBL_SD_P_Main_Ex,
PQ_MM_DS_rule_FBL_H_SD_P_Main_Ex,
PQ_MM_DS_rule_FBL_FHD_P_Main_Ex,
PQ_MM_DS_rule_FBL_H_FHD_P_Main_Ex,
PQ_MM_DS_rule_FBL_4K_1K_P_Main_Ex,
PQ_MM_DS_rule_FBL_4K_P_Main_Ex,
}
MST_MM_DS_rule_FBL_Index_Main_Ex;
extern U8 MST_MM_DS_rule_FBL_IP_Index_Main_Ex[PQ_MM_DS_rule_FBL_IP_NUM_Main_Ex];
extern U8 MST_MM_DS_rule_FBL_Array_Main_Ex[PQ_MM_DS_rule_FBL_NUM_Main_Ex][PQ_MM_DS_rule_FBL_IP_NUM_Main_Ex];

