/*
 * Copyright (c) [2020], MediaTek Inc. All rights reserved.
 *
 * This software/firmware and related documentation ("MediaTek Software") are
 * protected under relevant copyright laws.
 * The information contained herein is confidential and proprietary to
 * MediaTek Inc. and/or its licensors.
 * Except as otherwise provided in the applicable licensing terms with
 * MediaTek Inc. and/or its licensors, any reproduction, modification, use or
 * disclosure of MediaTek Software, and information contained herein, in whole
 * or in part, shall be strictly prohibited.
*/
#ifndef _DRV_EFUSE_H_
#define _DRV_EFUSE_H_

#define K_EFUSE_R_OK                        0
#define K_EFUSE_R_NG                        -1
#define K_EFUSE_R_ERR_INVALID_PARA          -2
#define K_EFUSE_R_ERR_INIT_NOT_DONE         -3
#define K_EFUSE_R_ERR_EFUSE_ID_NOT_SUPPORT  -4
#define K_EFUSE_R_ERR_WAIT_HW_TIMEOUT       -5
#define K_EFUSE_R_ERR_READ_SUBBANK_FAIL     -6

int mdrv_efuse_read_subbank_reg_U32( unsigned char u8SubBank, unsigned int * pu32RegVal);

#endif

