/* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2 of the GNU General Public License ("GPLv2 License")
 * or BSD License.
 *
 * GPLv2 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See http://www.gnu.org/licenses/gpl-2.0.html for more details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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 *
 *****************************************************************************/
#ifndef _HAL_SIW_H_
#define _HAL_SIW_H_

/* SIW Flash Layout define */
#define SIW_LUT_OFFSET              0x1000      // 0x1000: data include 0~0x1000 in LXS format, 0: exclude 0~0x1000 in LXS format
#define SIW_LUT_SIZE                0xEEAE1     // 0xEFAE0-0x1000+1
#define SIW_LUT_CRC_SIZE            0x2         // 0xEFAE2-0xEFAE1+1
#define SIW_SPOC_REG_OFFSET         0xEFAE3
#define SIW_SPOC_REG_SIZE           0x2F        // 0xEFB11-0xEFAE3+1
#define SIW_SPOC_REG_CRC_SIZE       0x2         // 0xEFB13-0xEFB12+1
#define SIW_SPOC_REG_NUM            47

#define SIW_DATA_SIZE 1048576
// #define SIW_DATA_SIZE 977684 // SIW_LUT_SIZE + SIW_LUT_CRC_SIZE + SIW_SPOC_REG_SIZE + SIW_SPOC_REG_CRC_SIZE

#define DEMURA_DMA_ADDR_UNIT        32

void HAL_SIW_Demura_Big_Endian(MS_BOOL bBigEndian);
void HAL_SIW_Demura_Enable_DL(MS_BOOL bEnable);
void HAL_SIW_Demura_SetDL_Depth(void);
void HAL_SIW_Demura_SetDL_ReqLenth(void);
void HAL_SIW_Demura_SetDL_BaseAddr(MS_PHYADDR u32Addr);
void HAL_SIW_Demura_RD_Done(MS_BOOL bDone);
void HAL_SIW_Demura_SPOC_Reg(MS_U8 *pReg);

#if(TEST_SIW_DEMURA == 1)
    void HAL_SIW_Demura_Bypass(MS_BOOL b_bypass);
#endif

#endif
