//<MStar Software>
//******************************************************************************
// MStar Software
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//******************************************************************************
//<MStar Software>
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2008-2009 MStar Semiconductor, Inc.
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////////////////////////////////////////////////////////////////////////////////
#define MHAL_PQ_C


//-------------------------------------------------------------------------------------------------
//  Include Files
//-------------------------------------------------------------------------------------------------
// Common Definition
#ifdef MSOS_TYPE_LINUX_KERNEL
#include <linux/string.h>
#include <linux/slab.h>
#else
#include <string.h>
#include <stdlib.h>
#endif

#include "MsCommon.h"
#include "MsOS.h"
#ifdef MSOS_TYPE_LINUX_KERNEL
#include <linux/slab.h>
#endif

// Internal Definition
#include "hwreg_utility2.h"
#include "color_reg.h"

#include "drvPQ_Define.h"
#include "drvPQ.h"

#include "M7332_Main.h"             // table config parameter

#if PQ_ENABLE_PIP
#include "M7332_Sub.h"              // table config parameter
#endif

#include "drvPQ_Datatypes.h"
#include "PQ_context.h"
#include "mhal_pq.h"
#include "apiXC.h"
#include "utopia.h"
#include "PQ_private.h"

#include "drvPQ_VR.h"
#include "drvPQ_Bin.h"
#include "QualityMode.h"
//-------------------------------------------------------------------------------------------------
//  Driver Compiler Options
//-------------------------------------------------------------------------------------------------


//-------------------------------------------------------------------------------------------------
//  Local Defines
//-------------------------------------------------------------------------------------------------
#ifdef MSOS_TYPE_LINUX_KERNEL
#define PQ_TEST_LOG(_fmt, _args...) //printk(_fmt, ##_args);
#else
#define PQ_TEST_LOG(_fmt, _args...) //printf(_fmt, ##_args);
#endif


#ifndef UNUSED //to avoid compile warnings...
#define UNUSED(var) (void)(var)
#endif

#ifndef UNUSED_PQ
#define UNUSED_PQ(x) UNUSED_ ## x __attribute__ ((__unused__))
#endif

#define YSRAM_TENTAPE_NUM 13
#define CSRAM_PHASE_OFFSET 64
#define CSRAM_DATA_OFFSET 25 //byt
#define CSRAM_DATA_SIZE 5 //byte
#define XC_AUTODOWNLOAD_HVSP_DEPTH         (128)
#define XC_AUTODOWNLOAD_HVSP_WIDTH         (32)
#define XC_AUTODOWNLOAD_HVSP_TABLE_NO      (32)
#define XC_AUTODOWNLAOD_HVSP_SECIDX_START  (0)
#define YC_SRAM_SIZE                       (8)
//-------------------------------------------------------------------------------------------------
//  Local Structures
//-------------------------------------------------------------------------------------------------

//-------------------------------------------------------------------------------------------------
//  Global Variables
//-------------------------------------------------------------------------------------------------
#if SUPPORT_AUTODOWNLOAD_HVSP
static MS_U8 _pq_scram[XC_AUTODOWNLOAD_HVSP_DEPTH][XC_AUTODOWNLOAD_HVSP_WIDTH]={{0}};
#endif

#if SUPPORT_AUTODOWNLOAD_ICC_IHC
static MS_BOOL _bICCWrited = FALSE;
static MS_BOOL _bIHCWrited = FALSE;
#endif
static MS_U16 _u16gPQBinTMOPnlIdx = 0;
static MS_U16  _u16ScalingTemp = 0;


static MS_U8 *pu8YSRAM1_QMapAddr = NULL;
static MS_U8 *pu8YSRAM2_QMapAddr = NULL;
static MS_U8 *pu8YSRAM3_QMapAddr = NULL;
static MS_U8 *pu8YSRAM4_QMapAddr = NULL;
static MS_U8 *pu8CSRAM1_QMapAddr = NULL;
static MS_U8 *pu8CSRAM2_QMapAddr = NULL;
static MS_U8 *pu8CSRAM3_QMapAddr = NULL;
static MS_U8 *pu8CSRAM4_QMapAddr = NULL;

static MS_BOOL _gbIsHalfPQDelayEnable = FALSE;
static MS_BOOL _gbHalfPQDelayEchoEnable = SUPPORT_HALF_PQ_DELAY;
//-------------------------------------------------------------------------------------------------
//  Local Variables
//-------------------------------------------------------------------------------------------------
MS_U8 _gu8AnalogCfd[QM_INPUTTYPE_NUM_Main][6] =
{
#if (PQ_QM_CVBS)
    {9, 2, 0, 6, 6, 6}, // QM_RF_NTSC_44_Main
    {9, 2, 0, 6, 6, 6}, // QM_RF_NTSC_M_Main
    {8, 2, 0, 5, 6, 5}, // QM_RF_PAL_BGHI_Main
    {8, 2, 0, 5, 6, 5}, // QM_RF_PAL_60_Main
    {8, 2, 0, 5, 6, 5}, // QM_RF_PAL_M_Main
    {8, 2, 0, 5, 6, 5}, // QM_RF_PAL_N_Main
    {8, 2, 0, 5, 6, 5}, // QM_RF_SECAM_Main
    {9, 2, 0, 6, 6, 6}, // QM_VIF_NTSC_44_Main
    {9, 2, 0, 6, 6, 6}, // QM_VIF_NTSC_M_Main
    {8, 2, 0, 5, 6, 5}, // QM_VIF_PAL_BGHI_Main
    {8, 2, 0, 5, 6, 5}, // QM_VIF_PAL_60_Main
    {8, 2, 0, 5, 6, 5}, // QM_VIF_PAL_M_Main
    {8, 2, 0, 5, 6, 5}, // QM_VIF_PAL_N_Main
    {8, 2, 0, 5, 6, 5}, // QM_VIF_SECAM_Main
    {9, 2, 0, 6, 6, 6}, // QM_SV_NTSC_44_Main
    {9, 2, 0, 6, 6, 6}, // QM_SV_NTSC_M_Main
    {8, 2, 0, 5, 6, 5}, // QM_SV_PAL_BGHI_Main
    {8, 2, 0, 5, 6, 5}, // QM_SV_PAL_60_Main
    {8, 2, 0, 5, 6, 5}, // QM_SV_PAL_M_Main
    {8, 2, 0, 5, 6, 5}, // QM_SV_PAL_N_Main
    {8, 2, 0, 5, 6, 5}, // QM_SV_SECAM_Main
    {9, 2, 0, 6, 6, 6}, // QM_AV_NTSC_44_Main
    {9, 2, 0, 6, 6, 6}, // QM_AV_NTSC_M_Main
    {8, 2, 0, 5, 6, 5}, // QM_AV_PAL_BGHI_Main
    {8, 2, 0, 5, 6, 5}, // QM_AV_PAL_60_Main
    {8, 2, 0, 5, 6, 5}, // QM_AV_PAL_M_Main
    {8, 2, 0, 5, 6, 5}, // QM_AV_PAL_N_Main
    {8, 2, 0, 5, 6, 5}, // QM_AV_SECAM_Main
    {9, 2, 0, 6, 6, 6}, // QM_SCART_AV_NTSC_44_Main
    {9, 2, 0, 6, 6, 6}, // QM_SCART_AV_NTSC_M_Main
    {8, 2, 0, 5, 6, 5}, // QM_SCART_AV_PAL_BGHI_Main
    {8, 2, 0, 5, 6, 5}, // QM_SCART_AV_PAL_60_Main
    {8, 2, 0, 5, 6, 5}, // QM_SCART_AV_PAL_M_Main
    {8, 2, 0, 5, 6, 5}, // QM_SCART_AV_PAL_N_Main
    {8, 2, 0, 5, 6, 5}, // QM_SCART_AV_SECAM_Main
    {9, 2, 0, 6, 6, 6}, // QM_SCART_SV_NTSC_44_Main
    {9, 2, 0, 6, 6, 6}, // QM_SCART_SV_NTSC_M_Main
    {8, 2, 0, 5, 6, 5}, // QM_SCART_SV_PAL_BGHI_Main
    {8, 2, 0, 5, 6, 5}, // QM_SCART_SV_PAL_60_Main
    {8, 2, 0, 5, 6, 5}, // QM_SCART_SV_PAL_M_Main
    {8, 2, 0, 5, 6, 5}, // QM_SCART_SV_PAL_N_Main
    {8, 2, 0, 5, 6, 5}, // QM_SCART_SV_SECAM_Main
    {2, 0, 1, 6, 6, 6}, // QM_SCART_RGB_NTSC_Main
    {1, 0, 1, 5, 6, 5}, // QM_SCART_RGB_PAL_Main(43)
#endif
#if (PQ_QM_YPBPR)
    {8, 2, 0, 5, 6, 5}, // QM_YPbPr_480i_Main
    {8, 2, 0, 5, 6, 5}, // QM_YPbPr_576i_Main
    {8, 2, 0, 5, 6, 5}, // QM_YPbPr_480p_Main
    {8, 2, 0, 5, 6, 5}, // QM_YPbPr_576p_Main
    {8, 2, 0, 5, 6, 5}, // QM_YPbPr_720p_24hz_Main
    {8, 2, 0, 5, 6, 5}, // QM_YPbPr_720p_50hz_Main
    {8, 2, 0, 5, 6, 5}, // QM_YPbPr_720p_60hz_Main
    {10, 2, 0, 1, 1, 1}, // QM_YPbPr_1080i_50hz_Main
    {10, 2, 0, 1, 1, 1}, // QM_YPbPr_1080i_60hz_Main
    {10, 2, 0, 1, 1, 1}, // QM_YPbPr_1080p_24hz_Main
    {10, 2, 0, 1, 1, 1}, // QM_YPbPr_1080p_50hz_Main
    {10, 2, 0, 1, 1, 1}, // QM_YPbPr_1080p_60hz_Main(55)
#endif
#if (PQ_QM_HMDI)
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_480i_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_576i_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_480p_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_576p_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_720p_24hz_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_720p_50hz_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_720p_60hz_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_FP_720p_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_1080i_50hz_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_1080i_60hz_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_1080p_24hz_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_1080p_60hz_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_1080p_50hz_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_FP_1080i_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_FP_1080p_Main
    {7, 2, 0, 2, 2, 2}, // QM_4K2K_24Hz_Main
    {7, 2, 0, 2, 2, 2}, // QM_4K2K_30Hz_Main
    {7, 2, 0, 2, 2, 2}, // QM_4K2K_60Hz_Main(73)
#endif
#if (PQ_QM_HDMI_PC)
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_444_PC_Hup_Vup_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_444_PC_Hup_Vdown_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_444_PC_Hup_Vno_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_444_PC_Hdown_Vup_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_444_PC_Hdown_Vdown_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_444_PC_Hdown_Vno_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_444_PC_Hno_Vup_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_444_PC_Hno_Vdown_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_444_PC_Hno_Vno_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_444_PC_Hno_Vno_4K_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_422_PC_Hup_Vup_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_422_PC_Hup_Vdown_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_422_PC_Hup_Vno_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_422_PC_Hdown_Vup_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_422_PC_Hdown_Vdown_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_422_PC_Hdown_Vno_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_422_PC_Hno_Vup_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_422_PC_Hno_Vdown_Main
    {7, 2, 0, 2, 2, 2}, // QM_HDMI_422_PC_Hno_Vno_Main(92)
#endif
#if (PQ_QM_PC)
    {5, 0, 1, 1, 13, 5}, // QM_DVI_Dsub_HDMI_RGB_PC_Hup_Vup_Main
    {5, 0, 1, 1, 13, 5}, // QM_DVI_Dsub_HDMI_RGB_PC_Hup_Vdown_Main
    {5, 0, 1, 1, 13, 5}, // QM_DVI_Dsub_HDMI_RGB_PC_Hup_Vno_Main
    {5, 0, 1, 1, 13, 5}, // QM_DVI_Dsub_HDMI_RGB_PC_Hdown_Vup_Main
    {5, 0, 1, 1, 13, 5}, // QM_DVI_Dsub_HDMI_RGB_PC_Hdown_Vdown_Main
    {5, 0, 1, 1, 13, 5}, // QM_DVI_Dsub_HDMI_RGB_PC_Hdown_Vno_Main
    {5, 0, 1, 1, 13, 5}, // QM_DVI_Dsub_HDMI_RGB_PC_Hno_Vup_Main
    {5, 0, 1, 1, 13, 5}, // QM_DVI_Dsub_HDMI_RGB_PC_Hno_Vdown_Main
    {5, 0, 1, 1, 13, 5}, // QM_DVI_Dsub_HDMI_RGB_PC_Hno_Vno_Main
    {5, 0, 1, 1, 13, 5}, // QM_DVI_Dsub_HDMI_RGB_PC_Hno_Vno_4K_Main(102)
#endif
#if (PQ_QM_DTV)
    {7, 2, 0, 2, 2, 2}, // QM_DTV_480i_352x480_MPEG2_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_480i_MPEG2_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_576i_MPEG2_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_480p_MPEG2_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_576p_MPEG2_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_720p_24hz_MPEG2_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_720p_50hz_MPEG2_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_720p_60hz_MPEG2_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_1080i_50hz_MPEG2_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_1080i_60hz_MPEG2_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_1080p_24hz_MPEG2_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_1080p_50hz_MPEG2_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_1080p_60hz_MPEG2_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_4K2K_MPEG2_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_4K2K_60Hz_MPEG2_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_480i_352x480_H264_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_480i_H264_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_576i_H264_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_480p_H264_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_576p_H264_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_720p_24hz_H264_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_720p_50hz_H264_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_720p_60hz_H264_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_1080i_50hz_H264_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_1080i_60hz_H264_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_1080p_24hz_H264_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_1080p_50hz_H264_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_1080p_60hz_H264_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_4K2K_H264_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_4K2K_60Hz_H264_Main(132)
#endif
#if (PQ_QM_MM_VIDEO)
    {7, 2, 1, 2, 2, 2}, // QM_Multimedia_video_SD_interlace_Main
    {7, 2, 1, 2, 2, 2}, // QM_Multimedia_video_SD_progressive_Main
    {7, 2, 1, 2, 2, 2}, // QM_Multimedia_video_SD_progressive_24hz_Main
    {7, 2, 1, 2, 2, 2}, // QM_Multimedia_video_HD_interlace_Main
    {7, 2, 1, 2, 2, 2}, // QM_Multimedia_video_HD_progressive_Main
    {7, 2, 1, 2, 2, 2}, // QM_Multimedia_video_HD_progressive_24hz_Main(138)
#endif
#if (PQ_QM_MM_PHOTO)
    {7, 2, 1, 2, 2, 2}, // QM_Multimedia_photo_SD_progressive_Main
    {7, 2, 1, 2, 2, 2}, // QM_Multimedia_photo_HD_progressive_Main(140)
#endif
#if (PQ_QM_MM_VIDEO)
    {7, 2, 1, 2, 2, 2}, // QM_Multimedia_video_online_SD_interlace_Main
    {7, 2, 1, 2, 2, 2}, // QM_Multimedia_video_online_SD_progressive_Main
    {7, 2, 1, 2, 2, 2}, // QM_Multimedia_video_online_SD_progressive_24hz_Main
    {7, 2, 1, 2, 2, 2}, // QM_Multimedia_video_online_HD_interlace_Main
    {7, 2, 1, 2, 2, 2}, // QM_Multimedia_video_online_HD_progressive_Main
    {7, 2, 1, 2, 2, 2}, // QM_Multimedia_video_online_HD_progressive_24hz_Main
    {7, 2, 1, 2, 2, 2}, // QM_MM_FHD_I_DS_Main
    {7, 2, 1, 2, 2, 2}, // QM_MM_FHD_P_DS_Main
    {7, 2, 1, 2, 2, 2}, // QM_MM_4K2K_DS_Main
    {7, 2, 1, 2, 2, 2}, // QM_MM_4K2K_Main(150)
#endif
#if (PQ_QM_MM_PHOTO)
    {7, 2, 1, 2, 2, 2}, // QM_MM_4K2K_Photo_Main(151)
#endif
#if (PQ_QM_MM_VIDEO)
    {7, 2, 1, 2, 2, 2}, // QM_MM_4K2K_60Hz_Main
    {7, 2, 1, 2, 2, 2}, // QM_MM_non_4K2K_Main
#endif
#if (PQ_QM_DTV)
    {7, 2, 0, 2, 2, 2}, // QM_DTV_iFrame_SD_interlace_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_iFrame_SD_progressive_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_iFrame_HD_interlace_Main
    {7, 2, 0, 2, 2, 2}, // QM_DTV_iFrame_HD_progressive_Main
#endif
#if (PQ_QM_MM_VIDEO)
    {7, 2, 1, 2, 2, 2}, // QM_Multimedia_video_4K2K_FS_progressive_Main
    {7, 2, 1, 2, 2, 2}, // QM_NetWork_4K2K_DS_Main
#endif
#if (PQ_QM_HMDI)
    {7, 2, 0, 2, 2, 2}, // QM_I_Mode_Unlock_Main
    {7, 2, 0, 2, 2, 2}, // QM_P_Mode_Unlock_Main
#endif
};

//This new table is used to simplify the table above _gu8AnalogCfd,
//in order to isolate from QMAP.
MS_U8 _gu8AnalogCfdSimplified[E_PQ_CFD_MAX][6] =
{
    {9, 2, 0, 6, 6, 6},  // 0 E_PQ_CFD_ANALOG_YUV_NTSC
    {8, 2, 0, 5, 6, 5},  // 1 E_PQ_CFD_ANALOG_YUV_PAL
    {8, 2, 0, 5, 6, 5},  // 2 E_PQ_CFD_ANALOG_YUV_SECAM
    {9, 2, 0, 6, 6, 6},  // 3 E_PQ_CFD_ANALOG_RGB_NTSC
    {8, 2, 0, 5, 6, 5},  // 4 E_PQ_CFD_ANALOG_RGB_PAL
    {8, 2, 0, 5, 6, 5},  // 5 E_PQ_CFD_YPBPR_SD
    {10, 2, 0, 1, 1, 1}, // 6 E_PQ_CFD_YPBPR_FHD
    {5, 0, 1, 1, 13, 5}, // 7 E_PQ_CFD_DVI
    {5, 0, 1, 1, 13, 5}, // 8 E_PQ_CFD_VGA
    {7, 2, 1, 2, 2, 2},  // 9 E_PQ_CFD_PHOTO
    {0, 0, 1, 2, 2, 2},  // 10 E_PQ_CFD_PHOTO_RGB
    {7, 2, 1, 2, 2, 2},  // 11 E_PQ_CFD_MM
    {7, 2, 0, 2, 2, 2},  // 12 E_PQ_CFD_DTV
    {7, 2, 0, 2, 2, 2},  // 13 E_PQ_CFD_HDMI
};

static MS_U64 _gu64YCSramIndex[YC_SRAM_SIZE]    = {0,0,0,0,0,0,0,0};
//-------------------------------------------------------------------------------------------------
//  Debug Functions
//-------------------------------------------------------------------------------------------------


//-------------------------------------------------------------------------------------------------
//  Local Functions
//-------------------------------------------------------------------------------------------------

MS_BOOL _HAL_PQ_CompareQMapWithRIU(MS_U8 *pu8QMapData,MS_U16 u16Client,EN_PQ_TEST_STATUS* penTestReport);
static MS_BOOL _MHal_PQ_DS_AddByteCmd(MS_U32 u32Reg, MS_U8 u8Value, MS_U8 u8Mask, EN_DS_MODULE_SEL enDSsel);
//-------------------------------------------------------------------------------------------------
//  Global Functions
//-------------------------------------------------------------------------------------------------
MS_U32 PQ_RIU_BASE;

// Put this function here because hwreg_utility2 only for hal.
void Hal_PQ_init_riu_base(void *pInstance,MS_U32 u32riu_base)
{
    PQ_RIU_BASE = u32riu_base;
}


MS_U8 Hal_PQ_get_sync_flag(void *pInstance,MS_BOOL bMainWin)
{
    MS_U16 u16val;
    MS_U8 u8SyncFlag;
    if(bMainWin)
        u16val = MApi_XC_R2BYTE(REG_SC_BK01_1E_L) & 0x00FF;
    else
        u16val = MApi_XC_R2BYTE(REG_SC_BK03_1E_L) & 0x00FF;

    u8SyncFlag = u16val;
    return u8SyncFlag;
}


MS_U8 Hal_PQ_get_input_vsync_value(void *pInstance,MS_BOOL bMainWin)
{
    return (Hal_PQ_get_sync_flag(pInstance,bMainWin) & 0x04) ? 1:0;
}

MS_U8 Hal_PQ_get_output_vsync_value(void *pInstance,MS_BOOL bMainWin)
{
    return (Hal_PQ_get_sync_flag(pInstance,bMainWin) & 0x01) ? 1 : 0;
}

MS_U8 Hal_PQ_get_input_vsync_polarity(void *pInstance,MS_BOOL bMainWin)
{
    if(bMainWin)
        return (MApi_XC_R2BYTE(REG_SC_BK01_1E_L) & 0x100) ? 1:0;
    else
        return (MApi_XC_R2BYTE(REG_SC_BK03_1E_L) & 0x100) ? 1:0;
}

void Hal_PQ_set_memfmt_doublebuffer(void *pInstance,MS_BOOL bEn)
{
    // BK12_40[0] : OP double buffer
    // BK12_40[1] : F2 IP double buffer
    // BK12_40[2] : F1 IP double buffer
    // monaco hw issue op double buff can not open
    MApi_XC_W2BYTEMSK(REG_SC_BK12_40_L, bEn ? 0x06 : 0x00, 0x0007);
}

void Hal_PQ_set_mem_fmt(void *pInstance,MS_BOOL bMainWin, MS_U16 u16val, MS_U16 u16Mask)
{
    if(bMainWin)
        MApi_XC_W2BYTEMSK(REG_SC_BK12_02_L, u16val, u16Mask);
    else
        MApi_XC_W2BYTEMSK(REG_SC_BK12_42_L, u16val, u16Mask);
}

void Hal_PQ_set_mem_fmt_en(void *pInstance,MS_BOOL bMainWin, MS_U16 u16val, MS_U16 u16Mask)
{
    if(bMainWin)
        MApi_XC_W2BYTEMSK(REG_SC_BK12_02_L, u16val, u16Mask);
    else
        MApi_XC_W2BYTEMSK(REG_SC_BK12_42_L, u16val, u16Mask);
}

MS_U16 Hal_PQ_get_mem_fmt_en(void *pInstance,MS_BOOL bMainWin)
{
    MS_U16 u16val;
    if(bMainWin)
        u16val = MApi_XC_R2BYTEMSK(REG_SC_BK12_02_L, 0x300);
    else
        u16val = MApi_XC_R2BYTEMSK(REG_SC_BK12_42_L, 0x300);
    return u16val;
}
void Hal_PQ_set_420upSample(void *pInstance,MS_U16 u16value)
{
    MApi_XC_W2BYTE(REG_SC_BK21_76_L, u16value);
}

void Hal_PQ_set_force_y_motion(void *pInstance,MS_BOOL bMainWin, MS_U16 u16value)
{
    if(bMainWin)
        MApi_XC_W2BYTEMSK(REG_SC_BK22_78_L, u16value, 0x00FF);
    else
        MApi_XC_W2BYTEMSK(REG_SC_BK22_78_L, u16value, 0xFF00);
}

MS_U8 Hal_PQ_get_force_y_motion(void *pInstance,MS_BOOL bMainWin)
{
    MS_U8 u8val;

    if(bMainWin)
        u8val = (MS_U8)(MApi_XC_R2BYTE(REG_SC_BK22_78_L) & 0x00FF);
    else
        u8val = (MS_U8)((MApi_XC_R2BYTE(REG_SC_BK22_78_L) & 0xFF00)>>8);

    return u8val;
}

void Hal_PQ_set_force_c_motion(void *pInstance,MS_BOOL bMainWin, MS_U16 u16value)
{
    if(bMainWin)
        MApi_XC_W2BYTEMSK(REG_SC_BK22_79_L, u16value, 0x00FF);
    else
        MApi_XC_W2BYTEMSK(REG_SC_BK22_79_L, u16value, 0xFF00);
}

MS_U8 Hal_PQ_get_force_c_motion(void *pInstance,MS_BOOL bMainWin)
{
    MS_U8 u8val;

    if(bMainWin)
        u8val = (MS_U8)(MApi_XC_R2BYTE(REG_SC_BK22_79_L) & 0x00FF);
    else
        u8val = (MS_U8)((MApi_XC_R2BYTE(REG_SC_BK22_79_L) & 0xFF00)>>8);
    return u8val;
}

void Hal_PQ_set_dipf_temporal(void *pInstance,MS_BOOL bMainWin, MS_U16 u16val)
{
    if(bMainWin)
        MApi_XC_W2BYTE(REG_SC_BK22_14_L, u16val);
    else
        MApi_XC_W2BYTE(REG_SC_BK22_44_L, u16val);
}

MS_U16 Hal_PQ_get_dipf_temporal(void *pInstance,MS_BOOL bMainWin)
{
    if(bMainWin)
        return MApi_XC_R2BYTE(REG_SC_BK22_14_L);
    else
        return MApi_XC_R2BYTE(REG_SC_BK22_44_L);
}

void Hal_PQ_set_dipf_spatial(void *pInstance,MS_BOOL bMainWin, MS_U16 u16val)
{
    if(bMainWin)
        MApi_XC_W2BYTEMSK(REG_SC_BK22_15_L, u16val, 0x00FF);
    else
        MApi_XC_W2BYTEMSK(REG_SC_BK22_45_L, u16val, 0x00FF);
}

MS_U8 Hal_PQ_get_dipf_spatial(void *pInstance,MS_BOOL bMainWin)
{
    if(bMainWin)
        return (MS_U8)(MApi_XC_R2BYTE(REG_SC_BK22_15_L) & 0x00FF);
    else
        return (MS_U8)(MApi_XC_R2BYTE(REG_SC_BK22_45_L) & 0x00FF);
}

void Hal_PQ_set_vsp_sram_filter(void *pInstance,MS_U8 u8vale)
{
    MApi_XC_W2BYTEMSK(REG_SC_BK23_0B_L, ((MS_U16)u8vale)<<8, 0xFF00);
}

MS_U8 Hal_PQ_get_vsp_sram_filter(void *pInstance)
{
    MS_U8 u8val;
    u8val = (MS_U8)((MApi_XC_R2BYTE(REG_SC_BK23_0B_L) & 0xFF00) >> 8);
    return u8val;
}

void Hal_PQ_set_dnr(void *pInstance,MS_BOOL bMainWin, MS_U8 u8val)
{
    if(bMainWin)
        MApi_XC_W2BYTEMSK(REG_SC_BK06_21_L, u8val, 0x00FF);
    else
        MApi_XC_W2BYTEMSK(REG_SC_BK06_01_L, u8val, 0x00FF);
}

MS_U8 Hal_PQ_get_dnr(void *pInstance,MS_BOOL bMainWin)
{
    MS_U8 u8val;
    if(bMainWin)
        u8val = (MS_U8)(MApi_XC_R2BYTE(REG_SC_BK06_21_L) & 0x00FF);
    else
        u8val = (MS_U8)(MApi_XC_R2BYTE(REG_SC_BK06_01_L) & 0x00FF);
    return u8val;
}


void Hal_PQ_set_presnr(void *pInstance,MS_BOOL bMainWin, MS_U8 u8val)
{
    if(bMainWin)
        MApi_XC_W2BYTEMSK(REG_SC_BK06_22_L, u8val, 0x00FF);
    else
        MApi_XC_W2BYTEMSK(REG_SC_BK06_02_L, u8val, 0x00FF);
}

MS_U8 Hal_PQ_get_presnr(void *pInstance,MS_BOOL bMainWin)
{
    MS_U8 u8val;
    if(bMainWin)
        u8val = (MS_U8)(MApi_XC_R2BYTE(REG_SC_BK06_22_L) & 0x00FF);
    else
        u8val = (MS_U8)(MApi_XC_R2BYTE(REG_SC_BK06_02_L) & 0x00FF);

    return u8val;
}

void Hal_PQ_set_film(void *pInstance,MS_BOOL bMainWin, MS_U16 u16val)
{
    if(bMainWin)
        MApi_XC_W2BYTEMSK(REG_SC_BK0A_10_L, u16val, 0xC800);
    else
        MApi_XC_W2BYTEMSK(REG_SC_BK0A_10_L, u16val, 0x0700);
}

MS_U8 Hal_PQ_get_film(void *pInstance,MS_BOOL bMainWin)
{
    MS_U8 u8val;
    u8val = (MS_U8)((MApi_XC_R2BYTE(REG_SC_BK0A_10_L) & 0xFF00) >> 8);
    if(bMainWin)
        u8val &= 0xC8;
    else
        u8val &= 0x07;
    return u8val;
}

MS_BOOL MHal_PQ_DS_Write_Y_SRAM_TABLE(void *pInstance, void *pAddr, MS_U8 u8sramtype)
{
    MS_U16 u16Column =0;
    MS_U16 u16Row = 0;
    MS_U16 u16Index = 0;
    MS_U8 u8Ramcode[13] = {0};
    MS_U8 *u8Addr = NULL;

    if(pAddr == NULL)
    {
        PQ_DUMP_FILTER_DBG(printf("[%s, %d] NULL pointer!! \n", __FUNC__, __LINE__));
        return FALSE;
    }

    u8Addr = (MS_U8*)pAddr;
    _gu64YCSramIndex[u8sramtype] = (MS_U64)u8Addr;

    for ( u16Column=0; u16Column < XC_AUTODOWNLOAD_HVSP_DEPTH; u16Column++)
    {
       u16Row = u16Column * YSRAM_TENTAPE_NUM;
       for ( u16Index = 0; u16Index < YSRAM_TENTAPE_NUM; u16Index++)
       {
           u8Ramcode[u16Index] = *((MS_U8 *)(u8Addr + (u16Row+u16Index)));
           if(u16Index != (YSRAM_TENTAPE_NUM-1))
           {
               if(u8sramtype == SC_FILTER_Y_SRAM1)
               {
                   _pq_scram[u16Column][u16Index] = u8Ramcode[u16Index];
               }
               else if(u8sramtype == SC_FILTER_Y_SRAM2)
               {
                   _pq_scram[u16Column][u16Index+YSRAM_TENTAPE_NUM-1] =   (_pq_scram[u16Column][u16Index + YSRAM_TENTAPE_NUM - 1] & 0x0F)
                                                                         | ((MS_U8)((u8Ramcode[u16Index]<<4) & 0xF0));

                   _pq_scram[u16Column][u16Index+YSRAM_TENTAPE_NUM]   =   (_pq_scram[u16Column][u16Index + YSRAM_TENTAPE_NUM] & 0xF0)
                                                                      | ((MS_U8)((u8Ramcode[u16Index]>>4) & 0x0F));
               }
               else
               {
                   PQ_DUMP_FILTER_DBG(printf("[%s, %d] Not Y_SRAM1 nor Y_SRAM2 \n", __FUNC__, __LINE__));
               }
           }
           else
           {
               if(u8sramtype == SC_FILTER_Y_SRAM1)
               {
                   _pq_scram[u16Column][u16Index] =(_pq_scram[u16Column][u16Index] & 0xF0) | ( u8Ramcode[u16Index] & 0x0F);
               }
               else if(u8sramtype == SC_FILTER_Y_SRAM2)
               {
                   _pq_scram[u16Column][u16Index + YSRAM_TENTAPE_NUM - 1] =   (_pq_scram[u16Column][u16Index + YSRAM_TENTAPE_NUM - 1] & 0x0F)
                                                                         | ((MS_U8)((u8Ramcode[u16Index]<<4) & 0xF0));
               }
               else
               {
                   PQ_DUMP_FILTER_DBG(printf("[%s, %d] Not Y_SRAM1 nor Y_SRAM2 \n", __FUNC__, __LINE__));
               }
           }
        }
    }
    return TRUE;
}

MS_BOOL MHal_PQ_DS_Write_C_SRAM_TABLE(void *pInstance, void *pAddr, MS_U8 u8sramtype)
{
    MS_U16 u16Column = 0;
    MS_U16 u16Row = 0;
    MS_U16 u16Index = 0;
    MS_U8 u8Ramcode[8] = {0};
    MS_U8 *u8Addr = NULL;

    XC_AUTODOWNLOAD_DATA_INFO stDataInfo;
    XC_AUTODOWNLOAD_FORMAT_INFO stFormatInfo;
    memset(&stDataInfo,0,sizeof(XC_AUTODOWNLOAD_DATA_INFO));
    memset(&stFormatInfo,0,sizeof(XC_AUTODOWNLOAD_FORMAT_INFO));

    if(pAddr == NULL)
    {
        PQ_DUMP_FILTER_DBG(printf("[%s, %d] NULL pointer!! \n", __FUNC__, __LINE__));
        return FALSE;
    }

    u8Addr = (MS_U8*)pAddr;
    _gu64YCSramIndex[u8sramtype] = (MS_U64)u8Addr;

    for(u16Column = 0; u16Column < (XC_AUTODOWNLOAD_HVSP_DEPTH/2); u16Column++)
    {
        u16Row = u16Column * CSRAM_DATA_SIZE;
        for (u16Index = 0;u16Index < CSRAM_DATA_SIZE; u16Index++)
        {
            u8Ramcode[u16Index] = *((MS_U8 *)(u8Addr + (u16Row+u16Index)));
            if(u8sramtype == SC_FILTER_C_SRAM1)
            {
                _pq_scram[u16Column][CSRAM_DATA_OFFSET + u16Index] = u8Ramcode[u16Index];
            }
            else if(u8sramtype == SC_FILTER_C_SRAM2)
            {
                _pq_scram[u16Column + CSRAM_PHASE_OFFSET][CSRAM_DATA_OFFSET + u16Index] = u8Ramcode[u16Index];
            }
            else
            {
                PQ_DUMP_FILTER_DBG(printf("[%s, %d] Not CSRAM1 or CSRAM2 \n", __FUNC__, __LINE__));
            }
        }
    }

    if(u8sramtype == SC_FILTER_C_SRAM2)
    {
        stDataInfo.u32DataInfo_Version  = AUTODOWNLOAD_DATA_INFO_VERSION;
        stDataInfo.u16DataInfo_Length   = sizeof(XC_AUTODOWNLOAD_DATA_INFO);
        stDataInfo.enClient = E_XC_AUTODOWNLOAD_CLIENT_HVSP;
        stDataInfo.pu8Data  = &(_pq_scram[0][0]);

        stDataInfo.u32Size  = ((sizeof(MS_U8)) * XC_AUTODOWNLOAD_HVSP_WIDTH * XC_AUTODOWNLOAD_HVSP_DEPTH);
        stFormatInfo.bIsSecIdxValid = TRUE;
        stFormatInfo.u8AutoDownloadSecIdx = XC_AUTODOWNLAOD_HVSP_SECIDX_START;
        stDataInfo.pParam   = &stFormatInfo;
        if(MApi_XC_AutoDownload_Write(&stDataInfo) == E_APIXC_RET_OK)
        {
            if(MHal_PQ_Fire_HVSPXRule_ADL() == FALSE)
            {
                PQ_DUMP_FILTER_DBG(printf("[%s, %d] Fire ADL failed!!\n", __FUNC__, __LINE__));
                return FALSE;
            }
        }
        else
        {
            PQ_DUMP_FILTER_DBG(printf("[%s, %d] Write ADL failed!!\n", __FUNC__, __LINE__));
            return FALSE;
        }
    }
    return TRUE;
}

void Hal_PQ_set_c_sram_table(void *pInstance,MS_U8 u8sramtype, void *pData)
{
    MS_U16 i, j, x;
    MS_U8 u8Ramcode[8];
    MS_U8* u32Addr;
#if(SUPPORT_AUTODOWNLOAD_HVSP==FALSE)
    MS_U32 u32Data = 0;
#endif

#if(SUPPORT_AUTODOWNLOAD_HVSP==TRUE)
    XC_AUTODOWNLOAD_DATA_INFO stDataInfo;
    XC_AUTODOWNLOAD_FORMAT_INFO stFormatInfo;
    memset(&stDataInfo,0,sizeof(XC_AUTODOWNLOAD_DATA_INFO));
    memset(&stFormatInfo,0,sizeof(XC_AUTODOWNLOAD_FORMAT_INFO));
#endif
    if(u8sramtype != SC_FILTER_C_SRAM1 &&
       u8sramtype != SC_FILTER_C_SRAM2 &&
       u8sramtype != SC_FILTER_C_SRAM3 &&
       u8sramtype != SC_FILTER_C_SRAM4)
    {
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"Unknown c sram type %u\n", u8sramtype);
        return;
    }
     u32Addr = (MS_U8*)pData;
     _gu64YCSramIndex[u8sramtype] = (MS_U64)u32Addr;
#if(SUPPORT_AUTODOWNLOAD_HVSP==TRUE)
    for(i=0; i<XC_AUTODOWNLOAD_HVSP_DEPTH/2; i++)
    {
        j=i*CSRAM_DATA_SIZE;
        for ( x=0;x<CSRAM_DATA_SIZE;x++ )
        {
            u8Ramcode[x] = *((MS_U8 *)(u32Addr + (j+x)));
            if(u8sramtype == SC_FILTER_C_SRAM1)
            {
                _pq_scram[i][CSRAM_DATA_OFFSET+x] = u8Ramcode[x];
            }
            else if(u8sramtype == SC_FILTER_C_SRAM2)
            {
                _pq_scram[i+CSRAM_PHASE_OFFSET][CSRAM_DATA_OFFSET+x] = u8Ramcode[x];
            }
        }
    }
//========================================================================//
//  M7332 256bit Autodownload HVSP command format
//|-------------|--------------------------------------------------------|
//|             |                         256bit                         |
//|-------------|-------------|--------------|-------------|-------------|
//|             |    Dummy    | VSP_C(CSRAM1)| HSP_Y(SRAM2)| VSP_Y(SRAM1)|
//|-------------|-------------|--------------|-------------|-------------|
//|   row 0~63  |    16bit    |    40bit     |   100bit    |   100bit    |
//|-------------|-------------|--------------|-------------|-------------|
//|             |    Dummy    | HSP_C(CSRAM2)| HSP_Y(SRAM2)| VSP_Y(SRAM1)|
//|-------------|-------------|--------------|-------------|-------------|
//|  row 64~127 |    16bit    |    40bit     |   100bit    |   100bit    |
//|-------------|-------------|--------------|-------------|-------------|
    if(u8sramtype == SC_FILTER_C_SRAM2)
    {
        stDataInfo.u32DataInfo_Version  = AUTODOWNLOAD_DATA_INFO_VERSION;
        stDataInfo.u16DataInfo_Length   = sizeof(XC_AUTODOWNLOAD_DATA_INFO);
        stDataInfo.enClient = E_XC_AUTODOWNLOAD_CLIENT_HVSP;
        stDataInfo.pu8Data  = &(_pq_scram[0][0]);
        stDataInfo.u32Size  = sizeof(MS_U8)*XC_AUTODOWNLOAD_HVSP_WIDTH *XC_AUTODOWNLOAD_HVSP_DEPTH;
        stFormatInfo.bIsSecIdxValid = TRUE;
        stFormatInfo.u8AutoDownloadSecIdx = XC_AUTODOWNLAOD_HVSP_SECIDX_START;
        stDataInfo.pParam   = &stFormatInfo;
        if(MApi_XC_AutoDownload_Write(&stDataInfo) == E_APIXC_RET_OK)
        {
            if((MApi_XC_AutoDownload_Fire(E_XC_AUTODOWNLOAD_CLIENT_HVSP)) != E_APIXC_RET_OK)
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"Fire ADL failed!!Fail Type: AUTODOWNLOAD CLIENT HVSP\n");
            }
        }
        else
        {
            PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"Write ADL failed!!Fail Type: AUTODOWNLOAD CLIENT HVSP\n");
        }
        //add for mantis_1651726
        //reference mantis_1611367: Toggle VR_BK05_06[0]
        MHal_PQ_EnableCFDHSVPUpdate(ENABLE_CFD_HVSP_UPDATE);
        //add for mantis_1651726
    }
#else
    u32Data = MApi_XC_R2BYTEMSK(REG_SC_BK00_03_L, 0x1000);
    MApi_XC_W2BYTEMSK(REG_SC_BK00_03_L, 0x0000, 0x1000);
    MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0002, 0x0002); // enable c_sram_rw

    for(i=0; i<64; i++)
    {
        while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100);
        j=i*5;

        if(u8sramtype == SC_FILTER_C_SRAM1)
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, i, 0x01FF);
        else if(u8sramtype == SC_FILTER_C_SRAM2)
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (i|0x40), 0x01FF);
        else if(u8sramtype == SC_FILTER_C_SRAM3)
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (i|0x180), 0x01FF);
        else
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (i|0x1C0), 0x01FF);

        for ( x=0;x<5;x++ )
        {
            u8Ramcode[x] = *((MS_U8 *)(u32Addr + (j+x)));
            PQ_DUMP_FILTER_DBG(printf(" %02x ", u8Ramcode[x] ));
        }
        PQ_DUMP_FILTER_DBG(printf("\n"));

        MApi_XC_W2BYTEMSK(REG_SC_BK23_43_L, (((MS_U16)u8Ramcode[1])<<8|(MS_U16)u8Ramcode[0]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK23_44_L, (((MS_U16)u8Ramcode[3])<<8|(MS_U16)u8Ramcode[2]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK23_45_L, u8Ramcode[4], 0x00FF);

        // enable write
        MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100);
    }

    MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF);
    MApi_XC_W2BYTEMSK(REG_SC_BK00_03_L, u32Data, 0x1000);
#endif

    //for YMY test case
    if( SC_FILTER_C_SRAM1 == u8sramtype)
    {
        pu8CSRAM1_QMapAddr = (MS_U8*)pData;
    }
    else if( SC_FILTER_C_SRAM2 == u8sramtype)
    {
        pu8CSRAM2_QMapAddr = (MS_U8*)pData;
    }
    else if( SC_FILTER_C_SRAM3 == u8sramtype)
    {
        pu8CSRAM3_QMapAddr = (MS_U8*)pData;
    }
    else
    {
        pu8CSRAM4_QMapAddr = (MS_U8*)pData;
    }
}

void Hal_PQ_set_y_sram_table(void *pInstance,MS_U8 u8sramtype, void *pData)
{
#if 1
    MS_U16 i, j, x;
    //MS_U8 u8Ramcode[10];
    MS_U8 u8Ramcode[13];
    MS_U8* u32Addr;
#if(SUPPORT_AUTODOWNLOAD_HVSP==FALSE)
    MS_U32 u32Data = 0;
#endif

    if(u8sramtype != SC_FILTER_Y_SRAM1 &&
       u8sramtype != SC_FILTER_Y_SRAM2 &&
       u8sramtype != SC_FILTER_Y_SRAM3 &&
       u8sramtype != SC_FILTER_Y_SRAM4)
    {
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"Unknown y sram type %u\n", u8sramtype);
        return;
    }
    u32Addr = (MS_U8*)pData;
    _gu64YCSramIndex[u8sramtype] = (MS_U64)u32Addr;
#if(SUPPORT_AUTODOWNLOAD_HVSP==TRUE)
   for ( i=0; i<XC_AUTODOWNLOAD_HVSP_DEPTH; i++)
   {
      j=i*YSRAM_TENTAPE_NUM;
      for ( x=0;x<YSRAM_TENTAPE_NUM;x++ )
      {
          u8Ramcode[x] = *((MS_U8 *)(u32Addr + (j+x)));
          if(x!=(YSRAM_TENTAPE_NUM-1))
          {
              if(u8sramtype == SC_FILTER_Y_SRAM1)
              {
                  _pq_scram[i][x] = u8Ramcode[x];
              }
              else if(u8sramtype == SC_FILTER_Y_SRAM2)
              {
                  _pq_scram[i][x+YSRAM_TENTAPE_NUM-1] =   (_pq_scram[i][x+YSRAM_TENTAPE_NUM-1] & 0x0F)
                                                                        | ((MS_U8)((u8Ramcode[x]<<4) & 0xF0));
                  _pq_scram[i][x+YSRAM_TENTAPE_NUM]   =   (_pq_scram[i][x+YSRAM_TENTAPE_NUM] & 0xF0)
                                                                        | ((MS_U8)((u8Ramcode[x]>>4) & 0x0F));
              }
          }
          else
          {
              if(u8sramtype == SC_FILTER_Y_SRAM1)
              {
                  _pq_scram[i][x] =(_pq_scram[i][x] & 0xF0) | ( u8Ramcode[x] & 0x0F);
              }
              else if(u8sramtype == SC_FILTER_Y_SRAM2)
              {
                  _pq_scram[i][x+YSRAM_TENTAPE_NUM-1] =   (_pq_scram[i][x+YSRAM_TENTAPE_NUM-1] & 0x0F)
                                                                        | ((MS_U8)((u8Ramcode[x]<<4) & 0xF0));
              }
          }
       }
   }
#else

    u32Data = MApi_XC_R2BYTEMSK(REG_SC_BK00_03_L, 0x1000);
    MApi_XC_W2BYTEMSK(REG_SC_BK00_03_L, 0x0000, 0x1000);
    MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw
    for ( i=0; i<128; i++)
    {
        while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100);
        j=i*13;

        // address

        if(u8sramtype == SC_FILTER_Y_SRAM1)
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (0x0000|i), 0x01FF);
        else if(u8sramtype == SC_FILTER_Y_SRAM2)
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (0x0080|i), 0x01FF);
        else if(u8sramtype == SC_FILTER_Y_SRAM3)
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (0x0100|i), 0x01FF);
        else
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (0x0180|i), 0x01FF);

        for ( x=0;x<13;x++ )
        {
            u8Ramcode[x] = *((MS_U8 *)(u32Addr + (j+x)));
            PQ_DUMP_FILTER_DBG(printf(" %02x ", u8Ramcode[x] ));
        }
        PQ_DUMP_FILTER_DBG(printf("\n"));

        MApi_XC_W2BYTEMSK(REG_SC_BK23_43_L, (((MS_U16)u8Ramcode[1])<<8|(MS_U16)u8Ramcode[0]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK23_44_L, (((MS_U16)u8Ramcode[3])<<8|(MS_U16)u8Ramcode[2]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK23_45_L, (((MS_U16)u8Ramcode[5])<<8|(MS_U16)u8Ramcode[4]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK23_49_L, (((MS_U16)u8Ramcode[7])<<8|(MS_U16)u8Ramcode[6]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK23_4A_L, (((MS_U16)u8Ramcode[9])<<8|(MS_U16)u8Ramcode[8]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK23_4D_L, (((MS_U16)u8Ramcode[11])<<8 | (MS_U16)u8Ramcode[10]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK23_4E_L, (((MS_U16)u8Ramcode[12]&0x0F)), 0x000F);
        // enable write
        MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100);
    }
    MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF);
    MApi_XC_W2BYTEMSK(REG_SC_BK00_03_L, u32Data, 0x1000);
#endif
#else
    MS_U16 i, j, x;
    MS_U8 u8Ramcode[10];
    MS_U8* u32Addr;

    if(u8sramtype != SC_FILTER_Y_SRAM1 &&
       u8sramtype != SC_FILTER_Y_SRAM2 &&
       u8sramtype != SC_FILTER_Y_SRAM3 &&
       u8sramtype != SC_FILTER_Y_SRAM4)
    {
        printf("Unknown y sram type %u\n", u8sramtype);
        return;
    }

    u32Addr = (MS_U8 *)pData;
    MApi_XC_W2BYTEMSK(REG_SC_BK00_03_L, 0x0000, 0x1000);
    MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw
    for ( i=0; i<128; i++)
    {
        while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100);
            j=i*8;
        // address

        if(u8sramtype == SC_FILTER_Y_SRAM1)
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (0x0000|i), 0x01FF);
        else if(u8sramtype == SC_FILTER_Y_SRAM2)
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (0x0080|i), 0x01FF);
        else if(u8sramtype == SC_FILTER_Y_SRAM3)
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (0x0100|i), 0x01FF);
        else
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (0x0180|i), 0x01FF);

        for ( x=0;x<8;x++ )
        {
            u8Ramcode[x] = *((MS_U8 *)(u32Addr + (j+x)));
            PQ_DUMP_FILTER_DBG(printf(" %02x ", u8Ramcode[x] ));
        }
        PQ_DUMP_FILTER_DBG(printf("\n"));

        MApi_XC_W2BYTEMSK(REG_SC_BK23_43_L, (((MS_U16)u8Ramcode[1])<<8|(MS_U16)u8Ramcode[0]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK23_44_L, (((MS_U16)u8Ramcode[3])<<8|(MS_U16)u8Ramcode[2]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK23_45_L, (((MS_U16)u8Ramcode[5])<<8|(MS_U16)u8Ramcode[4]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK23_49_L, (((MS_U16)u8Ramcode[7])<<8|(MS_U16)u8Ramcode[6]), 0xFFFF);

        // enable write
        MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100);
    }
    MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF);
    MApi_XC_W2BYTEMSK(REG_SC_BK00_03_L, 0x1000, 0x1000);
#endif

    //for YMY test case
    if( SC_FILTER_Y_SRAM1 == u8sramtype)
    {
        pu8YSRAM1_QMapAddr = (MS_U8*)pData;
    }
    else if( SC_FILTER_Y_SRAM2 == u8sramtype)
    {
        pu8YSRAM2_QMapAddr = (MS_U8*)pData;
    }
    else if( SC_FILTER_Y_SRAM3 == u8sramtype)
    {
        pu8YSRAM3_QMapAddr = (MS_U8*)pData;
    }
    else
    {
        pu8YSRAM4_QMapAddr = (MS_U8*)pData;
    }
}

#if 0
void Hal_PQ_set_c_sram_table_Main2(void *pInstance,MS_U8 u8sramtype, void *pData)
{
    MS_U16 i, j, x;
    MS_U8 u8Ramcode[8];
    MS_U8* u32Addr;
    MS_U32 u32Data = 0;

    if(u8sramtype != SC_FILTER_C_SRAM1 &&
       u8sramtype != SC_FILTER_C_SRAM2 &&
       u8sramtype != SC_FILTER_C_SRAM3 &&
       u8sramtype != SC_FILTER_C_SRAM4)
    {
        printf("Unknown c sram type %u\n", u8sramtype);
        return;
    }
    u32Addr = (MS_U8*)pData;
    u32Data = MApi_XC_R2BYTEMSK(REG_SC_BK80_03_L, 0x1000);
    MApi_XC_W2BYTEMSK(REG_SC_BK80_03_L, 0x0000, 0x1000);
    MApi_XC_W2BYTEMSK(REG_SC_BKA3_41_L, 0x0002, 0x0002); // enable c_sram_rw

    for(i=0; i<64; i++)
    {
        while(MApi_XC_R2BYTE(REG_SC_BKA3_41_L) & 0x0100);
        j=i*5;

        if(u8sramtype == SC_FILTER_C_SRAM1)
            MApi_XC_W2BYTEMSK(REG_SC_BKA3_42_L, i, 0x01FF);
        else if(u8sramtype == SC_FILTER_C_SRAM2)
            MApi_XC_W2BYTEMSK(REG_SC_BKA3_42_L, (i|0x40), 0x01FF);
        else if(u8sramtype == SC_FILTER_C_SRAM3)
            MApi_XC_W2BYTEMSK(REG_SC_BKA3_42_L, (i|0x180), 0x01FF);
        else
            MApi_XC_W2BYTEMSK(REG_SC_BKA3_42_L, (i|0x1C0), 0x01FF);

        for ( x=0;x<5;x++ )
        {
            u8Ramcode[x] = *((MS_U8 *)(u32Addr + (j+x)));
            PQ_DUMP_FILTER_DBG(printf(" %02x ", u8Ramcode[x] ));
        }
        PQ_DUMP_FILTER_DBG(printf("\n"));

        MApi_XC_W2BYTEMSK(REG_SC_BKA3_43_L, (((MS_U16)u8Ramcode[1])<<8|(MS_U16)u8Ramcode[0]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BKA3_44_L, (((MS_U16)u8Ramcode[3])<<8|(MS_U16)u8Ramcode[2]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BKA3_45_L, u8Ramcode[4], 0x00FF);

        // enable write
        MApi_XC_W2BYTEMSK(REG_SC_BKA3_41_L, 0x0100, 0x0100);
    }

    MApi_XC_W2BYTEMSK(REG_SC_BKA3_41_L, 0x00, 0x00FF);
    MApi_XC_W2BYTEMSK(REG_SC_BK80_03_L, u32Data, 0x1000);

}

void Hal_PQ_set_y_sram_table_Main2(void *pInstance,MS_U8 u8sramtype, void *pData)
{
#if 0
    MS_U16 i, j, x;
    MS_U8 u8Ramcode[10];
    MS_U32 u32Addr;
    MS_U32 u32Data = 0;

    if(u8sramtype != SC_FILTER_Y_SRAM1 &&
       u8sramtype != SC_FILTER_Y_SRAM2 &&
       u8sramtype != SC_FILTER_Y_SRAM3 &&
       u8sramtype != SC_FILTER_Y_SRAM4)
    {
        printf("Unknown y sram type %u\n", u8sramtype);
        return;
    }

    u32Addr = (MS_U32)pData;
    u32Data = MApi_XC_R2BYTEMSK(REG_SC_BK00_03_L, 0x1000);
    MApi_XC_W2BYTEMSK(REG_SC_BK00_03_L, 0x0000, 0x1000);
    MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw
    for ( i=0; i<128; i++)
    {
        while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100);
        j=i*10;

        // address

        if(u8sramtype == SC_FILTER_Y_SRAM1)
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (0x0000|i), 0x01FF);
        else if(u8sramtype == SC_FILTER_Y_SRAM2)
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (0x0080|i), 0x01FF);
        else if(u8sramtype == SC_FILTER_Y_SRAM3)
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (0x0100|i), 0x01FF);
        else
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (0x0180|i), 0x01FF);

        for ( x=0;x<8;x++ )
        {
            u8Ramcode[x] = *((MS_U8 *)(u32Addr + (j+x)));
            PQ_DUMP_FILTER_DBG(printf(" %02x ", u8Ramcode[x] ));
        }
        for ( x=8;x<10;x++ )
        {
            u8Ramcode[x] = *((MS_U8 *)(u32Addr + (j+x)));
            PQ_DUMP_FILTER_DBG(printf(" %02x ", u8Ramcode[x] ));
        }
        PQ_DUMP_FILTER_DBG(printf("\n"));

        MApi_XC_W2BYTEMSK(REG_SC_BK23_43_L, (((MS_U16)u8Ramcode[1])<<8|(MS_U16)u8Ramcode[0]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK23_44_L, (((MS_U16)u8Ramcode[3])<<8|(MS_U16)u8Ramcode[2]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK23_45_L, (((MS_U16)u8Ramcode[5])<<8|(MS_U16)u8Ramcode[4]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK23_49_L, (((MS_U16)u8Ramcode[7])<<8|(MS_U16)u8Ramcode[6]), 0xFFFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK23_4A_L, (((MS_U16)u8Ramcode[9])<<8|(MS_U16)u8Ramcode[8]), 0xFFFF);

        // enable write
        MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100);
    }
    MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF);
    MApi_XC_W2BYTEMSK(REG_SC_BK00_03_L, u32Data, 0x1000);
#else
        MS_U16 i, j, x;
        MS_U8 u8Ramcode[10];
        MS_U8* u32Addr;

        if(u8sramtype != SC_FILTER_Y_SRAM1 &&
           u8sramtype != SC_FILTER_Y_SRAM2 &&
           u8sramtype != SC_FILTER_Y_SRAM3 &&
           u8sramtype != SC_FILTER_Y_SRAM4)
        {
            printf("Unknown y sram type %u\n", u8sramtype);
            return;
        }
        u32Addr = (MS_U8*)pData;
        MApi_XC_W2BYTEMSK(REG_SC_BK80_03_L, 0x0000, 0x1000);
        MApi_XC_W2BYTEMSK(REG_SC_BKA3_41_L, 0x0001, 0x0001); // enable y_sram_rw
         if((u8sramtype == SC_FILTER_Y_SRAM1) || (u8sramtype == SC_FILTER_Y_SRAM3))
         {
           // SRAM1  (128x40)
          for ( i=0; i<128; i++)
          {
             while(MApi_XC_R2BYTE(REG_SC_BKA3_41_L) & 0x0100);
             j=i*5;
             // address & sram select
            if(u8sramtype == SC_FILTER_Y_SRAM1)
            MApi_XC_W2BYTEMSK(REG_SC_BKA3_42_L, (0x0000|i), 0x01FF);
            else //if(u8sramtype == SC_FILTER_Y_SRAM3)
            MApi_XC_W2BYTEMSK(REG_SC_BKA3_42_L, (0x0100|i), 0x01FF);

            for ( x=0;x<5;x++ )
            {
                u8Ramcode[x] = *((MS_U8 *)(u32Addr + (j+x)));
                PQ_DUMP_FILTER_DBG(printf(" %02x ", u8Ramcode[x] ));
            }

            PQ_DUMP_FILTER_DBG(printf("\n"));

            MApi_XC_W2BYTEMSK(REG_SC_BKA3_43_L, (((MS_U16)u8Ramcode[1])<<8|(MS_U16)u8Ramcode[0]), 0xFFFF);
            MApi_XC_W2BYTEMSK(REG_SC_BKA3_44_L, (((MS_U16)u8Ramcode[3])<<8|(MS_U16)u8Ramcode[2]), 0xFFFF);
            MApi_XC_W2BYTEMSK(REG_SC_BKA3_45_L, ((MS_U16)u8Ramcode[4]), 0x00FF);

            // enable write
            MApi_XC_W2BYTEMSK(REG_SC_BKA3_41_L, 0x0100, 0x0100);
          }
        }
        else if((u8sramtype == SC_FILTER_Y_SRAM2) || (u8sramtype == SC_FILTER_Y_SRAM4))
        {
            // SRAM2  (128x60)
            for ( i=0; i<128; i++)
            {
             while(MApi_XC_R2BYTE(REG_SC_BKA3_41_L) & 0x0100);
             j=i*8;
             // address & sram select
             if(u8sramtype == SC_FILTER_Y_SRAM2)
             MApi_XC_W2BYTEMSK(REG_SC_BKA3_42_L, (0x0080|i), 0x01FF);
             else //if(u8sramtype == SC_FILTER_Y_SRAM4)
             MApi_XC_W2BYTEMSK(REG_SC_BKA3_42_L, (0x0180|i), 0x01FF);

             for ( x=0;x<8;x++ )
             {
               u8Ramcode[x] = *((MS_U8 *)(u32Addr + (j+x)));
               PQ_DUMP_FILTER_DBG(printf(" %02x ", u8Ramcode[x] ));
             }
                PQ_DUMP_FILTER_DBG(printf("\n"));

               MApi_XC_W2BYTEMSK(REG_SC_BKA3_43_L, (((MS_U16)u8Ramcode[1])<<8|(MS_U16)u8Ramcode[0]), 0xFFFF);
               MApi_XC_W2BYTEMSK(REG_SC_BKA3_44_L, (((MS_U16)u8Ramcode[3])<<8|(MS_U16)u8Ramcode[2]), 0xFFFF);
               MApi_XC_W2BYTEMSK(REG_SC_BKA3_45_L, (((MS_U16)u8Ramcode[5])<<8|(MS_U16)u8Ramcode[4]), 0xFFFF);
               MApi_XC_W2BYTEMSK(REG_SC_BKA3_49_L, (((MS_U16)u8Ramcode[7])<<8|(MS_U16)u8Ramcode[6]), 0x0FFF);

                // enable write
               MApi_XC_W2BYTEMSK(REG_SC_BKA3_41_L, 0x0100, 0x0100);
            }
         }
        MApi_XC_W2BYTEMSK(REG_SC_BKA3_41_L, 0x00, 0x00FF);
        MApi_XC_W2BYTEMSK(REG_SC_BK80_03_L, 0x1000, 0x1000);
#endif
}
#endif

void Hal_PQ_set_sram_color_index_table(void *pInstance,MS_U8 u8sramtype, void *pData)
{
    MS_U16 i;
    MS_U8 u8Ramcode;
    MS_U8* u32Addr;
    MS_U32 u32Data = 0;

    if(u8sramtype != SC_FILTER_SRAM_COLOR_INDEX)
    {
        return;
    }

    u32Addr = (MS_U8*)pData;
    u32Data = MApi_XC_R2BYTEMSK(REG_SC_BK00_03_L, 0x1000);
    MApi_XC_W2BYTEMSK(REG_SC_BK00_03_L, 0x0000, 0x1000);

    for(i=0; i<256; i++)
    {
        while(MApi_XC_R2BYTE(REG_SC_BK06_61_L) & 0x0100);

        MApi_XC_W2BYTEMSK(REG_SC_BK06_63_L, i, 0x00FF);
        u8Ramcode = *((MS_U8 *)(u32Addr + (i)));
        PQ_DUMP_FILTER_DBG(printf(" %02x\n", u8Ramcode ));

        MApi_XC_W2BYTEMSK(REG_SC_BK06_62_L, u8Ramcode, 0x0007);
        MApi_XC_W2BYTEMSK(REG_SC_BK06_61_L, 0x0100, 0x0100);
    }
    MApi_XC_W2BYTEMSK(REG_SC_BK00_03_L, u32Data, 0x1000);

}

void Hal_PQ_set_sram_color_gain_snr_table(void *pInstance,MS_U8 u8sramtype, void *pData)
{
    MS_U16 i;
    MS_U16 u16Ramcode;
    MS_U8* u32Addr;
    MS_U16 u16Gain_DNR;
    MS_U32 u32Data = 0;

    if(u8sramtype != SC_FILTER_SRAM_COLOR_GAIN_SNR)
    {
        return;
    }

    u32Addr = (MS_U8*)pData;
    u32Data = MApi_XC_R2BYTEMSK(REG_SC_BK00_03_L, 0x1000);
    MApi_XC_W2BYTEMSK(REG_SC_BK00_03_L, 0x0000, 0x1000);

    for(i=0; i<8; i++)
    {
        while(MApi_XC_R2BYTE(REG_SC_BK06_61_L) & 0x0200);

        MApi_XC_W2BYTEMSK(REG_SC_BK06_66_L, i, 0x00FF);

        u16Gain_DNR = MApi_XC_R2BYTE(REG_SC_BK06_65_L) & 0x001F;
        u16Ramcode = *((MS_U8 *)(u32Addr + (i)));
        u16Ramcode = u16Ramcode<<8|u16Gain_DNR;

        PQ_DUMP_FILTER_DBG(printf(" %02x\n", u16Ramcode ));

        MApi_XC_W2BYTEMSK(REG_SC_BK06_64_L, u16Ramcode, 0x1F1F);
        MApi_XC_W2BYTEMSK(REG_SC_BK06_61_L, 0x0200, 0x0200);
    }
    MApi_XC_W2BYTEMSK(REG_SC_BK00_03_L, u32Data, 0x1000);
}

#define ICC_H_SIZE	32
#define ICC_V_SIZE	32

#define ICC_MAX_SRAM_SIZE 0x124

#define SRAM1_ICC_COUNT 289//81
#define SRAM2_ICC_COUNT 272//72
#define SRAM3_ICC_COUNT 272//72
#define SRAM4_ICC_COUNT 256//64

#define SRAM1_ICC_OFFSET 0
#define SRAM2_ICC_OFFSET SRAM1_ICC_COUNT
#define SRAM3_ICC_OFFSET (SRAM2_ICC_OFFSET + SRAM2_ICC_COUNT)
#define SRAM4_ICC_OFFSET (SRAM3_ICC_OFFSET + SRAM3_ICC_COUNT)

#define SRAM_ICC_TOTAL_COUNT (SRAM1_ICC_COUNT + SRAM2_ICC_COUNT + SRAM3_ICC_COUNT + SRAM4_ICC_COUNT)

void _Hal_PQ_set_sram_icc_crd_table(void *pInstance,MS_U16 *pBuf, MS_U8 u8SRAM_Idx, MS_U16 u16Cnt)
{
    MS_U16 i;

    if(u8SRAM_Idx > 3)
    {
        u8SRAM_Idx = 0;
    }


    MApi_XC_W2BYTEMSK(REG_SC_BK1C_78_L, BIT(0), BIT(0)); // io_en disable
    MApi_XC_W2BYTEMSK(REG_SC_BK1C_78_L, u8SRAM_Idx<<1, BIT(2)|BIT(1)); // sram select

    for(i=0; i<u16Cnt; i++)
    {
        MApi_XC_W2BYTEMSK(REG_SC_BK1C_79_L, i, 0x01FF); // address[8:0]
        MApi_XC_W2BYTEMSK(REG_SC_BK1C_7A_L, pBuf[i], 0x01FF); //data[8:0]
        MApi_XC_W2BYTEMSK(REG_SC_BK1C_7A_L, BIT(15), BIT(15)); // io_w enable
    }
    MApi_XC_W2BYTEMSK(REG_SC_BK1C_78_L, 0, BIT(0)); // io_en enable
}

void Hal_PQ_set_sram_icc_crd_table(void *pInstance,MS_U8 u8sramtype, void *pData)
{
#if SUPPORT_AUTODOWNLOAD_ICC_IHC
    MS_U16* pu16ICCTable = NULL;
    MS_U16* u32Addr = (MS_U16*)pData;
    MS_U16 u16Index = 0 ;
    PQ_MALLOC_MEM(pu16ICCTable,(SRAM_ICC_TOTAL_COUNT * sizeof(MS_U16)));

    if(pu16ICCTable != NULL)
    {
        if((pData != NULL) && (u8sramtype == SC_FILTER_SRAM_ICC_CRD))
        {
            for (u16Index = 0;u16Index < SRAM_ICC_TOTAL_COUNT ; u16Index++)
            {
                if (u16Index < SRAM2_ICC_OFFSET)
                {
                    pu16ICCTable[u16Index] = (u32Addr[u16Index]);
                }
                else if (u16Index < SRAM3_ICC_OFFSET)
                {
                    pu16ICCTable[u16Index] = (u32Addr[u16Index]);
                }
                else if (u16Index < SRAM4_ICC_OFFSET)
                {
                    pu16ICCTable[u16Index] = (u32Addr[u16Index]);
                }
                else
                {
                    pu16ICCTable[u16Index] = (u32Addr[u16Index]);
                }
            }
            XC_AUTODOWNLOAD_DATA_INFO stDataInfo;
            XC_AUTODOWNLOAD_FORMAT_INFO stFormatInfo;
            memset(&stDataInfo,0,sizeof(XC_AUTODOWNLOAD_DATA_INFO));
            memset(&stFormatInfo,0,sizeof(XC_AUTODOWNLOAD_FORMAT_INFO));
            stFormatInfo.u32FormatInfo_Version = AUTODOWNLOAD_FORMAT_INFO_VERSION;
            stFormatInfo.u16FormatInfo_Length = sizeof(XC_AUTODOWNLOAD_FORMAT_INFO);
            stFormatInfo.enSubClient = E_XC_AUTODOWNLOAD_ICC_IHC_SUB_ICC;

            stDataInfo.u32DataInfo_Version  = AUTODOWNLOAD_DATA_INFO_VERSION;
            stDataInfo.u16DataInfo_Length   = sizeof(XC_AUTODOWNLOAD_DATA_INFO);
            stDataInfo.enClient = E_XC_AUTODOWNLOAD_CLIENT_ICC_IHC;
            stDataInfo.pu8Data  = (MS_U8*)pu16ICCTable;
            stDataInfo.u32Size  = sizeof(MS_U16)*SRAM_ICC_TOTAL_COUNT;
            stDataInfo.pParam   = &stFormatInfo;
            if(MApi_XC_AutoDownload_Write(&stDataInfo) != E_APIXC_RET_OK)
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"Write ADL failed!!Fail Type: AUTODOWNLOAD CLIENT ICC IHC\n");
            }
            _bICCWrited = TRUE;
            Hal_PQ_ICC_IHC_FireADL();
        }
        else
        {
            PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"ICC data/sram is invalid\n");
        }
        PQ_FREE_MEM(pu16ICCTable,(SRAM_ICC_TOTAL_COUNT * sizeof(MS_U16)));
    }
#else
    if(u8sramtype != SC_FILTER_SRAM_ICC_CRD)
    {
        return;
    }
    MS_U16* SRAM1_ICC = (MS_U16*) malloc(sizeof(MS_U16)*ICC_MAX_SRAM_SIZE);
    MS_U16* SRAM2_ICC = (MS_U16*) malloc(sizeof(MS_U16)*ICC_MAX_SRAM_SIZE);
    MS_U16* SRAM3_ICC = (MS_U16*) malloc(sizeof(MS_U16)*ICC_MAX_SRAM_SIZE);
    MS_U16* SRAM4_ICC = (MS_U16*) malloc(sizeof(MS_U16)*ICC_MAX_SRAM_SIZE);

    if(SRAM1_ICC == NULL || SRAM2_ICC == NULL || SRAM3_ICC == NULL || SRAM4_ICC ==NULL)
    {
        if(SRAM1_ICC != NULL)
        {
            free(SRAM1_ICC);
        }
        if(SRAM2_ICC != NULL)
        {
            free(SRAM2_ICC);
        }
        if(SRAM3_ICC != NULL)
        {
            free(SRAM3_ICC);
        }
        if(SRAM4_ICC != NULL)
        {
            free(SRAM4_ICC);
        }
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"SRAM_ICC malloc fail\n");
        return;
    }

    MS_U16* u32Addr = (MS_U16*)pData;
    MS_U16 u16Index = 0 ;
    MS_U16 cont1=0, cont2=0, cont3=0, cont4=0;

//    printf("[%s]SRAM_IHC_TOTAL_COUNT=%u,SRAM2_IHC_OFFSET=%u,SRAM3_IHC_OFFSET=%u,SRAM4_IHC_OFFSET=%u\n",
//        __FUNCTION__,SRAM_IHC_TOTAL_COUNT,SRAM2_IHC_OFFSET,SRAM3_IHC_OFFSET,SRAM4_IHC_OFFSET);

    for (;u16Index < SRAM_ICC_TOTAL_COUNT ; u16Index++)
    {
        if (u16Index < SRAM2_ICC_OFFSET)
        {
            SRAM1_ICC[cont1] = (u32Addr[u16Index]);
//            printf("@@SRAM1_IHC[%u]=%x\n",cont1,(u32Addr[u16Index]));
            cont1++;
        }
        else if (u16Index < SRAM3_ICC_OFFSET)
        {
            SRAM2_ICC[cont2] = (u32Addr[u16Index]);
//            printf("@@SRAM2_IHC[%u]=%x\n",cont2,(u32Addr[u16Index]));
            cont2++;

        }
        else if (u16Index < SRAM4_ICC_OFFSET)
        {
            SRAM3_ICC[cont3] = (u32Addr[u16Index]);
//            printf("@@SRAM3_IHC[%u]=%x\n",cont3,(u32Addr[u16Index]));
            cont3++;
        }
        else
        {
            SRAM4_ICC[cont4] = (u32Addr[u16Index]);
//            printf("@@SRAM4_IHC[%u]=%x\n",cont4,(u32Addr[u16Index]));
            cont4++;
        }
    }

    _Hal_PQ_set_sram_icc_crd_table(pInstance, SRAM1_ICC, 0, SRAM1_ICC_COUNT);
    _Hal_PQ_set_sram_icc_crd_table(pInstance, SRAM2_ICC, 1, SRAM2_ICC_COUNT);
    _Hal_PQ_set_sram_icc_crd_table(pInstance, SRAM3_ICC, 2, SRAM3_ICC_COUNT);
    _Hal_PQ_set_sram_icc_crd_table(pInstance, SRAM4_ICC, 3, SRAM4_ICC_COUNT);

    free(SRAM1_ICC);
    free(SRAM2_ICC);
    free(SRAM3_ICC);
    free(SRAM4_ICC);
#endif
}

void Hal_PQ_get_sram_icc_crd_table(void *pInstance,MS_U8 u8SRAM_Idx, MS_U8 *pBuf)
{
	MS_U16 i;
    MS_U16 u16Size;

    if(u8SRAM_Idx > 3)
	{
        u8SRAM_Idx = 0;
	}


	MApi_XC_W2BYTEMSK(REG_SC_BK1C_78_L, BIT(0), BIT(0)); // io_en disable

    switch(u8SRAM_Idx)
    {
        case 0:
            u16Size = SRAM1_ICC_COUNT;
            break;
        case 1:
            u16Size = SRAM2_ICC_COUNT;
            break;
        case 2:
            u16Size = SRAM3_ICC_COUNT;
            break;
        case 3:
            u16Size = SRAM4_ICC_COUNT;
            break;
    }
    MApi_XC_W2BYTEMSK(REG_SC_BK1C_78_L, u8SRAM_Idx<<1, BIT(2)|BIT(1)); // sram select

    for(i=0; i<u16Size; i++)
    {
        MApi_XC_W2BYTEMSK(REG_SC_BK1C_79_L, i, 0x01FF); // address[8:0]
        MApi_XC_W2BYTEMSK(REG_SC_BK1C_79_L, BIT(15), BIT(15)); // io_R enable
        MsOS_DelayTaskUs(1);

        pBuf[i] = MApi_XC_R2BYTEMSK(REG_SC_BK1C_7B_L, 0x01FF); //data[8:0]
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"ICC_CRD_Data[%d]=%x\n", i, pBuf[i]);
    }
    MApi_XC_W2BYTEMSK(REG_SC_BK1C_78_L, 0, BIT(0)); // io_en enable
}

#define IHC_H_SIZE	33
#define IHC_V_SIZE	33
#define BUF_BYTE_SIZE (IHC_H_SIZE*IHC_V_SIZE)
#define MAX_SRAM_SIZE 0x124

#define SRAM1_IHC_COUNT 289//81
#define SRAM2_IHC_COUNT 272//72
#define SRAM3_IHC_COUNT 272//72
#define SRAM4_IHC_COUNT 256//64

#define SRAM1_IHC_OFFSET 0
#define SRAM2_IHC_OFFSET SRAM1_IHC_COUNT
#define SRAM3_IHC_OFFSET (SRAM2_IHC_OFFSET + SRAM2_IHC_COUNT)
#define SRAM4_IHC_OFFSET (SRAM3_IHC_OFFSET + SRAM3_IHC_COUNT)

#define SRAM_IHC_TOTAL_COUNT (SRAM1_IHC_COUNT + SRAM2_IHC_COUNT + SRAM3_IHC_COUNT + SRAM4_IHC_COUNT)

void _Hal_PQ_set_sram_ihc_crd_table(void *pInstance,MS_U16 *pBuf, MS_U8 u8SRAM_Idx, MS_U16 u16Cnt)
{
    MS_U16 i;

    if(u8SRAM_Idx > 3)
    {
        u8SRAM_Idx = 0;
    }


    MApi_XC_W2BYTEMSK(REG_SC_BK1C_7C_L, BIT(0), BIT(0)); // io_en disable
    MApi_XC_W2BYTEMSK(REG_SC_BK1C_7C_L, u8SRAM_Idx<<1, BIT(2)|BIT(1)); // sram select

    for(i=0; i<u16Cnt; i++)
    {
        MApi_XC_W2BYTEMSK(REG_SC_BK1C_7D_L, i, 0x01FF); // address[8:0]
        MApi_XC_W2BYTEMSK(REG_SC_BK1C_7E_L, pBuf[i], 0x01FF); //data[8:0]
        MApi_XC_W2BYTEMSK(REG_SC_BK1C_7E_L, BIT(15), BIT(15)); // io_w enable
    }
    MApi_XC_W2BYTEMSK(REG_SC_BK1C_7C_L, 0, BIT(0)); // io_en enable
}

void Hal_PQ_set_sram_ihc_crd_table(void *pInstance,MS_U8 u8sramtype, void *pData)
{
#if SUPPORT_AUTODOWNLOAD_ICC_IHC
    MS_U16* pu16IHCTable = NULL;
    MS_U16* u32Addr = (MS_U16*)pData;
    MS_U16 u16Index = 0 ;
    PQ_MALLOC_MEM(pu16IHCTable,(SRAM_IHC_TOTAL_COUNT * sizeof(MS_U16)));

    if(pu16IHCTable != NULL)
    {
        if((pData != NULL) && (u8sramtype == SC_FILTER_SRAM_IHC_CRD))
        {
            for (u16Index = 0;u16Index < SRAM_IHC_TOTAL_COUNT ; u16Index++)
            {
                if (u16Index < SRAM2_IHC_OFFSET)
                {
                    pu16IHCTable[u16Index] = (u32Addr[u16Index]);
                }
                else if (u16Index < SRAM3_IHC_OFFSET)
                {
                    pu16IHCTable[u16Index] = (u32Addr[u16Index]);
                }
                else if (u16Index < SRAM4_IHC_OFFSET)
                {
                    pu16IHCTable[u16Index] = (u32Addr[u16Index]);
                }
                else
                {
                    pu16IHCTable[u16Index] = (u32Addr[u16Index]);
                }
            }
            XC_AUTODOWNLOAD_DATA_INFO stDataInfo;
            XC_AUTODOWNLOAD_FORMAT_INFO stFormatInfo;
            memset(&stDataInfo,0,sizeof(XC_AUTODOWNLOAD_DATA_INFO));
            memset(&stFormatInfo,0,sizeof(XC_AUTODOWNLOAD_FORMAT_INFO));
            stFormatInfo.u32FormatInfo_Version = AUTODOWNLOAD_FORMAT_INFO_VERSION;
            stFormatInfo.u16FormatInfo_Length = sizeof(XC_AUTODOWNLOAD_FORMAT_INFO);
            stFormatInfo.enSubClient = E_XC_AUTODOWNLOAD_ICC_IHC_SUB_IHC;

            stDataInfo.u32DataInfo_Version  = AUTODOWNLOAD_DATA_INFO_VERSION;
            stDataInfo.u16DataInfo_Length   = sizeof(XC_AUTODOWNLOAD_DATA_INFO);
            stDataInfo.enClient = E_XC_AUTODOWNLOAD_CLIENT_ICC_IHC;
            stDataInfo.pu8Data  = (MS_U8*)pu16IHCTable;
            stDataInfo.u32Size  = sizeof(MS_U16)*SRAM_IHC_TOTAL_COUNT;
            stDataInfo.pParam   = &stFormatInfo;
            if(MApi_XC_AutoDownload_Write(&stDataInfo) != E_APIXC_RET_OK)
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"Write ADL failed!!Fail Type: AUTODOWNLOAD CLIENT ICC IHC\n");
            }
            _bIHCWrited = TRUE;
            Hal_PQ_ICC_IHC_FireADL();
        }
        else
        {
            PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"IHC data/sram is invalid\n");
        }
        PQ_FREE_MEM(pu16IHCTable,(SRAM_IHC_TOTAL_COUNT * sizeof(MS_U16)));
    }
#else
    if(u8sramtype != SC_FILTER_SRAM_IHC_CRD)
    {
        return;
    }
    MS_U16* SRAM1_IHC = (MS_U16*) malloc(sizeof(MS_U16)*MAX_SRAM_SIZE);
    MS_U16* SRAM2_IHC = (MS_U16*) malloc(sizeof(MS_U16)*MAX_SRAM_SIZE);
    MS_U16* SRAM3_IHC = (MS_U16*) malloc(sizeof(MS_U16)*MAX_SRAM_SIZE);
    MS_U16* SRAM4_IHC = (MS_U16*) malloc(sizeof(MS_U16)*MAX_SRAM_SIZE);

   if(SRAM1_IHC == NULL || SRAM2_IHC == NULL || SRAM3_IHC == NULL || SRAM4_IHC ==NULL)
    {
        if(SRAM1_IHC != NULL)
        {
            free(SRAM1_IHC);
        }
        if(SRAM2_IHC != NULL)
        {
            free(SRAM2_IHC);
        }
        if(SRAM3_IHC != NULL)
        {
            free(SRAM3_IHC);
        }
        if(SRAM4_IHC != NULL)
        {
            free(SRAM4_IHC);
        }
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"SRAM_IHC malloc fail\n");
        return;
    }
    MS_U16* u32Addr = (MS_U16*)pData;
    MS_U16 u16Index = 0 ;
    MS_U16 cont1=0, cont2=0, cont3=0, cont4=0;

//    printf("[%s]SRAM_IHC_TOTAL_COUNT=%u,SRAM2_IHC_OFFSET=%u,SRAM3_IHC_OFFSET=%u,SRAM4_IHC_OFFSET=%u\n",
//        __FUNCTION__,SRAM_IHC_TOTAL_COUNT,SRAM2_IHC_OFFSET,SRAM3_IHC_OFFSET,SRAM4_IHC_OFFSET);

    for (;u16Index < SRAM_IHC_TOTAL_COUNT ; u16Index++)
    {
        if (u16Index < SRAM2_IHC_OFFSET)
        {
            SRAM1_IHC[cont1] = (u32Addr[u16Index]);
//            printf("@@SRAM1_IHC[%u]=%lx\n",cont1,(u32Addr[u16Index]));
            cont1++;
        }
        else if (u16Index < SRAM3_IHC_OFFSET)
        {
            SRAM2_IHC[cont2] = (u32Addr[u16Index]);
//            printf("@@SRAM2_IHC[%u]=%lx\n",cont2,(u32Addr[u16Index]));
            cont2++;

        }
        else if (u16Index < SRAM4_IHC_OFFSET)
        {
            SRAM3_IHC[cont3] = (u32Addr[u16Index]);
//            printf("@@SRAM3_IHC[%u]=%lx\n",cont3,(u32Addr[u16Index]));
            cont3++;
        }
        else
        {
            SRAM4_IHC[cont4] = (u32Addr[u16Index]);
//            printf("@@SRAM4_IHC[%u]=%lx\n",cont4,(u32Addr[u16Index]));
            cont4++;
        }
    }

    _Hal_PQ_set_sram_ihc_crd_table(pInstance, SRAM1_IHC, 0, SRAM1_IHC_COUNT);
    _Hal_PQ_set_sram_ihc_crd_table(pInstance, SRAM2_IHC, 1, SRAM2_IHC_COUNT);
    _Hal_PQ_set_sram_ihc_crd_table(pInstance, SRAM3_IHC, 2, SRAM3_IHC_COUNT);
    _Hal_PQ_set_sram_ihc_crd_table(pInstance, SRAM4_IHC, 3, SRAM4_IHC_COUNT);

    free(SRAM1_IHC);
    free(SRAM2_IHC);
    free(SRAM3_IHC);
    free(SRAM4_IHC);
#endif
}

void Hal_PQ_get_sram_ihc_crd_table(void *pInstance,MS_U8 u8SRAM_Idx, MS_U8 *pBuf)
{
    MS_U16 i;
    MS_U16 u16Size;

    if(u8SRAM_Idx > 3)
    {
        u8SRAM_Idx = 0;
    }


    MApi_XC_W2BYTEMSK(REG_SC_BK1C_7C_L, BIT(0), BIT(0)); // io_en disable

    switch(u8SRAM_Idx)
    {
        case 0:
            u16Size = SRAM1_IHC_COUNT;
            break;
        case 1:
            u16Size = SRAM2_IHC_COUNT;
            break;
        case 2:
            u16Size = SRAM3_IHC_COUNT;
            break;
        case 3:
            u16Size = SRAM4_IHC_COUNT;
            break;
    }
    MApi_XC_W2BYTEMSK(REG_SC_BK1C_7C_L, u8SRAM_Idx<<1, BIT(2)|BIT(1)); // sram select

    for(i=0; i<u16Size; i++)
    {
        MApi_XC_W2BYTEMSK(REG_SC_BK1C_7D_L, i, 0x01FF); // address[8:0]
        MApi_XC_W2BYTEMSK(REG_SC_BK1C_7D_L, BIT(15), BIT(15)); // io_R enable
        MsOS_DelayTaskUs(1);

        pBuf[i] = MApi_XC_R2BYTEMSK(REG_SC_BK1C_7F_L, 0x01FF); //data[8:0]
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"IHC_CRD_Data[%d]=%x\n", i, pBuf[i]);
    }
    MApi_XC_W2BYTEMSK(REG_SC_BK1C_7C_L, 0, BIT(0)); // io_en enable
}


void Hal_PQ_set_sram_color_gain_dnr_table(void *pInstance,MS_U8 u8sramtype, void *pData)
{
    MS_U16 i;
    MS_U16 u16Ramcode;
    MS_U8* u32Addr;
    MS_U16 u16Gain_SNR;
    MS_U32 u32Data = 0;

    if(u8sramtype != SC_FILTER_SRAM_COLOR_GAIN_DNR)
    {
        return;
    }

    u32Addr = (MS_U8*)pData;

    u32Data = MApi_XC_R2BYTEMSK(REG_SC_BK00_03_L, 0x1000);
    MApi_XC_W2BYTEMSK(REG_SC_BK00_03_L, 0x0000, 0x1000);

    for(i=0; i<8; i++)
    {
        while(MApi_XC_R2BYTE(REG_SC_BK06_61_L) & 0x0200);

        MApi_XC_W2BYTEMSK(REG_SC_BK06_66_L, i, 0x00FF);

        u16Gain_SNR = MApi_XC_R2BYTE(REG_SC_BK06_65_L) & 0x1F00;
        u16Ramcode = *((MS_U8 *)(u32Addr + (i)));
        u16Ramcode = u16Gain_SNR | u16Ramcode;

        PQ_DUMP_FILTER_DBG(printf(" %02x\n", u16Ramcode ));

        MApi_XC_W2BYTEMSK(REG_SC_BK06_64_L, u16Ramcode, 0x1F1F);
        MApi_XC_W2BYTEMSK(REG_SC_BK06_61_L, 0x0200, 0x0200);
    }
    MApi_XC_W2BYTEMSK(REG_SC_BK00_03_L, u32Data, 0x1000);
}


MS_U16 Hal_PQ_get_hnonlinear_idx(void *pInstance,MS_HNONLINEAR_TYPE etype)
{
    MS_U16 u16ret;

    switch(etype)
    {
    case MS_HNONLINEAR_3840_0:
        u16ret = PQ_IP_HnonLinear_H_3840_1_Main;
        break;

    case MS_HNONLINEAR_3840_1:
        u16ret = PQ_IP_HnonLinear_H_3840_2_Main;
        break;

    case MS_HNONLINEAR_3840_2:
        u16ret = PQ_IP_HnonLinear_H_3840_3_Main;
        break;

    case MS_HNONLINEAR_3840_3:
        u16ret = PQ_IP_HnonLinear_H_3840_4_Main;
        break;

    case MS_HNONLINEAR_1920_0:
        u16ret = PQ_IP_HnonLinear_H_1920_0_Main;
        break;

    case MS_HNONLINEAR_1920_1:
        u16ret = PQ_IP_HnonLinear_H_1920_1_Main;
        break;

    case MS_HNONLINEAR_1920_2:
        u16ret = PQ_IP_HnonLinear_H_1920_2_Main;
        break;

    case MS_HNONLINEAR_1366_0:
        u16ret = PQ_IP_HnonLinear_H_1366_0_Main;
        break;

    case MS_HNONLINEAR_1366_1:
        u16ret = PQ_IP_HnonLinear_H_1366_1_Main;
        break;

    case MS_HNONLINEAR_1366_2:
        u16ret = PQ_IP_HnonLinear_H_1366_2_Main;
        break;

    case MS_HNONLINEAR_1440:
        u16ret = PQ_IP_HnonLinear_H_1440_Main;
        break;

    case MS_HNONLINEAR_1680:
        u16ret = PQ_IP_HnonLinear_H_1680_Main;
        break;

    default:
        u16ret = PQ_IP_HnonLinear_OFF_Main;
        break;
    }
    return u16ret;
}

MS_U16 Hal_PQ_get_sram_size(void *pInstance,MS_U16 u16sramtype)
{
    MS_U16 u16ret;

    switch(u16sramtype)
    {
    case SC_FILTER_Y_SRAM1:
        u16ret = PQ_IP_SRAM1_SIZE_Main;
        break;

    case SC_FILTER_Y_SRAM2:
        u16ret = PQ_IP_SRAM2_SIZE_Main;
        break;

    case SC_FILTER_Y_SRAM3:
        u16ret = PQ_IP_SRAM3_SIZE_Main;
        break;

    case SC_FILTER_Y_SRAM4:
        u16ret = PQ_IP_SRAM4_SIZE_Main;
        break;

    case SC_FILTER_C_SRAM1:
        u16ret = PQ_IP_C_SRAM1_SIZE_Main;
        break;

    case SC_FILTER_C_SRAM2:
        u16ret = PQ_IP_C_SRAM2_SIZE_Main;
        break;

    case SC_FILTER_C_SRAM3:
        u16ret = PQ_IP_C_SRAM3_SIZE_Main;
        break;

    case SC_FILTER_C_SRAM4:
        u16ret = PQ_IP_C_SRAM4_SIZE_Main;
        break;

    case SC_FILTER_SRAM_COLOR_INDEX:
        u16ret = PQ_IP_SRAM_COLOR_INDEX_SIZE_Main;
        break;
#if 0
    case SC_FILTER_SRAM_COLOR_GAIN_SNR:
        u16ret = PQ_IP_SRAM_COLOR_GAIN_SNR_SIZE_Main;
        break;

    case SC_FILTER_SRAM_COLOR_GAIN_DNR:
        u16ret = PQ_IP_SRAM_COLOR_GAIN_DNR_SIZE_Main;
        break;
#endif

    default:
        u16ret = 0;
        break;
    }

    return u16ret;
}

void Hal_PQ_OPWriteOff_Enable(void *pInstance,MS_BOOL bEna)
{
    MApi_XC_W2BYTEMSK(REG_SC_BK12_27_L, bEna, BIT(0));
}

MS_U16 Hal_PQ_get_rw_method(void *pInstance,MS_BOOL bMainWin)
{
    MS_U16 u16method;
    if(bMainWin)
    {
        u16method  = (MApi_XC_R2BYTE(REG_SC_BK01_21_L) & 0xC000);
    }
    else
    {
        u16method  = (MApi_XC_R2BYTE(REG_SC_BK03_21_L) & 0xC000);
    }
    return u16method;
}

void Hal_PQ_set_sram_xvycc_gamma_table(void *pInstance,MS_U8 u8sramtype, void *pData)
{
#if defined(PQ_DUMP_XVYCC_GAMMA_SRAM)&&(PQ_DUMP_XVYCC_GAMMA_SRAM == 1)
    MS_U16 i;
    MS_U16 u16SRamcode;
    MS_U16 u16Count = 0 ;
    MS_U8* u8Addr = (MS_U8*) pData;

    if(u8sramtype != SC_FILTER_SRAM_XVYCC_DE_GAMMA &&
       u8sramtype != SC_FILTER_SRAM_XVYCC_GAMMA )
    {
        return;
    }

    if (u8sramtype == SC_FILTER_SRAM_XVYCC_DE_GAMMA)
    {
        MS_U32 u32InputData;
        MS_U32 u32XVYCC_DGT_DATA;
        MS_U16 u16SRamCode_L, u16SRamCode_H;
        MS_U16 u16WriteCount = 0;

        while (MApi_XC_R2BYTE(REG_SC_BK2D_60_L) & BIT(3)){;} // waiting ready
        //printf("REG_SC_BK2D_60_L=%X\n", MApi_XC_R2BYTE(REG_SC_BK2D_60_L) );

        // RGB write together and write one time for clear write bit.
        //MApi_XC_W2BYTEMSK(REG_SC_BK2D_60_L, BIT(5) | BIT(6), BIT(5) | BIT(6) ); // io_en disable
        MApi_XC_W2BYTEMSK(REG_SC_BK2D_60_L, BIT(5) | BIT(6), 0xF8 ); // io_en disable


        for( i = 0; i < 1803; i += 3 )
        {
            u32InputData = ((MS_U16)u8Addr[i+2]<<16)|((MS_U16)u8Addr[i+1]<<8)|((MS_U16)u8Addr[i]);
            u32XVYCC_DGT_DATA = u32InputData&0x7FFFF; // 19bis

            u16SRamCode_L = u32XVYCC_DGT_DATA&0xFFFF;
            u16SRamCode_H = u32XVYCC_DGT_DATA>>16;

            // waiting ready.
            while (MApi_XC_R2BYTE(REG_SC_BK2D_60_L) & BIT(3)){;}

            MApi_XC_W2BYTE(REG_SC_BK2D_61_L, u16WriteCount); // address
            u16WriteCount += 1;
            MApi_XC_W2BYTE(REG_SC_BK2D_63_L, u16SRamCode_H); //data
            MApi_XC_W2BYTE(REG_SC_BK2D_62_L, u16SRamCode_L); //data
            MApi_XC_W2BYTEMSK(REG_SC_BK2D_60_L,  0x60, 0x60); // Select All Channel
            MApi_XC_W2BYTEMSK(REG_SC_BK2D_60_L, BIT(3), BIT(3)); // io_w enable
        }

        while (MApi_XC_R2BYTE(REG_SC_BK2D_60_L) & BIT(3)){;}

        MApi_XC_W2BYTE(REG_SC_BK2D_60_L, 0 ); // Disable Write
    }
    else
    {
        u16Count = PQ_IP_LinearRGB_GAMMA_SRAM_SIZE_Main >> 1;

        // address port initial as 0
        MApi_XC_W2BYTE(REG_SC_BK25_79_L, 0x0 );
        // pre set value
        MApi_XC_W2BYTE(REG_SC_BK25_7A_L, 0x0 );

        // RGB write together and write one time for clear write bit.
        MApi_XC_W2BYTEMSK(REG_SC_BK25_78_L, BIT(3) | BIT(5) | BIT(6) , BIT(3) | BIT(5) | BIT(6) ); // io_en disable


        for(i=0; i<u16Count; i++)
        {
            u16SRamcode = u8Addr[i*2] | u8Addr[i*2+1] << 8;

            // waiting ready.
            while (MApi_XC_R2BYTE(REG_SC_BK25_78_L) & BIT(3));

            MApi_XC_W2BYTE(REG_SC_BK25_79_L, i); // address
            MApi_XC_W2BYTE(REG_SC_BK25_7A_L, u16SRamcode); //data
            MApi_XC_W2BYTEMSK(REG_SC_BK25_78_L, BIT(3), BIT(3)); // io_w enable

        }

        MApi_XC_W2BYTE(REG_SC_BK25_78_L, 0 ); // io_en enable
    }
#endif
}

MS_U16 Hal_PQ_get_dnr_whole_reg(void *UNUSED_PQ(pInstance), MS_BOOL bMainWin)
{
    MS_U16 u16val;
    if (bMainWin)
    {
        u16val = (MS_U16)(MApi_XC_R2BYTE(REG_SC_BK06_21_L) & 0xFFFF);
    }
    else
    {
        u16val = (MS_U16)(MApi_XC_R2BYTE(REG_SC_BK06_01_L) & 0xFFFF);
    }
    return u16val;
}

void Hal_PQ_set_rw_method(void *pInstance,MS_BOOL bMainWin, MS_U16 u16method)
{
   if(bMainWin)
    {
        MApi_XC_W2BYTEMSK(REG_SC_BK01_21_L, u16method, 0xC000);
    }
    else
    {
        MApi_XC_W2BYTEMSK(REG_SC_BK03_21_L, u16method, 0xC000);
    }

}

void Hal_PQ_set_xvycc_matrix_coefficient(void *pInstance,MS_S32 pData[][3], MS_BOOL bMainWin)
{
    if (bMainWin)
    {
        MApi_XC_W2BYTEMSK(REG_SC_BK25_02_L, pData[0][0], 0x1FFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK25_03_L, pData[0][1], 0x1FFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK25_04_L, pData[0][2], 0x1FFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK25_05_L, pData[1][0], 0x1FFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK25_06_L, pData[1][1], 0x1FFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK25_07_L, pData[1][2], 0x1FFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK25_08_L, pData[2][0], 0x1FFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK25_09_L, pData[2][1], 0x1FFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK25_0A_L, pData[2][2], 0x1FFF);
    }
    else
    {
        MApi_XC_W2BYTEMSK(REG_SC_BK25_12_L, pData[0][0], 0x1FFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK25_13_L, pData[0][1], 0x1FFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK25_14_L, pData[0][2], 0x1FFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK25_15_L, pData[1][0], 0x1FFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK25_16_L, pData[1][1], 0x1FFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK25_17_L, pData[1][2], 0x1FFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK25_18_L, pData[2][0], 0x1FFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK25_19_L, pData[2][1], 0x1FFF);
        MApi_XC_W2BYTEMSK(REG_SC_BK25_1A_L, pData[2][2], 0x1FFF);
    }
}

void Hal_PQ_set_xvycc_matrix_enable(void *pInstance,MS_BOOL bEnable, MS_BOOL bMainWin)
{
    if (bMainWin)
    {
        MApi_XC_W2BYTEMSK(REG_SC_BK25_01_L, bEnable ? BIT(1) : 0, BIT(1));
    }
    else
    {
        MApi_XC_W2BYTEMSK(REG_SC_BK25_11_L, bEnable ? BIT(1) : 0, BIT(1));
    }
}

MS_BOOL HAL_PQ_user_mode_control(void *pInstance)
{
	return FALSE;
}

//-------------------------------------------------------------------------------------------------
// set equation to VIP CSC
// Both equation selection rules are
// 0: SDTV(601) R  G  B  : 16-235
// 1: SDTV(601) R  G  B  : 0-255
/// @param bMainWin       \b IN: Enable
//-------------------------------------------------------------------------------------------------
void HAL_PQ_set_SelectCSC(void *pInstance,MS_U16 u16selection, MS_BOOL  bMainWin)
{
    if (bMainWin)
    {
        if (u16selection==0)
        {
            MApi_XC_W2BYTEMSK(REG_SC_BK1A_0F_L, 0xF0, 0xFF);
            MApi_XC_W2BYTEMSK(REG_SC_BK1A_0E_L, 0x00, 0x03);
            MApi_XC_W2BYTEMSK(REG_SC_BK1A_16_L, 0x4A, 0xFF);
            MApi_XC_W2BYTEMSK(REG_SC_BK1A_02_L, 0xC0, 0xF0);
        }
        else
        {
            MApi_XC_W2BYTEMSK(REG_SC_BK1A_0F_L, 0x00, 0xFF);
            MApi_XC_W2BYTEMSK(REG_SC_BK1A_0E_L, 0x00, 0x03);
            MApi_XC_W2BYTEMSK(REG_SC_BK1A_16_L, 0x40, 0xFF);
            MApi_XC_W2BYTEMSK(REG_SC_BK1A_02_L, 0x00, 0xF0);
        }
    }
    else
    {
        if (u16selection==0)
        {
            MApi_XC_W2BYTEMSK(REG_SC_BK1A_0F_L, 0xF000, 0xFF00);
            MApi_XC_W2BYTEMSK(REG_SC_BK1A_0E_L, 0x0000, 0x0300);
            MApi_XC_W2BYTEMSK(REG_SC_BK1A_16_L, 0x4A00, 0xFF00);
            MApi_XC_W2BYTEMSK(REG_SC_BK1A_02_L, 0xC000, 0xF000);
        }
        else
        {
            MApi_XC_W2BYTEMSK(REG_SC_BK1A_0F_L, 0x0000, 0xFF00);
            MApi_XC_W2BYTEMSK(REG_SC_BK1A_0E_L, 0x0000, 0x0300);
            MApi_XC_W2BYTEMSK(REG_SC_BK1A_16_L, 0x4000, 0xFF00);
            MApi_XC_W2BYTEMSK(REG_SC_BK1A_02_L, 0x0000, 0xF000);
        }
    }
}

MS_U8 Hal_PQ_get_madi_fbl_mode(void *pInstance, MS_BOOL bMemFmt422,MS_BOOL bInterlace)
{
    UNUSED(bInterlace);
    if(bMemFmt422)
    {
        return MS_MADI_P_MODE_MOT10;
    }
    else
    {
        return MS_MADI_P_MODE8;
    }
}

void Hal_PQ_set_UFSC_c_sram_table(void *pInstance, MS_U8 u8sramtype, void *pData)
{
#if 0
    MS_U16 i, j, x;
    MS_U8 u8Ramcode[8];
    MS_U8 *u32Addr;
    MS_U32 u32Data = 0;

    if(u8sramtype != SC_FILTER_C_SRAM1 &&
       u8sramtype != SC_FILTER_C_SRAM2 &&
       u8sramtype != SC_FILTER_C_SRAM3 &&
       u8sramtype != SC_FILTER_C_SRAM4)
    {
        printf("Unknown c sram type %u\n", u8sramtype);
        return;
    }

    u32Addr = (MS_U8 *)pData;
    u32Data = (MApi_XC_ReadByte(REG_FSC_BK00_03_H) & 0x10) << 8;
    MApi_XC_Write2ByteMask(REG_FSC_BK00_03_L, 0x0000, 0x1000);
    MApi_XC_Write2ByteMask(REG_FSC_BK23_41_L, 0x0002, 0x0002); // enable c_sram_rw

    for(i=0; i<64; i++)
    {
        while(MApi_XC_ReadByte(REG_FSC_BK23_41_H) & 0x01);
        j=i*5;

        if(u8sramtype == SC_FILTER_C_SRAM1)
            MApi_XC_Write2ByteMask(REG_FSC_BK23_42_L, i, 0x01FF);
        else if(u8sramtype == SC_FILTER_C_SRAM2)
            MApi_XC_Write2ByteMask(REG_FSC_BK23_42_L, (i|0x40), 0x01FF);
        else if(u8sramtype == SC_FILTER_C_SRAM3)
            MApi_XC_Write2ByteMask(REG_FSC_BK23_42_L, (i|0x180), 0x01FF);
        else
            MApi_XC_Write2ByteMask(REG_FSC_BK23_42_L, (i|0x1C0), 0x01FF);

        for ( x=0;x<5;x++ )
        {
            u8Ramcode[x] = *((MS_U8 *)(u32Addr + (j+x)));
            PQ_DUMP_FILTER_DBG(printf(" %02x ", u8Ramcode[x] ));
        }
        PQ_DUMP_FILTER_DBG(printf("\n"));

        MApi_XC_Write2ByteMask(REG_FSC_BK23_43_L, (((MS_U16)u8Ramcode[1])<<8|(MS_U16)u8Ramcode[0]), 0xFFFF);
        MApi_XC_Write2ByteMask(REG_FSC_BK23_44_L, (((MS_U16)u8Ramcode[3])<<8|(MS_U16)u8Ramcode[2]), 0xFFFF);
        MApi_XC_Write2ByteMask(REG_FSC_BK23_45_L, u8Ramcode[4], 0x00FF);

        // enable write
        MApi_XC_Write2ByteMask(REG_FSC_BK23_41_L, 0x0100, 0x0100);
    }

    MApi_XC_Write2ByteMask(REG_FSC_BK23_41_L, 0x00, 0x00FF);
    MApi_XC_Write2ByteMask(REG_FSC_BK00_03_L, u32Data, 0x1000);
#endif
}

void Hal_PQ_set_UFSC_y_sram_table(void *pInstance, MS_U8 u8sramtype, void *pData)
{
#if 0
    MS_U16 i, j, x;
    MS_U8 u8Ramcode[10];
    MS_U8 *u32Addr;
    MS_U32 u32Data = 0;

    if(u8sramtype != SC_FILTER_Y_SRAM1 &&
       u8sramtype != SC_FILTER_Y_SRAM2 &&
       u8sramtype != SC_FILTER_Y_SRAM3 &&
       u8sramtype != SC_FILTER_Y_SRAM4)
    {
        printf("Unknown y sram type %u\n", u8sramtype);
        return;
    }

    u32Addr = (MS_U8 *)pData;
    u32Data = (MApi_XC_ReadByte(REG_FSC_BK00_03_H) & 0x10) << 8;

    MApi_XC_Write2ByteMask(REG_FSC_BK00_03_L, 0x0000, 0x1000);

    MApi_XC_Write2ByteMask(REG_FSC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw

    for ( i=0; i<128; i++)
    {
        while(MApi_XC_ReadByte(REG_FSC_BK23_41_H) & 0x01);
        j=i*10;

        // address

        if(u8sramtype == SC_FILTER_Y_SRAM1)
            MApi_XC_Write2ByteMask(REG_FSC_BK23_42_L, (0x0000|i), 0x01FF);
        else if(u8sramtype == SC_FILTER_Y_SRAM2)
            MApi_XC_Write2ByteMask(REG_FSC_BK23_42_L, (0x0080|i), 0x01FF);
        else if(u8sramtype == SC_FILTER_Y_SRAM3)
            MApi_XC_Write2ByteMask(REG_FSC_BK23_42_L, (0x0100|i), 0x01FF);
        else
            MApi_XC_Write2ByteMask(REG_FSC_BK23_42_L, (0x0180|i), 0x01FF);

        for ( x=0;x<8;x++ )
        {
            u8Ramcode[x] = *((MS_U8 *)(u32Addr + (j+x)));
            PQ_DUMP_FILTER_DBG(printf(" %02x ", u8Ramcode[x] ));
        }
        for ( x=8;x<10;x++ )
        {
            u8Ramcode[x] = *((MS_U8 *)(u32Addr + (j+x)));
            PQ_DUMP_FILTER_DBG(printf(" %02x ", u8Ramcode[x] ));
        }
        PQ_DUMP_FILTER_DBG(printf("\n"));

        MApi_XC_Write2ByteMask(REG_FSC_BK23_43_L, (((MS_U16)u8Ramcode[1])<<8|(MS_U16)u8Ramcode[0]), 0xFFFF);
        MApi_XC_Write2ByteMask(REG_FSC_BK23_44_L, (((MS_U16)u8Ramcode[3])<<8|(MS_U16)u8Ramcode[2]), 0xFFFF);
        MApi_XC_Write2ByteMask(REG_FSC_BK23_45_L, (((MS_U16)u8Ramcode[5])<<8|(MS_U16)u8Ramcode[4]), 0xFFFF);
        MApi_XC_Write2ByteMask(REG_FSC_BK23_49_L, (((MS_U16)u8Ramcode[7])<<8|(MS_U16)u8Ramcode[6]), 0xFFFF);
        MApi_XC_Write2ByteMask(REG_FSC_BK23_4A_L, (((MS_U16)u8Ramcode[9])<<8|(MS_U16)u8Ramcode[8]), 0xFFFF);

        // enable write
        MApi_XC_Write2ByteMask(REG_FSC_BK23_41_L, 0x0100, 0x0100);

    }
    MApi_XC_Write2ByteMask(REG_FSC_BK23_41_L, 0x00, 0x00FF);

    MApi_XC_Write2ByteMask(REG_FSC_BK00_03_L, u32Data, 0x1000);
#endif
}

#define UFSC_ICC_H_SIZE  32
#define UFSC_ICC_V_SIZE  32

#define UFSC_ICC_MAX_SRAM_SIZE 0x124

#define UFSC_SRAM1_ICC_COUNT 289//81
#define UFSC_SRAM2_ICC_COUNT 272//72
#define UFSC_SRAM3_ICC_COUNT 272//72
#define UFSC_SRAM4_ICC_COUNT 256//64

#define UFSC_SRAM1_ICC_OFFSET 0
#define UFSC_SRAM2_ICC_OFFSET UFSC_SRAM1_ICC_COUNT
#define UFSC_SRAM3_ICC_OFFSET (UFSC_SRAM2_ICC_OFFSET + UFSC_SRAM2_ICC_COUNT)
#define UFSC_SRAM4_ICC_OFFSET (UFSC_SRAM3_ICC_OFFSET + UFSC_SRAM3_ICC_COUNT)

#define UFSC_SRAM_ICC_TOTAL_COUNT UFSC_SRAM1_ICC_COUNT + UFSC_SRAM2_ICC_COUNT + UFSC_SRAM3_ICC_COUNT + UFSC_SRAM4_ICC_COUNT

void _Hal_PQ_set_UFSC_sram_icc_crd_table(MS_U16 *pBuf, MS_U8 u8SRAM_Idx, MS_U16 u16Cnt)
{
    MS_U16 i;

    if(u8SRAM_Idx > 3)
    {
        u8SRAM_Idx = 0;
    }


    MApi_XC_Write2ByteMask(REG_FSC_BK1C_78_L, BIT(0), BIT(0)); // io_en disable
    MApi_XC_Write2ByteMask(REG_FSC_BK1C_78_L, u8SRAM_Idx<<1, BIT(2)|BIT(1)); // sram select

    for(i=0; i<u16Cnt; i++)
    {
        MApi_XC_Write2ByteMask(REG_FSC_BK1C_79_L, i, 0x01FF); // address[8:0]
        MApi_XC_Write2ByteMask(REG_FSC_BK1C_7A_L, pBuf[i], 0x01FF); //data[8:0]
        MApi_XC_Write2ByteMask(REG_FSC_BK1C_7A_L, BIT(15), BIT(15)); // io_w enable
    }
    MApi_XC_Write2ByteMask(REG_FSC_BK1C_78_L, 0, BIT(0)); // io_en enable
}

void Hal_PQ_set_UFSC_sram_icc_crd_table(void *pInstance, MS_U8 u8sramtype, void *pData)
{
    if(u8sramtype != SC_FILTER_SRAM_ICC_CRD)
    {
        return;
    }
    MS_U16* UFSC_SRAM1_ICC = (MS_U16*) malloc(sizeof(MS_U16)*UFSC_ICC_MAX_SRAM_SIZE);
    MS_U16* UFSC_SRAM2_ICC = (MS_U16*) malloc(sizeof(MS_U16)*UFSC_ICC_MAX_SRAM_SIZE);
    MS_U16* UFSC_SRAM3_ICC = (MS_U16*) malloc(sizeof(MS_U16)*UFSC_ICC_MAX_SRAM_SIZE);
    MS_U16* UFSC_SRAM4_ICC = (MS_U16*) malloc(sizeof(MS_U16)*UFSC_ICC_MAX_SRAM_SIZE);

   if(UFSC_SRAM1_ICC == NULL || UFSC_SRAM2_ICC == NULL || UFSC_SRAM3_ICC == NULL || UFSC_SRAM4_ICC ==NULL)
    {
        if(UFSC_SRAM1_ICC != NULL)
        {
            free(UFSC_SRAM1_ICC);
        }
        if(UFSC_SRAM2_ICC != NULL)
        {
            free(UFSC_SRAM2_ICC);
        }
        if(UFSC_SRAM3_ICC != NULL)
        {
            free(UFSC_SRAM3_ICC);
        }
        if(UFSC_SRAM4_ICC != NULL)
        {
            free(UFSC_SRAM4_ICC);
        }
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"UFSC_SRAM_ICC malloc fail\n");
        return;
    }

    MS_U16* u32Addr = (MS_U16*)pData;
    MS_U16 u16Index = 0 ;
    MS_U16 cont1=0, cont2=0, cont3=0, cont4=0;

//    printf("[%s]SRAM_IHC_TOTAL_COUNT=%u,SRAM2_IHC_OFFSET=%u,SRAM3_IHC_OFFSET=%u,SRAM4_IHC_OFFSET=%u\n",
//        __FUNCTION__,SRAM_IHC_TOTAL_COUNT,SRAM2_IHC_OFFSET,SRAM3_IHC_OFFSET,SRAM4_IHC_OFFSET);

    for (;u16Index < UFSC_SRAM_ICC_TOTAL_COUNT ; u16Index++)
    {
        if (u16Index < UFSC_SRAM2_ICC_OFFSET)
        {
            UFSC_SRAM1_ICC[cont1] = (u32Addr[u16Index]);
//            printf("@@SRAM1_IHC[%u]=%x\n",cont1,(u32Addr[u16Index]));
            cont1++;
        }
        else if (u16Index < UFSC_SRAM3_ICC_OFFSET)
        {
            UFSC_SRAM2_ICC[cont2] = (u32Addr[u16Index]);
//            printf("@@SRAM2_IHC[%u]=%x\n",cont2,(u32Addr[u16Index]));
            cont2++;

        }
        else if (u16Index < UFSC_SRAM4_ICC_OFFSET)
        {
            UFSC_SRAM3_ICC[cont3] = (u32Addr[u16Index]);
//            printf("@@SRAM3_IHC[%u]=%x\n",cont3,(u32Addr[u16Index]));
            cont3++;
        }
        else
        {
            UFSC_SRAM4_ICC[cont4] = (u32Addr[u16Index]);
//            printf("@@SRAM4_IHC[%u]=%x\n",cont4,(u32Addr[u16Index]));
            cont4++;
        }
    }

    _Hal_PQ_set_UFSC_sram_icc_crd_table(UFSC_SRAM1_ICC, 0, UFSC_SRAM1_ICC_COUNT);
    _Hal_PQ_set_UFSC_sram_icc_crd_table(UFSC_SRAM2_ICC, 1, UFSC_SRAM2_ICC_COUNT);
    _Hal_PQ_set_UFSC_sram_icc_crd_table(UFSC_SRAM3_ICC, 2, UFSC_SRAM3_ICC_COUNT);
    _Hal_PQ_set_UFSC_sram_icc_crd_table(UFSC_SRAM4_ICC, 3, UFSC_SRAM4_ICC_COUNT);

    free(UFSC_SRAM1_ICC);
    free(UFSC_SRAM2_ICC);
    free(UFSC_SRAM3_ICC);
    free(UFSC_SRAM4_ICC);

}

#define UFSC_IHC_H_SIZE  33
#define UFSC_IHC_V_SIZE  33
#define UFSC_BUF_BYTE_SIZE (UFSC_IHC_H_SIZE*UFSC_IHC_V_SIZE)
#define UFSC_MAX_SRAM_SIZE 0x124

#define UFSC_SRAM1_IHC_COUNT 289//81
#define UFSC_SRAM2_IHC_COUNT 272//72
#define UFSC_SRAM3_IHC_COUNT 272//72
#define UFSC_SRAM4_IHC_COUNT 256//64

#define UFSC_SRAM1_IHC_OFFSET 0
#define UFSC_SRAM2_IHC_OFFSET UFSC_SRAM1_IHC_COUNT
#define UFSC_SRAM3_IHC_OFFSET (UFSC_SRAM2_IHC_OFFSET + UFSC_SRAM2_IHC_COUNT)
#define UFSC_SRAM4_IHC_OFFSET (UFSC_SRAM3_IHC_OFFSET + UFSC_SRAM3_IHC_COUNT)

#define UFSC_SRAM_IHC_TOTAL_COUNT UFSC_SRAM1_IHC_COUNT + UFSC_SRAM2_IHC_COUNT + UFSC_SRAM3_IHC_COUNT + UFSC_SRAM4_IHC_COUNT

void _Hal_PQ_set_UFSC_sram_ihc_crd_table(MS_U16 *pBuf, MS_U8 u8SRAM_Idx, MS_U16 u16Cnt)
{
    MS_U16 i;

    if(u8SRAM_Idx > 3)
    {
        u8SRAM_Idx = 0;
    }


    MApi_XC_Write2ByteMask(REG_FSC_BK1C_7C_L, BIT(0), BIT(0)); // io_en disable
    MApi_XC_Write2ByteMask(REG_FSC_BK1C_7C_L, u8SRAM_Idx<<1, BIT(2)|BIT(1)); // sram select

    for(i=0; i<u16Cnt; i++)
    {
        MApi_XC_Write2ByteMask(REG_FSC_BK1C_7D_L, i, 0x01FF); // address[8:0]
        MApi_XC_Write2ByteMask(REG_FSC_BK1C_7E_L, pBuf[i], 0x01FF); //data[8:0]
        MApi_XC_Write2ByteMask(REG_FSC_BK1C_7E_L, BIT(15), BIT(15)); // io_w enable
    }
    MApi_XC_Write2ByteMask(REG_FSC_BK1C_7C_L, 0, BIT(0)); // io_en enable
}

void Hal_PQ_set_UFSC_sram_ihc_crd_table(void *pInstance, MS_U8 u8sramtype, void *pData)
{
    if(u8sramtype != SC_FILTER_SRAM_IHC_CRD)
    {
        return;
    }

    MS_U16* UFSC_SRAM1_IHC = (MS_U16*) malloc(sizeof(MS_U16)*UFSC_MAX_SRAM_SIZE);
    MS_U16* UFSC_SRAM2_IHC = (MS_U16*) malloc(sizeof(MS_U16)*UFSC_MAX_SRAM_SIZE);
    MS_U16* UFSC_SRAM3_IHC = (MS_U16*) malloc(sizeof(MS_U16)*UFSC_MAX_SRAM_SIZE);
    MS_U16* UFSC_SRAM4_IHC = (MS_U16*) malloc(sizeof(MS_U16)*UFSC_MAX_SRAM_SIZE);

   if(UFSC_SRAM1_IHC == NULL || UFSC_SRAM2_IHC == NULL || UFSC_SRAM3_IHC == NULL || UFSC_SRAM4_IHC ==NULL)
    {
        if(UFSC_SRAM1_IHC != NULL)
        {
            free(UFSC_SRAM1_IHC);
        }
        if(UFSC_SRAM2_IHC != NULL)
        {
            free(UFSC_SRAM2_IHC);
        }
        if(UFSC_SRAM3_IHC != NULL)
        {
            free(UFSC_SRAM3_IHC);
        }
        if(UFSC_SRAM4_IHC != NULL)
        {
            free(UFSC_SRAM4_IHC);
        }
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"UFSC_SRAM_IHC malloc fail\n");
        return;
    }

    MS_U16* u32Addr = (MS_U16*)pData;
    MS_U16 u16Index = 0 ;
    MS_U16 cont1=0, cont2=0, cont3=0, cont4=0;

//    printf("[%s]SRAM_IHC_TOTAL_COUNT=%u,SRAM2_IHC_OFFSET=%u,SRAM3_IHC_OFFSET=%u,SRAM4_IHC_OFFSET=%u\n",
//        __FUNCTION__,SRAM_IHC_TOTAL_COUNT,SRAM2_IHC_OFFSET,SRAM3_IHC_OFFSET,SRAM4_IHC_OFFSET);


        for (;u16Index < UFSC_SRAM_IHC_TOTAL_COUNT ; u16Index++)
        {
            if (u16Index < UFSC_SRAM2_IHC_OFFSET)
            {
                UFSC_SRAM1_IHC[cont1] = (u32Addr[u16Index]);
    //            printf("@@SRAM1_IHC[%u]=%x\n",cont1,(u32Addr[u16Index]));
                cont1++;
            }
            else if (u16Index < UFSC_SRAM3_IHC_OFFSET)
            {
                UFSC_SRAM2_IHC[cont2] = (u32Addr[u16Index]);
    //            printf("@@SRAM2_IHC[%u]=%x\n",cont2,(u32Addr[u16Index]));
                cont2++;

            }
            else if (u16Index < UFSC_SRAM4_IHC_OFFSET)
            {
                UFSC_SRAM3_IHC[cont3] = (u32Addr[u16Index]);
    //            printf("@@SRAM3_IHC[%u]=%x\n",cont3,(u32Addr[u16Index]));
                cont3++;
            }
            else
            {
                UFSC_SRAM4_IHC[cont4] = (u32Addr[u16Index]);
    //            printf("@@SRAM4_IHC[%u]=%x\n",cont4,(u32Addr[u16Index]));
                cont4++;
            }
        }

    _Hal_PQ_set_UFSC_sram_ihc_crd_table(UFSC_SRAM1_IHC, 0, UFSC_SRAM1_IHC_COUNT);
    _Hal_PQ_set_UFSC_sram_ihc_crd_table(UFSC_SRAM2_IHC, 1, UFSC_SRAM2_IHC_COUNT);
    _Hal_PQ_set_UFSC_sram_ihc_crd_table(UFSC_SRAM3_IHC, 2, UFSC_SRAM3_IHC_COUNT);
    _Hal_PQ_set_UFSC_sram_ihc_crd_table(UFSC_SRAM4_IHC, 3, UFSC_SRAM4_IHC_COUNT);

    free(UFSC_SRAM1_IHC);
    free(UFSC_SRAM2_IHC);
    free(UFSC_SRAM3_IHC);
    free(UFSC_SRAM4_IHC);
}

#define PEAKING_CAG_MAX_SRAM_SIZE 0x124
#define PEAKING_SRAM1_CAG_COUNT 289//81
#define PEAKING_SRAM2_CAG_COUNT 272//72
#define PEAKING_SRAM3_CAG_COUNT 272//72
#define PEAKING_SRAM4_CAG_COUNT 256//64

#define PEAKING_SRAM1_CAG_OFFSET 0
#define PEAKING_SRAM2_CAG_OFFSET PEAKING_SRAM1_CAG_COUNT
#define PEAKING_SRAM3_CAG_OFFSET (PEAKING_SRAM2_CAG_OFFSET + PEAKING_SRAM2_CAG_COUNT)
#define PEAKING_SRAM4_CAG_OFFSET (PEAKING_SRAM3_CAG_OFFSET + PEAKING_SRAM3_CAG_COUNT)

#define PEAKING_SRAM_CAG_TOTAL_COUNT PEAKING_SRAM1_CAG_COUNT + PEAKING_SRAM2_CAG_COUNT + PEAKING_SRAM3_CAG_COUNT + PEAKING_SRAM4_CAG_COUNT

void _Hal_PQ_set_sram_peaking_cag_table(MS_U16 *pBuf, MS_U8 u8SRAM_Idx, MS_U16 u16Cnt)
{
    MS_U16 i;
    if(u8SRAM_Idx > 3)
    {
        u8SRAM_Idx = 0;
    }
    MApi_XC_W2BYTEMSK(REG_SC_BK76_5C_L, BIT(0), BIT(0)); // io_en disable
    MApi_XC_W2BYTEMSK(REG_SC_BK76_5C_L, u8SRAM_Idx<<1, BIT(2)|BIT(1)); // sram select

    for(i=0; i<u16Cnt; i++)
    {
        MApi_XC_W2BYTEMSK(REG_SC_BK76_5D_L, i, 0x01FF); // address[8:0]
        MApi_XC_W2BYTEMSK(REG_SC_BK76_5E_L, pBuf[i], 0x01FF); //data[8:0]
        MApi_XC_W2BYTEMSK(REG_SC_BK76_5E_L, BIT(15), BIT(15)); // io_w enable
    }
    MApi_XC_W2BYTEMSK(REG_SC_BK76_5C_L, 0, BIT(0)); // io_en enable
}
void Hal_PQ_set_sram_peaking_cag_table(void *pInstance,MS_U8 u8sramtype, void *pData)
{
    if(u8sramtype != SC_FILTER_SRAM_PEAKING_CAG)
    {
        return;
    }
    MS_U16* Peaking_SRAM1_CAG = (MS_U16*) malloc(sizeof(MS_U16)*PEAKING_CAG_MAX_SRAM_SIZE);
    MS_U16* Peaking_SRAM2_CAG = (MS_U16*) malloc(sizeof(MS_U16)*PEAKING_CAG_MAX_SRAM_SIZE);
    MS_U16* Peaking_SRAM3_CAG = (MS_U16*) malloc(sizeof(MS_U16)*PEAKING_CAG_MAX_SRAM_SIZE);
    MS_U16* Peaking_SRAM4_CAG = (MS_U16*) malloc(sizeof(MS_U16)*PEAKING_CAG_MAX_SRAM_SIZE);

    if(Peaking_SRAM1_CAG == NULL || Peaking_SRAM2_CAG == NULL || Peaking_SRAM3_CAG == NULL || Peaking_SRAM4_CAG ==NULL)
    {
        if(Peaking_SRAM1_CAG != NULL)
        {
            free(Peaking_SRAM1_CAG);
        }
        if(Peaking_SRAM2_CAG != NULL)
        {
            free(Peaking_SRAM2_CAG);
        }
        if(Peaking_SRAM3_CAG != NULL)
        {
            free(Peaking_SRAM3_CAG);
        }
        if(Peaking_SRAM4_CAG != NULL)
        {
            free(Peaking_SRAM4_CAG);
        }
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"Peaking_SRAM_CAG malloc fail\n");
        return;
    }

    MS_U16* u32Addr = (MS_U16*)pData;
    MS_U16 u16Index = 0 ;
    MS_U16 cont1=0, cont2=0, cont3=0, cont4=0;

//    printf("[%s]SRAM_IHC_TOTAL_COUNT=%u,SRAM2_IHC_OFFSET=%u,SRAM3_IHC_OFFSET=%u,SRAM4_IHC_OFFSET=%u\n",
//        __FUNCTION__,SRAM_IHC_TOTAL_COUNT,SRAM2_IHC_OFFSET,SRAM3_IHC_OFFSET,SRAM4_IHC_OFFSET);

    for (;u16Index < PEAKING_SRAM_CAG_TOTAL_COUNT ; u16Index++)
    {
        if (u16Index < PEAKING_SRAM2_CAG_OFFSET)
        {
            Peaking_SRAM1_CAG[cont1] = (u32Addr[u16Index]);
            //printf("@@SRAM1_CAG[%u]=%x\n",cont1,(u32Addr[u16Index]));
            cont1++;
        }
        else if (u16Index < PEAKING_SRAM3_CAG_OFFSET)
        {
            Peaking_SRAM2_CAG[cont2] = (u32Addr[u16Index]);
            //printf("@@SRAM2_CAG[%u]=%x\n",cont2,(u32Addr[u16Index]));
            cont2++;

        }
        else if (u16Index < PEAKING_SRAM4_CAG_OFFSET)
        {
            Peaking_SRAM3_CAG[cont3] = (u32Addr[u16Index]);
            //printf("@@SRAM3_CAG[%u]=%x\n",cont3,(u32Addr[u16Index]));
            cont3++;
        }
        else
        {
            Peaking_SRAM4_CAG[cont4] = (u32Addr[u16Index]);
            //printf("@@SRAM4_CAG[%u]=%x\n",cont4,(u32Addr[u16Index]));
            cont4++;
        }
    }

    _Hal_PQ_set_sram_peaking_cag_table(Peaking_SRAM1_CAG, 0, PEAKING_SRAM1_CAG_COUNT);
    _Hal_PQ_set_sram_peaking_cag_table(Peaking_SRAM2_CAG, 1, PEAKING_SRAM2_CAG_COUNT);
    _Hal_PQ_set_sram_peaking_cag_table(Peaking_SRAM3_CAG, 2, PEAKING_SRAM3_CAG_COUNT);
    _Hal_PQ_set_sram_peaking_cag_table(Peaking_SRAM4_CAG, 3, PEAKING_SRAM4_CAG_COUNT);

    free(Peaking_SRAM1_CAG);
    free(Peaking_SRAM2_CAG);
    free(Peaking_SRAM3_CAG);
    free(Peaking_SRAM4_CAG);
}

MS_BOOL Hal_PQ_get_cfd_info(MS_U16 u16PqIndex, MS_U8 *pu8ColorFormat, MS_U8 *pu8ColorDataFormat, MS_BOOL *pbIsFullRange, MS_U8 *pu8ColorPrimaries, MS_U8 *pu8TransferCharacteristics, MS_U8 *pu8MatrixCoefficients)
{
    if ((pu8ColorFormat == NULL) || (pu8ColorDataFormat == NULL) || (pbIsFullRange == NULL) || (pu8ColorPrimaries == NULL) || (pu8TransferCharacteristics == NULL) || (pu8MatrixCoefficients == NULL))
    {
        return FALSE;
    }

    *pu8ColorFormat = _gu8AnalogCfd[u16PqIndex][0];
    *pu8ColorDataFormat = _gu8AnalogCfd[u16PqIndex][1];
    *pbIsFullRange = _gu8AnalogCfd[u16PqIndex][2];
    *pu8ColorPrimaries = _gu8AnalogCfd[u16PqIndex][3];
    *pu8TransferCharacteristics = _gu8AnalogCfd[u16PqIndex][4];
    *pu8MatrixCoefficients = _gu8AnalogCfd[u16PqIndex][5];
    return TRUE;
}

//Get Analog input attributs from simplified analog table.
MS_BOOL Hal_PQ_get_cfd_info_simplified_index(MS_U16 u16PqIndex, MS_U8 *pu8ColorFormat, MS_U8 *pu8ColorDataFormat, MS_BOOL *pbIsFullRange, MS_U8 *pu8ColorPrimaries, MS_U8 *pu8TransferCharacteristics, MS_U8 *pu8MatrixCoefficients)
{
    if ((pu8ColorFormat == NULL) || (pu8ColorDataFormat == NULL) || (pbIsFullRange == NULL) || (pu8ColorPrimaries == NULL) || (pu8TransferCharacteristics == NULL) || (pu8MatrixCoefficients == NULL))
    {
        return FALSE;
    }

    *pu8ColorFormat = _gu8AnalogCfdSimplified[u16PqIndex][0];
    *pu8ColorDataFormat = _gu8AnalogCfdSimplified[u16PqIndex][1];
    *pbIsFullRange = _gu8AnalogCfdSimplified[u16PqIndex][2];
    *pu8ColorPrimaries = _gu8AnalogCfdSimplified[u16PqIndex][3];
    *pu8TransferCharacteristics = _gu8AnalogCfdSimplified[u16PqIndex][4];
    *pu8MatrixCoefficients = _gu8AnalogCfdSimplified[u16PqIndex][5];
    return TRUE;
}

MS_U16 MHal_PQ_GetPQDelayAvg(MS_PQ_INPUT_SOURCE_TYPE enInputSource)
{
   return 0;
}

#if SUPPORT_AUTODOWNLOAD_ICC_IHC
void Hal_PQ_ICC_IHC_FireADL(void)
{
    if(_bICCWrited && _bIHCWrited)
    {
        if(MApi_XC_AutoDownload_Fire(E_XC_AUTODOWNLOAD_CLIENT_ICC_IHC) == E_APIXC_RET_OK)
        {
            _bICCWrited = FALSE;
            _bIHCWrited = FALSE;
        }
        else
        {
            PQ_DUMP_FILTER_DBG(printf("[%s, %d] Fire ADL failed!!\n", __FUNC__, __LINE__));
        }
    }
}
#endif

MS_BOOL Hal_PQ_SupportFastDisp_Setting(MS_BOOL bEnable, MS_U8 u8Level, MS_U8 u8PQNum)
{
    MS_BOOL bReturn = FALSE;

    if (bEnable == TRUE)
    {
        // force reset write bank
        MApi_XC_W2BYTEMSK(REG_SC_BK12_05_L, BIT(7), BIT(7));
        MsOS_DelayTaskUs(1);
        MApi_XC_W2BYTEMSK(REG_SC_BK12_05_L, 0x00, BIT(7));
        //fast display setting
        MS_U8 u8FastDispStep = 0xFF;    //HW default
        switch(u8Level)
        {
            case 1:
                u8FastDispStep = 0xFF;
                break;

            case 2:
                u8FastDispStep = 0x80;
                break;

            case 3:
                u8FastDispStep = 0x40;
                break;

            default:
                u8FastDispStep = 0xFF;
                break;
        }
        MApi_XC_W2BYTEMSK(REG_SC_BK11_3F_L, BIT(11)|BIT(9)|BIT(8), BIT(11)|BIT(9)|BIT(8));  // enable black pattern

        MApi_XC_W2BYTEMSK(REG_SC_BK11_3C_L, u8FastDispStep, 0x00FF);
        MApi_XC_W2BYTEMSK(REG_SC_BK11_3C_L, BIT(8), BIT(8));            // enable fast display mode ((un-mute) && (u8PQNum == rw_diff))
        MApi_XC_W2BYTEMSK(REG_SC_BK11_3C_L, 0, BIT(10));                // disable fast display (only un-mute)
        MApi_XC_W2BYTEMSK(REG_SC_BK11_3C_L, u8PQNum << (12), 0xF000);   // can't larger than frame buffer
        MApi_XC_W2BYTEMSK(REG_SC_BK11_3F_L, 0, BIT(10));
        MsOS_DelayTaskUs(1);
        MApi_XC_W2BYTEMSK(REG_SC_BK11_3F_L, BIT(10), BIT(10));          // toggle for trigger the function. Only 1's

        bReturn = TRUE;
    }
    else
    {
        bReturn = TRUE;
    }

    return bReturn;
}

void Hal_PQ_get_FastDisp_en(MS_BOOL *bEnable)
{
    if (MApi_XC_R2BYTEMSK(REG_SC_BK11_3C_L, BIT(8)) == BIT(8))
    {
        *bEnable = TRUE;
    }
    else
    {
        *bEnable = FALSE;
    }
}

MS_U8 MHal_PQ_Check_UI_VR(void *pInstance, MS_U32 u32RegAddr, MS_U8 u8Mask, MS_U8 u8Value, EN_PQ_TABTYPE enTableType)
{
    MS_U8  u8VRValue = u8Value;
    MS_U64 u64Reg = 0;

    if(enTableType == PQ_TABTYPE_SCALER)
    {
        u64Reg = ((BK_SCALER_BASE|u32RegAddr)<<8) | (u8Mask);
    }
    else
    {
        u64Reg = (u32RegAddr<<8) | (u8Mask);
    }

    switch(u64Reg)
    {
        case DS_XRULE_CHECK_DNR:
            if(MDrv_PQ_VR_R2BYTE(REG_BKF008_05_L)&0x01)
            {
                u8VRValue = MDrv_PQ_VR_R2BYTE(REG_BKF008_00_L)&u8Mask;
            }
            break;
        case DS_XRULE_CHECK_UCNR:
            if(MDrv_PQ_VR_R2BYTE(REG_BKF008_05_L)&0x20)
            {
                u8VRValue = MDrv_PQ_VR_R2BYTE(REG_BKF008_00_H)&u8Mask;
            }
            break;
        case DS_XRULE_CHECK_BWS_BP:
            if(MDrv_PQ_VR_R2BYTE(REG_BKF008_05_L)&0x02)
            {
                u8VRValue = MDrv_PQ_VR_R2BYTE(REG_BKF008_01_L)&u8Mask;
            }
            break;
        case DS_XRULE_CHECK_BWS_EN:
            if(MDrv_PQ_VR_R2BYTE(REG_BKF008_05_L)&0x02)
            {
                u8VRValue = MDrv_PQ_VR_R2BYTE(REG_BKF008_01_H)&u8Mask;
            }
            break;
        case DS_XRULE_CHECK_UCDI:
            if(MDrv_PQ_VR_R2BYTE(REG_BKF008_05_L)&0x40)
            {
                u8VRValue = MDrv_PQ_VR_R2BYTE(REG_BKF008_02_L)&u8Mask;
            }
            break;
        case DS_XRULE_CHECK_FILM:
        {
            MS_U8 u8TempValue = 0;
            if(u64Reg & DS_XRULE_CHECK_FILM32_MASK)
            {
                if(MDrv_PQ_VR_R2BYTE(REG_BKF008_05_L)&0x04)
                {
                    u8TempValue = MDrv_PQ_VR_R2BYTE(REG_BKF008_02_H)&u8Mask;
                    u8VRValue = u8TempValue;
                }
            }

            if(u64Reg & DS_XRULE_CHECK_FILM22_MASK)
            {
                if(MDrv_PQ_VR_R2BYTE(REG_BKF008_05_L)&0x08)
                {
                    u8TempValue = ((MDrv_PQ_VR_R2BYTE(REG_BKF008_03_L)&u8Mask) | u8TempValue);
                    u8VRValue = u8TempValue;
                }
            }
            break;
        }
        case DS_XRULE_CHECK_FILMANY:
            if(MDrv_PQ_VR_R2BYTE(REG_BKF008_05_L)&0x10)
            {
                u8VRValue = MDrv_PQ_VR_R2BYTE(REG_BKF008_03_H)&u8Mask;
            }
            break;
        case DS_XRULE_CHECK_UCCTL:
            if(MDrv_PQ_VR_R2BYTE(REG_BKF008_05_L)&0x80)
            {
                u8VRValue = MDrv_PQ_VR_R2BYTE(REG_BKF008_04_L)&u8Mask;
            }
            break;
        default:
            break;
    }

    return u8VRValue;
}

MS_BOOL MHal_PQ_IsSupportMADiVR(void)
{
    MS_U16 u16IsSupportMADiVR = 0;
    MS_BOOL bRet = FALSE;
#if defined(PQ_QM_VR)
    //VRBK_09   addr 0xA   bit:0
    u16IsSupportMADiVR= MDrv_PQ_VR_R2BYTEMSK(REG_VR_BK09_0B_L,0x1);
    if(u16IsSupportMADiVR == 0)
    {
        bRet = FALSE;
    }
    else
    {
        bRet = TRUE;
    }
#endif
    PQ_LEVEL_PRINTF(PQ_DBG_MADI,"Support MADI VR %s\n",(bRet)?("YES"):("NO"));
    return bRet;
}
MS_BOOL MHal_PQ_SetMADiVRInfo(ST_PQ_MADI_VR_INFO* pstPQMADiVRInfo)
{
    if(pstPQMADiVRInfo == NULL)
    {
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"[PQ] pstPQMADiVRInfo is NULL!! Set MADI info fail\n");
        return FALSE;
    }

    *(pstPQMADiVRInfo->pu8BitsPerPixel) = MDrv_PQ_VR_R2BYTEMSK(REG_VR_BK09_09_L,0x00FF);
    *(pstPQMADiVRInfo->pu8CmpBitsPerPixel) = (MDrv_PQ_VR_R2BYTEMSK(REG_VR_BK09_0C_L,0xFF00)>>8);
    *(pstPQMADiVRInfo->peDeInterlaceMode) = (PQ_DEINTERLACE_MODE)(MDrv_PQ_VR_R2BYTEMSK(REG_VR_BK09_09_L,0x0700)>>8);
    *(pstPQMADiVRInfo->pu8FrameCount) = MDrv_PQ_VR_R2BYTEMSK(REG_VR_BK09_0A_L,0x00FF);
    *(pstPQMADiVRInfo->pu8PQDelayCount) = MDrv_PQ_VR_R2BYTEMSK(REG_VR_BK09_0A_L,0xFF00)>>8;
    *(pstPQMADiVRInfo->penFBLevel) = (E_XC_FB_LEVEL)(MDrv_PQ_VR_R2BYTEMSK(REG_VR_BK09_0B_L,0x0300)>>8);
    *(pstPQMADiVRInfo->pbOPWriteOffEnable) = MDrv_PQ_VR_R2BYTEMSK(REG_VR_BK09_0C_L,0x1);
    return TRUE;
}
#if (SUPPORT_BW_AND_CONTROL_SETTING_IN_EX == TRUE)
#if PQ_GRULE_OSD_BW_ENABLE
MS_U16 _MHal_PQ_OSDBWGRuleLevelMainReMapping(MS_U16 u16GruleLevelMain)
{
    MS_U16 u16NewGruleLevelMain = u16GruleLevelMain;
    switch(u16GruleLevelMain)
    {
        case PQ_GRule_OSD_BW_On_1920_Main:
            u16NewGruleLevelMain = PQ_GRule_OSD_BW_On_1920_Main_Ex;
            break;
        case PQ_GRule_OSD_BW_On_1366_Main:
            u16NewGruleLevelMain = PQ_GRule_OSD_BW_On_1366_Main_Ex;
            break;
        case PQ_GRule_OSD_BW_On_4K2K_Main:
            u16NewGruleLevelMain = PQ_GRule_OSD_BW_On_4K2K_Main_Ex;
            break;
        default:
            break;
    }
    return u16NewGruleLevelMain;
}
#endif

#if PQ_GRULE_ULTRAT_CLEAR_ENABLE
MS_U16 _MHal_PQ_UltralClearGRuleLevelMainReMapping(MS_U16 u16GruleLevelMain)
{
    MS_U16 u16NewGruleLevelMain = u16GruleLevelMain;
    switch(u16GruleLevelMain)
    {
        case PQ_GRule_ULTRAT_CLEAR_Off_Main:
            u16NewGruleLevelMain = PQ_GRule_ULTRAT_CLEAR_Off_Main_Ex;
            break;
        case PQ_GRule_ULTRAT_CLEAR_On_Main:
            u16NewGruleLevelMain = PQ_GRule_ULTRAT_CLEAR_On_Main_Ex;
            break;
        case PQ_GRule_ULTRAT_CLEAR_On_4K2K_Main:
            u16NewGruleLevelMain = PQ_GRule_ULTRAT_CLEAR_On_4K2K_Main_Ex;
            break;
        default:
            break;
    }
    return u16NewGruleLevelMain;
}
#endif
#endif

#if PQ_GRULE_GAME_MODE_ENABLE
MS_U16 _MHal_PQ_GameModeGRuleLevelMainReMapping(MS_U16 u16GruleLevelMain)
{
    MS_U16 u16NewGruleLevelMain = u16GruleLevelMain;
    MS_U8 u8PanelIdx = MDrv_PQBin_GetPanelIdx(NULL);
    switch(u16GruleLevelMain)
    {
        case PQ_GRule_GAME_MODE_On_Main:
            if(MApi_XC_GetMirrorModeTypeEx(MAIN_WINDOW) != MIRROR_NORMAL)
            {
                if(u8PanelIdx == PQ_BIN_PNLTYPE_4K2K)
                {
                    u16NewGruleLevelMain = PQ_GRule_GAME_MODE_On_Mirror_Main_Ex;
                }
                else if(u8PanelIdx == PQ_BIN_PNLTYPE_1920)
                {
                    u16NewGruleLevelMain = PQ_GRule_GAME_MODE_On_Mirror_1920_Main_Ex;
                }
                else
                {
                    u16NewGruleLevelMain = PQ_GRule_GAME_MODE_On_Mirror_Main_Ex;
                }
            }
            else
            {
                if(u8PanelIdx == PQ_BIN_PNLTYPE_4K2K)
                {
                    u16NewGruleLevelMain = PQ_GRule_GAME_MODE_On_NonMirror_Main_Ex;
                }
                else if(u8PanelIdx == PQ_BIN_PNLTYPE_1920)
                {
                    u16NewGruleLevelMain = PQ_GRule_GAME_MODE_On_NonMirror_1920_Main_Ex;
                }
                else
                {
                    u16NewGruleLevelMain = PQ_GRule_GAME_MODE_On_NonMirror_Main_Ex;
                }
            }
            break;
        default:
            break;
    }
    return u16NewGruleLevelMain;
}
MS_U16 _MHal_PQ_GameModeGRuleLevelReMapping(MS_U16 u16GruleLevel)
{
    MS_U16 u16NewGruleLevel = u16GruleLevel;
    switch(u16GruleLevel)
    {
        case PQ_GRule_Lvl_GAME_MODE_On_Main:
            if(MApi_XC_GetMirrorModeTypeEx(MAIN_WINDOW) != MIRROR_NORMAL)
            {
                u16NewGruleLevel = PQ_GRule_Lvl_GAME_MODE_On_Mirror_Main_Ex;
            }
            else
            {
                u16NewGruleLevel = PQ_GRule_Lvl_GAME_MODE_On_NonMirror_Main_Ex;
            }
            break;
        default:
            break;
     }
     return u16NewGruleLevel;
}
#endif

#if defined(PQ_GRULE_DYNAMIC_SCBW_ENABLE)&&(PQ_GRULE_DYNAMIC_SCBW_ENABLE == 1)
MS_U16 _MHal_PQ_SCBWGRuleLevelMainReMapping(MS_U16 u16GruleLevelMain)
{
    MS_U16 u16NewGruleLevelMain = 0;
    switch(u16GruleLevelMain)
    {
        case PQ_GRule_DYNAMIC_SCBW_Off_Main:
            u16NewGruleLevelMain = PQ_GRule_DYNAMIC_SCBW_Off_Main_Ex;
            break;
        case PQ_GRule_DYNAMIC_SCBW_Low_Main:
            u16NewGruleLevelMain = PQ_GRule_DYNAMIC_SCBW_Low_Main_Ex;
            break;
        case PQ_GRule_DYNAMIC_SCBW_Middle_Main:
            u16NewGruleLevelMain = PQ_GRule_DYNAMIC_SCBW_Middle_Main_Ex;
            break;
        case PQ_GRule_DYNAMIC_SCBW_High_Main:
            u16NewGruleLevelMain = PQ_GRule_DYNAMIC_SCBW_High_Main_Ex;
            break;
        default:
            u16NewGruleLevelMain = u16GruleLevelMain;
            break;
    }
    return u16NewGruleLevelMain;
}
MS_U16 _MHal_PQ_SCBWGGRuleLevelReMapping(MS_U16 u16GruleLevel)
{
    MS_U16 u16NewGruleLevel = 0;
    switch(u16GruleLevel)
    {
        case PQ_GRule_Lvl_DYNAMIC_SCBW_Off_Main:
            u16NewGruleLevel = PQ_GRule_Lvl_DYNAMIC_SCBW_Off_Main_Ex;
            break;
        case PQ_GRule_Lvl_DYNAMIC_SCBW_Low_Main:
            u16NewGruleLevel = PQ_GRule_Lvl_DYNAMIC_SCBW_Low_Main_Ex;
            break;
        case PQ_GRule_Lvl_DYNAMIC_SCBW_Middle_Main:
            u16NewGruleLevel = PQ_GRule_Lvl_DYNAMIC_SCBW_Middle_Main_Ex;
            break;
        case PQ_GRule_Lvl_DYNAMIC_SCBW_High_Main:
            u16NewGruleLevel = PQ_GRule_Lvl_DYNAMIC_SCBW_High_Main_Ex;
            break;
        default:
            u16NewGruleLevel = u16GruleLevel;
            break;
     }
     return u16NewGruleLevel;
}
#endif
void MHal_PQ_RemappingIP(void *pInstance, ST_PQ_IPInfo stIPInfo, ST_PQ_IPInfo *pstUpdatedIPInfo, MS_BOOL bMainWin)
{
    if(pstUpdatedIPInfo == NULL)
    {
        return;
    }

#if (SUPPORT_BW_AND_CONTROL_SETTING_IN_EX == TRUE)
    if(bMainWin)
    {
        if(stIPInfo.enPQEngineType == PQ_XC0_STD)
        { // get QMAP ex ip index by QMAP ip index
            pstUpdatedIPInfo->enPQEngineType = PQ_XC0_EXT;
            pstUpdatedIPInfo->u16TableIdx = stIPInfo.u16TableIdx;
            switch(stIPInfo.u16IPIdx)
            {
                case PQ_IP_BWR_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_BWR_Main_Ex;
                    break;
                case PQ_IP_BWS_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_BWS_Main_Ex;
                    break;
                case PQ_IP_BWS_UI_VR_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_BWS_UI_VR_Main_Ex;
                    break;
                case PQ_IP_MADi_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MADi_Main_Ex;
                    break;
                case PQ_IP_MADi_Motion_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MADi_Motion_Main_Ex;
                    break;
                case PQ_IP_MADi_DFK_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MADi_DFK_Main_Ex;
                    pstUpdatedIPInfo->u16TableIdx = (stIPInfo.u16TableIdx == PQ_IP_MADi_DFK_OFF_Main)?PQ_IP_MADi_DFK_OFF_Main_Ex:stIPInfo.u16TableIdx;
                    break;
                case PQ_IP_MADi_SST_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MADi_SST_Main_Ex;
                    pstUpdatedIPInfo->u16TableIdx = (stIPInfo.u16TableIdx == PQ_IP_MADi_SST_OFF_Main)?PQ_IP_MADi_SST_OFF_Main_Ex:stIPInfo.u16TableIdx;
                    break;
                case PQ_IP_MADi_EODiW_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MADi_EODiW_Main_Ex;
                    break;
                case PQ_IP_UCDi_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_UCDi_Main_Ex;
                    pstUpdatedIPInfo->u16TableIdx = (stIPInfo.u16TableIdx == PQ_IP_UCDi_OFF_Main)?PQ_IP_UCDi_OFF_Main_Ex:stIPInfo.u16TableIdx;
                    break;
                case PQ_IP_UCDi_UI_VR_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_UCDi_UI_VR_Main_Ex;
                    break;
                case PQ_IP_UC_CTL_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_UC_CTL_Main_Ex;
                    pstUpdatedIPInfo->u16TableIdx = (stIPInfo.u16TableIdx == PQ_IP_UC_CTL_OFF_Main)?PQ_IP_UC_CTL_OFF_Main_Ex:stIPInfo.u16TableIdx;
                    break;
                case PQ_IP_UC_CTL_UI_VR_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_UC_CTL_UI_VR_Main_Ex;
                    break;
                case PQ_IP_DS_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_DS_Main_Ex;
                    break;
                case PQ_IP_MM_DS_frame_delay_0_IP_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_0_IP_Main_Ex;
                    break;
                case PQ_IP_MM_DS_frame_delay_1_IP_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_1_IP_Main_Ex;
                    break;
                case PQ_IP_MM_DS_frame_delay_5_IP_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_5_IP_Main_Ex;
                    break;
                case PQ_IP_MM_DS_frame_delay_9_IP_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_9_IP_Main_Ex;
                    break;
                case PQ_IP_MM_DS_frame_delay_Dummy_IP_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_Dummy_IP_Main_Ex;
                    break;
                case PQ_IP_MM_DS_frame_delay_0_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_0_Main_Ex;
                    break;
                case PQ_IP_MM_DS_frame_delay_1_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_1_Main_Ex;
                    break;
                case PQ_IP_MM_DS_frame_delay_5_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_5_Main_Ex;
                    break;
                case PQ_IP_MM_DS_frame_delay_9_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_9_Main_Ex;
                    break;
                case PQ_IP_MM_DS_frame_delay_Dummy_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_Dummy_Main_Ex;
                    break;
                case PQ_IP_SwDriver_Main:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_SwDriver_Main_Ex;
                    pstUpdatedIPInfo->u16TableIdx = (stIPInfo.u16TableIdx == PQ_IP_SwDriver_OFF_Main)?PQ_IP_SwDriver_OFF_Main_Ex:stIPInfo.u16TableIdx;
                    break;
                default:
                    pstUpdatedIPInfo->u16IPIdx = stIPInfo.u16IPIdx;
                    pstUpdatedIPInfo->u16TableIdx = stIPInfo.u16TableIdx;
                    pstUpdatedIPInfo->enPQEngineType = PQ_XC0_STD;
                    break;
            }
        }
        else
        { // get QMAP ip index by QMAP Ex ip index
            pstUpdatedIPInfo->enPQEngineType = PQ_XC0_STD;
            switch(stIPInfo.u16IPIdx)
            {
                case PQ_IP_BWR_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_BWR_Main;
                    break;
                case PQ_IP_BWS_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_BWS_Main;
                    break;
                case PQ_IP_BWS_UI_VR_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_BWS_UI_VR_Main;
                    break;
                case PQ_IP_MADi_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MADi_Main;
                    break;
                case PQ_IP_MADi_Motion_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MADi_Motion_Main;
                    break;
                case PQ_IP_MADi_DFK_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MADi_DFK_Main;
                    break;
                case PQ_IP_MADi_SST_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MADi_SST_Main;
                    break;
                case PQ_IP_MADi_EODiW_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MADi_EODiW_Main;
                    break;
                case PQ_IP_UCDi_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_UCDi_Main;
                    break;
                case PQ_IP_UCDi_UI_VR_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_UCDi_UI_VR_Main;
                    break;
                case PQ_IP_UC_CTL_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_UC_CTL_Main;
                    break;
                case PQ_IP_UC_CTL_UI_VR_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_UC_CTL_UI_VR_Main;
                    break;
                case PQ_IP_DS_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_DS_Main;
                    break;
                case PQ_IP_MM_DS_frame_delay_0_IP_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_0_IP_Main;
                    break;
                case PQ_IP_MM_DS_frame_delay_1_IP_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_1_IP_Main;
                    break;
                case PQ_IP_MM_DS_frame_delay_5_IP_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_5_IP_Main;
                    break;
                case PQ_IP_MM_DS_frame_delay_9_IP_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_9_IP_Main;
                    break;
                case PQ_IP_MM_DS_frame_delay_Dummy_IP_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_Dummy_IP_Main;
                    break;
                case PQ_IP_MM_DS_frame_delay_0_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_0_Main;
                    break;
                case PQ_IP_MM_DS_frame_delay_1_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_1_Main;
                    break;
                case PQ_IP_MM_DS_frame_delay_5_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_5_Main;
                    break;
                case PQ_IP_MM_DS_frame_delay_9_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_9_Main;
                    break;
                case PQ_IP_MM_DS_frame_delay_Dummy_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_MM_DS_frame_delay_Dummy_Main;
                    break;
                case PQ_IP_SwDriver_Main_Ex:
                    pstUpdatedIPInfo->u16IPIdx = PQ_IP_SwDriver_Main;
                    break;
                default:
                    pstUpdatedIPInfo->u16IPIdx = stIPInfo.u16IPIdx;
                    pstUpdatedIPInfo->u16TableIdx = stIPInfo.u16TableIdx;
                    pstUpdatedIPInfo->enPQEngineType = PQ_XC0_EXT;
                    break;
            }
        }
    }
#else
    memcpy(pstUpdatedIPInfo, &stIPInfo, sizeof(ST_PQ_IPInfo));
#endif
}

// QMAP Grule mapping to QMAP_Ex Grule
void MHal_PQ_RemappingGruleIP(void *pInstance, ST_PQ_IPInfo stIPInfo, ST_PQ_IPInfo *pstUpdatedIPInfo, MS_BOOL bMainWin)
{
    if(pstUpdatedIPInfo == NULL)
    {
        return;
    }

#if (SUPPORT_BW_AND_CONTROL_SETTING_IN_EX == TRUE) // Get from QAMP Ex
    if(bMainWin)
    {
        switch(stIPInfo.u16IPIdx)
        {
#if PQ_GRULE_OSD_BW_ENABLE
            case PQ_GRule_OSD_BW_Main:
                pstUpdatedIPInfo->u16IPIdx = PQ_GRule_OSD_BW_Main_Ex;
                pstUpdatedIPInfo->u16GruleMaxIPNum = PQ_GRULE_OSD_BW_IP_NUM_Main_Ex;
                pstUpdatedIPInfo->u16GruleLevelNum = PQ_GRULE_OSD_BW_LVL_NUM_Main_Ex;
                pstUpdatedIPInfo->u16GruleLevelMain = _MHal_PQ_OSDBWGRuleLevelMainReMapping(stIPInfo.u16GruleLevelMain);
                pstUpdatedIPInfo->u16GruleLevel = (stIPInfo.u16GruleLevel == PQ_GRule_Lvl_OSD_BW_On_Main)?PQ_GRule_Lvl_OSD_BW_On_Main_Ex:stIPInfo.u16GruleLevel;
                pstUpdatedIPInfo->u16GruleLevelMainNum = PQ_GRULE_OSD_BW_NUM_Main_Ex;
                pstUpdatedIPInfo->enPQEngineType = PQ_XC0_EXT;
                break;
#endif
#if PQ_GRULE_ULTRAT_CLEAR_ENABLE
            case PQ_GRule_ULTRAT_CLEAR_Main:
                pstUpdatedIPInfo->u16IPIdx = PQ_GRule_ULTRAT_CLEAR_Main_Ex;
                pstUpdatedIPInfo->u16GruleMaxIPNum = PQ_GRULE_ULTRAT_CLEAR_IP_NUM_Main_Ex;
                pstUpdatedIPInfo->u16GruleLevelNum = PQ_GRULE_ULTRAT_CLEAR_LVL_NUM_Main_Ex;
                pstUpdatedIPInfo->u16GruleLevelMain = _MHal_PQ_UltralClearGRuleLevelMainReMapping(stIPInfo.u16GruleLevelMain);
                pstUpdatedIPInfo->u16GruleLevel = (stIPInfo.u16GruleLevel == PQ_GRule_Lvl_ULTRAT_CLEAR_Off_Main)?PQ_GRule_Lvl_ULTRAT_CLEAR_Off_Main_Ex:PQ_GRule_Lvl_ULTRAT_CLEAR_On_Main_Ex;
                pstUpdatedIPInfo->u16GruleLevelMainNum = PQ_GRULE_ULTRAT_CLEAR_NUM_Main_Ex;
                pstUpdatedIPInfo->enPQEngineType = PQ_XC0_EXT;
                break;
#endif
#if PQ_GRULE_GAME_MODE_ENABLE
            case PQ_GRule_GAME_MODE_Main:
                pstUpdatedIPInfo->u16IPIdx = PQ_GRule_GAME_MODE_Main_Ex;
                pstUpdatedIPInfo->u16GruleMaxIPNum = PQ_GRULE_GAME_MODE_IP_NUM_Main_Ex;
                pstUpdatedIPInfo->u16GruleLevelNum = PQ_GRULE_GAME_MODE_LVL_NUM_Main_Ex;
                pstUpdatedIPInfo->u16GruleLevelMain = _MHal_PQ_GameModeGRuleLevelMainReMapping(stIPInfo.u16GruleLevelMain);
                pstUpdatedIPInfo->u16GruleLevel = _MHal_PQ_GameModeGRuleLevelReMapping(stIPInfo.u16GruleLevel);
                pstUpdatedIPInfo->u16GruleLevelMainNum = PQ_GRULE_GAME_MODE_NUM_Main_Ex;
                pstUpdatedIPInfo->enPQEngineType = PQ_XC0_EXT;
                break;
#endif
#if defined(PQ_GRULE_DYNAMIC_SCBW_ENABLE)&&(PQ_GRULE_DYNAMIC_SCBW_ENABLE == 1)
            case PQ_GRule_DYNAMIC_SCBW_Main:
                pstUpdatedIPInfo->u16IPIdx = PQ_GRule_DYNAMIC_SCBW_Main_Ex;
                pstUpdatedIPInfo->u16GruleMaxIPNum = PQ_GRULE_DYNAMIC_SCBW_IP_NUM_Main_Ex;
                pstUpdatedIPInfo->u16GruleLevelNum = PQ_GRULE_DYNAMIC_SCBW_LVL_NUM_Main_Ex;
                pstUpdatedIPInfo->u16GruleLevelMain = _MHal_PQ_SCBWGRuleLevelMainReMapping(stIPInfo.u16GruleLevelMain);
                pstUpdatedIPInfo->u16GruleLevel = _MHal_PQ_SCBWGGRuleLevelReMapping(stIPInfo.u16GruleLevel);
                pstUpdatedIPInfo->u16GruleLevelMainNum = PQ_GRULE_DYNAMIC_SCBW_NUM_Main_Ex;
                pstUpdatedIPInfo->enPQEngineType = PQ_XC0_EXT;
                break;
#endif
            default:
                memcpy(pstUpdatedIPInfo, &stIPInfo, sizeof(ST_PQ_IPInfo));
                pstUpdatedIPInfo->enPQEngineType = PQ_XC0_STD;
                break;
        }
    }
    else
    {
        memcpy(pstUpdatedIPInfo, &stIPInfo, sizeof(ST_PQ_IPInfo));
    }
#else
    memcpy(pstUpdatedIPInfo, &stIPInfo, sizeof(ST_PQ_IPInfo));
#endif
}

void MHal_PQ_SetBitPerPixelForCmp(MS_U8 *pu8BitsPerPixel, MS_U8 u8CmpBitsPerPixel, MS_BOOL bMainWin)
{
    MS_BOOL bIPM420CmpEnable = 0;
    MS_BOOL bOPM420CmpEnable = 0;

    if(pu8BitsPerPixel == NULL)
    {
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"[PQ] pu8BitsPerPixel is NULL!!\n");
    }
    else
    {
        if(bMainWin)
        {
            bIPM420CmpEnable = (MApi_XC_R2BYTEMSK(REG_SC_BK11_0B_L, BIT(15)) >> 15);
            bOPM420CmpEnable = (MApi_XC_R2BYTEMSK(REG_SC_BK11_4B_L, BIT(15)) >> 15);
            if(bIPM420CmpEnable || bOPM420CmpEnable)
            { // 420 compact mode is enable, using compact mode bit per pixel
                if(u8CmpBitsPerPixel != 0)
                {
                    *pu8BitsPerPixel = u8CmpBitsPerPixel;
                }
            }
        }
    }
}

MS_BOOL MHal_PQ_IP_Support(EN_PQ_IP_LIST eIPName)
{
    MS_BOOL bSupported = FALSE;
    switch(eIPName)
    {
        case E_PQ_IP_DLCHIST_RANGEOFFSET:
        {
            if(PQ_IP_VIP_DLC_IPHis_RangeOffset_Main_ENABLE)
            {
                bSupported = TRUE;
            }
            break;
        }
        default:
        {
            PQ_LEVEL_PRINTF(PQ_DBG_INFO,"[PQ] IP:%u not supported !\n", eIPName);
            break;
        }
    }

    return bSupported;
}

MS_U16 MHal_PQ_Get_IPNum(EN_PQ_IP_LIST eIPName)
{
    MS_U16 u16IPNum = 0;
    switch(eIPName)
    {
        case E_PQ_IP_DLCHIST_RANGEOFFSET:
        {
            if(PQ_IP_VIP_DLC_IPHis_RangeOffset_Main_ENABLE)
            {
                u16IPNum =  (MS_U16)PQ_IP_VIP_DLC_IPHis_RangeOffset_Main;
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_INFO,"[PQ] IP:%u not Enable !\n", eIPName);
                u16IPNum = 0xFFFF;
            }
            break;
        }
        default:
        {
            PQ_LEVEL_PRINTF(PQ_DBG_INFO,"[PQ] IP:%u not Found !\n", eIPName);
            u16IPNum = 0xFFFF;
            break;
        }
    }
    return u16IPNum;
}

MS_BOOL MHal_PQ_MMDSXRuleMapping(void* pInstance,PQ_WIN enWindow, MS_U16* pu16XRuleType, PQ_ENGINE_TYPE* penPQEngineType)
{
    if(pu16XRuleType == NULL)
    {
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"[PQ] pu16XRuleType is NULL!!\n");
        return FALSE;
    }
    if(penPQEngineType == NULL)
    {
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"[PQ] penPQEngineType is NULL!!\n");
        return FALSE;
    }

    PQ_LEVEL_PRINTF(PQ_DBG_SRULE,"[PQ]IN u16XRuleType = %d\n",(*pu16XRuleType));
    PQ_LEVEL_PRINTF(PQ_DBG_SRULE,"[PQ]IN enPQEngineType = %d\n",(*penPQEngineType));
#if (SUPPORT_BW_AND_CONTROL_SETTING_IN_EX == TRUE)
    (*penPQEngineType) = PQ_XC0_EXT;
#if (defined(PQ_XRULE_MM_DS_RULE_FBL_Main_Ex_ENABLE) && defined(PQ_XRULE_MM_DS_RULE_Main_Ex_ENABLE))
    MS_BOOL bFblEnable = FALSE;
    bFblEnable = MDrv_PQ_IsFBLMadi(pInstance, enWindow);
    if(bFblEnable == TRUE)
    {
        (*pu16XRuleType) = PQ_XRule_MM_DS_rule_FBL_Main_Ex;
    }
#endif
#else
    PQ_LEVEL_PRINTF(PQ_DBG_SRULE,"[PQ]Not Support SUPPORT_BW_AND_CONTROL_SETTING_IN_EX!!\n");
#endif
    PQ_LEVEL_PRINTF(PQ_DBG_SRULE,"[PQ]OUT u16XRuleType = %d\n",(*pu16XRuleType));
    PQ_LEVEL_PRINTF(PQ_DBG_SRULE,"[PQ]OUT enPQEngineType = %d\n",(*penPQEngineType));
    return TRUE;
}
MS_BOOL MHal_PQ_Support_GroupIPBIN(void)
{
#if defined(PQ_GROUPIP_BIN_VERSION)&&(PQ_GROUPIP_BIN_VERSION == 1)
    return TRUE;
#else
    return FALSE;
#endif
}

MS_U16 MHal_PQ_InputSourceUnLock(PQ_WIN enWindow, MS_U16 u16SrcType,MS_BOOL bIsInterlaced,MS_U16 u16Input_VFreq)
{
    if(enWindow>=PQ_MAX_WINDOW)
    {
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR," enWindow>=PQ_MAX_WINDOW!!");
        return u16SrcType;
    }
    if(u16Input_VFreq > PQ_FREQV_GATE_FOR_100I)
    {
        if(bIsInterlaced == TRUE)
        {
            PQ_LEVEL_PRINTF(PQ_DBG_INFO," Frame rate 100i case!");
            u16SrcType = QM_I_Mode_Unlock_Main;
        }
    }
    return u16SrcType;
}
MS_U16 MHal_PQ_Get_GRuleIPIndex(PQ_WIN enWindow, EN_PQ_GRULE_IP enGRuleIP)
{
    MS_U16 u16GRuleIPIdx = 0;
    u16GRuleIPIdx = PQ_IP_NULL;

    if(enWindow == PQ_SUB_WINDOW)
    {
#if (PQ_ENABLE_PIP)
        switch(enGRuleIP)
        {
            default:
            {
                u16GRuleIPIdx = PQ_IP_NULL;
                break;
            }
        }
#else
        UNUSED(enGRuleIP);
#endif
    }
    else
    {
        switch(enGRuleIP)
        {
            case E_PQ_GRULE_IP_NR:
            {
                u16GRuleIPIdx = PQ_GRule_NR_Main;
                break;
            }
            case E_PQ_GRULE_IP_EDGE_ENHANCER:
            {
                u16GRuleIPIdx = PQ_GRule_EDGE_ENHANCER_Main;
                break;
            }
            case E_PQ_GRULE_IP_BWLE:
            {
                u16GRuleIPIdx = PQ_GRule_BWLE_Main;
                break;
            }
            default:
            {
                u16GRuleIPIdx = PQ_IP_NULL;
                break;
            }
        }
    }
    return u16GRuleIPIdx;
}

MS_U16 MHal_PQ_Get_GRuleNum(PQ_WIN enWindow, EN_PQ_GRULE_IP enGRuleIP)
{
    MS_U16 u16GRuleNum = 0;
    u16GRuleNum = PQ_IP_NUM_NULL;

    if(enWindow == PQ_SUB_WINDOW)
    {
#if (PQ_ENABLE_PIP)
        switch(enGRuleIP)
        {
            default:
            {
                u16GRuleNum = PQ_IP_NUM_NULL;
                break;
            }
        }
#else
        UNUSED(enGRuleIP);
#endif
    }
    else
    {
        switch(enGRuleIP)
        {
            case E_PQ_GRULE_IP_NR:
            {
                u16GRuleNum = PQ_GRULE_NR_NUM_Main;
                break;
            }
            case E_PQ_GRULE_IP_EDGE_ENHANCER:
            {
                u16GRuleNum = PQ_GRULE_EDGE_ENHANCER_NUM_Main;
                break;
            }
            case E_PQ_GRULE_IP_BWLE:
            {
                u16GRuleNum = PQ_GRULE_BWLE_NUM_Main;
                break;
            }
            default:
            {
                u16GRuleNum = PQ_IP_NUM_NULL;
                break;
            }
        }
    }
    return u16GRuleNum;
}
MS_U16 MHal_PQ_Get_GRuleIPNum(PQ_WIN enWindow, EN_PQ_GRULE_IP enGRuleIP)
{
    MS_U16 u16GRuleIPNum = 0;
    u16GRuleIPNum = PQ_IP_NUM_NULL;

    if(enWindow == PQ_SUB_WINDOW)
    {
#if (PQ_ENABLE_PIP)
        switch(enGRuleIP)
        {
            default:
            {
                u16GRuleIPNum = PQ_IP_NUM_NULL;
                break;
            }
        }
#else
        UNUSED(enGRuleIP);
#endif
    }
    else
    {
        switch(enGRuleIP)
        {
            case E_PQ_GRULE_IP_EDGE_ENHANCER:
            {
                u16GRuleIPNum = PQ_GRULE_EDGE_ENHANCER_IP_NUM_Main;
                break;
            }
            case E_PQ_GRULE_IP_BWLE:
            {
                u16GRuleIPNum = PQ_GRULE_BWLE_IP_NUM_Main;
                break;
            }
            default:
            {
                u16GRuleIPNum = PQ_IP_NUM_NULL;
                break;
            }
        }
    }
    return u16GRuleIPNum;
}
MS_BOOL MHal_PQ_IsSourceUnLock(MS_U16 u16SrcType)
{
    if(u16SrcType == QM_I_Mode_Unlock_Main || u16SrcType ==QM_P_Mode_Unlock_Main)
    {
        PQ_LEVEL_PRINTF(PQ_DBG_INFO," u16SrcType is Unlock");
        return TRUE;
    }
    else
    {
        return FALSE;
    }
}

MS_BOOL MHal_PQBin_GeneralSetPanelIdx(void *pInstance,PQ_BIN_TYPE enPQBinType, MS_U16 u16PnlIdx)
{
    if(pInstance == NULL)
    {
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"pInstance is NULL\n");
        return FALSE;
    }
    PQ_LEVEL_PRINTF(PQ_DBG_INFO,"enPQBinType = %d u8PnlIdx = %d\n", enPQBinType,u16PnlIdx);
    switch(enPQBinType)
    {
        case PQ_BIN_TMO:
        {
            _u16gPQBinTMOPnlIdx = u16PnlIdx;
        }
        default:
        {
            PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"Not support this PQ_BIN_TYPE = %d\n", enPQBinType);
            return FALSE;
        }
    }
    return TRUE;
}

MS_U16 MHal_PQBin_GeneralGetPanelIdx(void *pInstance,PQ_BIN_TYPE enPQBinType)
{
    if(pInstance == NULL)
    {
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"pInstance is NULL\n");
        return PQ_PNL_INDEX_NULL;
    }
    PQ_LEVEL_PRINTF(PQ_DBG_INFO,"enPQBinType = %d\n", enPQBinType);
    switch(enPQBinType)
    {
        case PQ_BIN_TMO:
        {
            return _u16gPQBinTMOPnlIdx;
        }
        default:
        {
            PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"Not support this PQ_BIN_TYPE = %d\n", enPQBinType);
            return PQ_PNL_INDEX_NULL;
        }
    }
}

MS_BOOL MHal_PQ_SetPQInfoToVR(ST_PQ_SET_VR_INFO stPQSetVRInfo)
{
    if(stPQSetVRInfo.pValue == NULL)
    {
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.pValue == NULL\n");
        return FALSE;
    }
    if(stPQSetVRInfo.u32Version < ST_PQ_SET_VR_INFO_VERSION)
    {
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"Please check your u32Version version ,it should set over cur version!!!\n");
        return FALSE;
    }
    switch(stPQSetVRInfo.enVRInfoType)
    {
        case E_PQ_VR_INFO_RESOLUTION:
        {
            MS_U32 u32Resolution = *((MS_U32*)stPQSetVRInfo.pValue);
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_09_L,(MS_U16)(u32Resolution >> 00),0xFFFF);
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_0A_L,(MS_U16)(u32Resolution >> 16),0xFFFF);
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_41_L,(MS_U16)(u32Resolution >> 00),0xFFFF);
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_42_L,(MS_U16)(u32Resolution >> 16),0xFFFF);
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
        case E_PQ_VR_INFO_COLOR_FORMAT:
        {
            MS_U8 u8ColorFormatType = *((MS_U8*)stPQSetVRInfo.pValue);
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_0B_L,(((MS_U16)u8ColorFormatType) << 8),0xFF00);
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_43_L,(((MS_U16)u8ColorFormatType) << 8),0xFF00);
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
        case E_PQ_VR_INFO_SUB_SAMPLE:
        {
            MS_U8 u8SubSampleType = *((MS_U8*)stPQSetVRInfo.pValue);
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_0C_L,(MS_U16)(u8SubSampleType),0x00FF);
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_44_L,(MS_U16)(u8SubSampleType),0x00FF);
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
        case E_PQ_VR_INFO_SCANNING:
        {
            MS_U8 u8ScanningType = *((MS_U8*)stPQSetVRInfo.pValue);
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_0C_L,(((MS_U16)u8ScanningType) << 8),0xFF00);
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_44_L,(((MS_U16)u8ScanningType) << 8),0xFF00);
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
        case E_PQ_VR_INFO_SOURCE_TYPE:
        {
            MS_U8 u8SourceType = *((MS_U8*)stPQSetVRInfo.pValue);
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_0D_L,(MS_U16)(u8SourceType),0x00FF);
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_45_L,(MS_U16)(u8SourceType),0x00FF);
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
        case E_PQ_VR_INFO_FRAME_RATE:
        {
            MS_U16 u16FrameRate = *((MS_U16*)stPQSetVRInfo.pValue);
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_0E_L,(u16FrameRate),0xFFFF);
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_46_L,(u16FrameRate),0xFFFF);
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
        case E_PQ_VR_INFO_DIMENSION:
        {
            MS_U8 u8DimensionType  = *((MS_U16*)stPQSetVRInfo.pValue);
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_0D_L,(((MS_U16)u8DimensionType) << 8),0xFF00);
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_45_L,(((MS_U16)u8DimensionType) << 8),0xFF00);
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
        case E_PQ_VR_INFO_PRE_SCALING_HV:
        {
            MS_U32 u32PreScalingH  =  ((MS_U32)MApi_XC_R2BYTEMSK(REG_SC_BK02_04_L,0xFFFF)) | (((MS_U32)MApi_XC_R2BYTEMSK(REG_SC_BK02_05_L,0xFFFF)) << 16);
            MS_U32 u32PreScalingV  =  ((MS_U32)MApi_XC_R2BYTEMSK(REG_SC_BK02_08_L,0xFFFF)) | (((MS_U32)MApi_XC_R2BYTEMSK(REG_SC_BK02_09_L,0xFFFF)) << 16);
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_0F_L,(MS_U16)(u32PreScalingH),0xFFFF); //H
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_10_L,(MS_U16)(u32PreScalingV),0xFFFF);//V
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_47_L,(MS_U16)(u32PreScalingH),0xFFFF); //H
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_48_L,(MS_U16)(u32PreScalingV),0xFFFF); //V
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
        case E_PQ_VR_INFO_POST_SCALING_HV:
        {
            MS_U32 u32PostScalingH  =  ((MS_U32)MApi_XC_R2BYTEMSK(REG_SC_BK23_07_L,0xFFFF)) | (((MS_U32)MApi_XC_R2BYTEMSK(REG_SC_BK23_08_L,0xFFFF)) << 16);
            MS_U32 u32PostScalingV  =  ((MS_U32)MApi_XC_R2BYTEMSK(REG_SC_BK23_09_L,0xFFFF)) | (((MS_U32)MApi_XC_R2BYTEMSK(REG_SC_BK23_0A_L,0xFFFF)) << 16);
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_11_L,(MS_U16)(u32PostScalingH),0xFFFF); //H
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_12_L,(MS_U16)(u32PostScalingV),0xFFFF); //V
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_49_L,(MS_U16)(u32PostScalingH),0xFFFF); //H
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_4A_L,(MS_U16)(u32PostScalingV),0xFFFF); //V
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
        case E_PQ_VR_INFO_FSC_HV:
        {
            MS_U32 u32PreScalingHV  = *((MS_U32*)stPQSetVRInfo.pValue);
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_13_L,(MS_U16)(u32PreScalingHV >> 16),0xFFFF); //H
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_14_L,(MS_U16)(u32PreScalingHV),0xFFFF);           //V
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_4B_L,(MS_U16)(u32PreScalingHV >> 16),0xFFFF); //H
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_4C_L,(MS_U16)(u32PreScalingHV),0xFFFF);           //V
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
        case E_PQ_VR_INFO_WINDOW_ID:
        {
            MS_U8 u8WindowID  = *((MS_U8*)stPQSetVRInfo.pValue);
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_08_L,(MS_U16)(u8WindowID),0x00FF);
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_40_L,(MS_U16)(u8WindowID),0x00FF);
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
        case E_PQ_VR_INFO_TOTAL_WINDOW:
        {
            MS_U8 u8WindowID  = *((MS_U8*)stPQSetVRInfo.pValue);
            MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_00_L,(MS_U16)(u8WindowID),0x00FF);
            break;
        }
        case E_PQ_VR_INFO_SRC_INDEX:
        {
            MS_U8 u8SrcIndex  = *((MS_U8*)stPQSetVRInfo.pValue);
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_15_L,(MS_U16)(u8SrcIndex),0xFFFF);
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_4D_L,(MS_U16)(u8SrcIndex),0xFFFF);
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
        case E_PQ_VR_INFO_MADI_INDEX:
        {
            MS_U8 u8MadiIndex  = *((MS_U8*)stPQSetVRInfo.pValue);
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_16_L,(MS_U16)(u8MadiIndex),0xFFFF);
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_4E_L,(MS_U16)(u8MadiIndex),0xFFFF);
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
        case E_PQ_VR_INFO_GRULE_DBG:
        {
            MS_U8 u8GruleLevel  = *((MS_U8*)stPQSetVRInfo.pValue);
            MS_U32 u32Reg = 0;
            if(stPQSetVRInfo.u16RuleIndex >= PQ_VR_DGB_GRULE_MAX)
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.u16RuleIndex = %d > PQ_VR_DGB_GRULE_MAX = %d\n",stPQSetVRInfo.u16RuleIndex,PQ_VR_DGB_GRULE_MAX);
                return FALSE;
            }
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                u32Reg = (REG_BKF06A_18_L + stPQSetVRInfo.u16RuleIndex);
                MDrv_PQ_VR_WriteByte(u32Reg,u8GruleLevel);
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                u32Reg = (REG_BKF06A_4A_L + stPQSetVRInfo.u16RuleIndex);
                MDrv_PQ_VR_WriteByte(u32Reg,u8GruleLevel);
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
        case E_PQ_VR_INFO_XRULE_DBG:
        {
            MS_U8 u8GruleLevel  = *((MS_U8*)stPQSetVRInfo.pValue);
            MS_U32 u32Reg = 0;
            if(stPQSetVRInfo.u16RuleIndex >= PQ_VR_DGB_XRULE_MAX)
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.u16RuleIndex = %d > u8VRXruleMaxIndex = %d\n",stPQSetVRInfo.u16RuleIndex,PQ_VR_DGB_XRULE_MAX);
                return FALSE;
            }
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                u32Reg = (REG_BKF06A_28_L + stPQSetVRInfo.u16RuleIndex);
                MDrv_PQ_VR_WriteByte(u32Reg,u8GruleLevel);
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                u32Reg = (REG_BKF06A_5A_L + stPQSetVRInfo.u16RuleIndex);
                MDrv_PQ_VR_WriteByte(u32Reg,u8GruleLevel);
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
        case E_PQ_VR_INFO_TMO_GRULE_DBG:
        {
            MS_U8 u8GruleLevel  = *((MS_U8*)stPQSetVRInfo.pValue);
            MS_U32 u32Reg = 0;
            if(stPQSetVRInfo.u16RuleIndex >= PQ_VR_DGB_TMO_XRULE_MAX)
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.u16RuleIndex = %d > u8VRXruleMaxIndex = %d\n",stPQSetVRInfo.u16RuleIndex,PQ_VR_DGB_TMO_XRULE_MAX);
                return FALSE;
            }
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                u32Reg = (REG_BKF06A_38_L + stPQSetVRInfo.u16RuleIndex);
                MDrv_PQ_VR_WriteByte(u32Reg,u8GruleLevel);
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                u32Reg = (REG_BKF06A_6A_L + stPQSetVRInfo.u16RuleIndex);
                MDrv_PQ_VR_WriteByte(u32Reg,u8GruleLevel);
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
        case E_PQ_VR_INFO_PQ_DELAY_TIME:
        {
            MS_U8 u8DelayTime = *((MS_U8*)stPQSetVRInfo.pValue);
            if(stPQSetVRInfo.enWindow == PQ_MAIN_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_1F_L,(MS_U16)u8DelayTime,0x00FF);
            }
            else if(stPQSetVRInfo.enWindow == PQ_SUB_WINDOW)
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF06A_51_L,(MS_U16)u8DelayTime,0x00FF);
            }
            else
            {
                PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"stPQSetVRInfo.enWindow = %d is Not support\n",stPQSetVRInfo.enWindow);
                return FALSE;
            }
            break;
        }
    }
    return TRUE;
}

MS_U16 MHal_PQ_Get_XRuleIPType(PQ_WIN enWindow, EN_PQ_XRULE_IP enPQXRuleIP)
{
    MS_U16 u16XruleIP = 0;
    u16XruleIP = PQ_IP_NULL;

    if(enWindow == PQ_MAIN_WINDOW)
    {
        switch(enPQXRuleIP)
        {
            case E_PQ_XRULE_IP_HSD:
            {
                u16XruleIP = (MS_U16)PQ_XRule_HSDRule_Main;
                break;
            }
            case E_PQ_XRULE_IP_VSD:
            {
                u16XruleIP = (MS_U16)PQ_XRule_VSDRule_Main;
                break;
            }
            case E_PQ_XRULE_IP_HSP:
            {
                u16XruleIP = (MS_U16)PQ_XRule_HSPRule_Main;
                break;
            }
            case E_PQ_XRULE_IP_VSP:
            {
                u16XruleIP = (MS_U16)PQ_XRule_VSPRule_Main;
                break;
            }
            case E_PQ_XRULE_IP_MM_DS:
            {
                u16XruleIP = (MS_U16)PQ_XRule_MM_DS_rule_Main;
                break;
            }
            case E_PQ_XRULE_IP_DLC_HISTOGRAM:
            {
                u16XruleIP = (MS_U16)PQ_XRule_DLC_Histogram_ActWin_Rule_Main;
                break;
            }
            case E_PQ_XRULE_IP_HVSP_DS:
            {
                u16XruleIP = (MS_U16)PQ_XRule_DS_HVSP_Settings_Main;
                break;
            }
            default:
            {
                break;
            }
        }
    }
    return u16XruleIP;
}

MS_U16 MHal_PQ_Get_HVSPXRuleIPIndex(PQ_WIN enWindow, EN_PQ_HVSP_DS_SETTING_IP enSettingIP)
{
    MS_U16 u16XRuleIPIdx = 0;
    u16XRuleIPIdx = PQ_IP_NULL;

    if(enWindow == PQ_MAIN_WINDOW)
    {
        switch(enSettingIP)
        {
            case E_PQ_HVSP_DS_1920_HDOWN_VDOWN:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920_ScDown_V_ScDown_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920_HDOWN_V1X:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920_ScDown_V_1X_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920_HDOWN_VUP:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920_ScDown_V_ScUp_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920_H1X_VDOWN:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920_1X_V_ScDown_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920_H1X_V1X:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920_1X_V_1X_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920_H1X_VUP:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920_1X_V_ScUp_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920_HUP_VDOWN:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920_ScUp_V_ScDown_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920_HUP_V1X:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920_ScUp_V_1X_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920_HUP_VUP:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920_ScUp_V_ScUp_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920UP_HDOWN_VDOWN:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920Up_ScDown_V_ScDown_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920UP_HDOWN_V1X:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920Up_ScDown_V_1X_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920UP_HDOWN_VUP:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920Up_ScDown_V_ScUp_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920UP_H1X_VDOWN:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920Up_1X_V_ScDown_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920UP_H1X_V1X:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920Up_1X_V_1X_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920UP_H1X_VUP:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920Up_1X_V_ScUp_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920UP_HUP_VDOWN:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920Up_ScUp_V_ScDown_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920UP_HUP_V1X:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920Up_ScUp_V_1X_Main;
                break;
            }
            case E_PQ_HVSP_DS_1920UP_HUP_VUP:
            {
                u16XRuleIPIdx = PQ_DS_HVSP_Settings_H1920Up_ScUp_V_ScUp_Main;
                break;
            }
            default:
            {
                break;
            }
        }
    }
    return u16XRuleIPIdx;
}

MS_BOOL MHal_PQ_Function_Control(PQ_WIN UNUSED_PARA(enWindow),EN_PQ_FUNCTION_INFO_INDEX enFunctionIndex ,MS_BOOL bEnable)
{
    if(enFunctionIndex >= E_PQ_MAX)
    {
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"[PQ] Function Index overflow:%u \n",enFunctionIndex);
        return FALSE;
    }
    if(bEnable == TRUE)
    {
        switch(enFunctionIndex)
        {
            case E_PQ_DNR:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK06_21_L,0x0003,0x0003);
                break;
            }
            case E_PQ_UCNR:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK2A_07_L,BIT(0),BIT(0));
                MApi_XC_Write2ByteMask(REG_BK3385_07_L,BIT(7),BIT(7));
                break;
            }
            case E_PQ_ZNR:
            {
                PQ_LEVEL_PRINTF(PQ_DBG_INFO,"[PQ] Function no support \n");
                break;
            }
            case E_PQ_SPF:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK0C_70_L,0,BIT(0));
                MApi_XC_Write2ByteMask(REG_BK3350_01_L,0,BIT(3));
                break;
            }
            case E_PQ_DBK:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK0C_10_L,BIT(0),BIT(0));
                break;
            }
            case E_PQ_DMS:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK26_10_L,BIT(0),BIT(0));
                break;
            }
            case E_PQ_UCD:
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF00E_00_L,BIT(0),BIT(0));
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF00F_00_L,BIT(0),BIT(0));
                break;
            }
            case E_PQ_DLC:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK1A_04_L,BIT(7), BIT(7));
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF004_01_L,BIT(15),BIT(15));
                break;
            }
            case E_PQ_BWLE:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK1A_0D_L,BIT(7),BIT(7));
                break;
            }
            case E_PQ_SWDR:
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF004_01_L,BIT(14),BIT(14));
                break;
            }
            case E_PQ_VIP_ALL_BYPASS:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK27_70_L,BIT(0),BIT(0));
                MApi_XC_Write2ByteMask(REG_BK3350_01_L,BIT(15),BIT(15));
                break;
            }
            case E_PQ_HSY:
            {
                MApi_XC_Write2ByteMask(REG_BK330B_02_L,0x0091,0x0091);
                break;
            }
            case E_PQ_COLORENG_CBCR_BYPASS:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK18_06_L,BIT(10),BIT(10));
                break;
            }
            case E_PQ_FCC:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK1B_30_L,BIT(2),BIT(2));
                break;
            }
            case E_PQ_FWC:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK0F_70_L,BIT(0), BIT(0));
                break;
            }
            case E_PQ_ABF:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK58_10_L,BIT(0),BIT(0));
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF008_79_L,BIT(1),BIT(1));
                break;
            }
            case E_PQ_PRE_CTI:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK23_61_L,0x8004,0x8004);
                break;
            }
            case E_PQ_POST_CTI:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK27_20_L,BIT(0),BIT(0));
                break;
            }
            case E_PQ_SHARPNESS:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK19_10_L,0x0051,0x0051);
                MApi_XC_W2BYTEMSK(REG_SC_BK38_10_L,BIT(0),BIT(0));
                MApi_XC_W2BYTEMSK(REG_SC_BK76_70_L,BIT(0),BIT(0));
                MApi_XC_Write2ByteMask(REG_BK3360_10_L,BIT(4),BIT(4));
                break;
            }
            case E_PQ_PQ_GAMMA:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK10_50_L,BIT(0),BIT(0));
                break;
            }
            case E_PQ_PANEL_GAMMA:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK24_6D_L,BIT(12),BIT(12));
                break;
            }
            case E_PQ_3D_RGB:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK14_52_L,BIT(0),BIT(0));
                MApi_XC_W2BYTEMSK(REG_SC_BK14_64_L,BIT(0),BIT(0));
                break;
            }
            case E_PQ_RGB_GAIN:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK0F_53_L,0x0003,0x0003);
                MApi_XC_W2BYTEMSK(REG_SC_BK25_01_L,0x0030,0x0030);
                MApi_XC_W2BYTEMSK(REG_SC_BK24_5F_L,0xC000,0xC000);
                break;
            }
            case E_PQ_LINEAR_RGB:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK25_01_L,0,BIT(8));
                break;
            }
            case E_PQ_PQ_DRIVER:
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF009_78_L,0x8001,0x8001);
                break;
            }
            case E_PQ_SCALING_FILTER:
            {
                _u16ScalingTemp = MApi_XC_R2BYTE(REG_SC_BK23_0B_L);
                MApi_XC_W2BYTE(REG_SC_BK23_0B_L,0);
                break;
            }
            case E_PQ_BRIGHTNESS:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK10_16_L,BIT(8),BIT(8));
                break;
            }
            case E_PQ_RGB_CLIP:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK0F_57_L,BIT(0),BIT(0));
                break;
            }
            case E_PQ_HALF_PQ_DELAY:
            {
                _gbHalfPQDelayEchoEnable = TRUE;
                break;
            }
            default:
            {
                PQ_LEVEL_PRINTF(PQ_DBG_INFO,"[PQ] Function default Index :%u \n",enFunctionIndex);
                break;
            }
        }
        return TRUE;
    }
    else if (bEnable == FALSE)
    {
        switch(enFunctionIndex)
        {
            case E_PQ_DNR:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK06_21_L,0,0x0003);
                break;
            }
            case E_PQ_UCNR:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK2A_07_L,0,BIT(0));
                MApi_XC_Write2ByteMask(REG_BK3385_07_L,0,BIT(7));
                break;
            }
            case E_PQ_ZNR:
            {
                PQ_LEVEL_PRINTF(PQ_DBG_INFO,"[PQ] Function no support \n");
                break;
            }
            case E_PQ_SPF:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK0C_70_L,BIT(0),BIT(0));
                MApi_XC_Write2ByteMask(REG_BK3350_01_L,BIT(3),BIT(3));
                break;
            }
            case E_PQ_DBK:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK0C_10_L,0,BIT(0));
                break;
            }
            case E_PQ_DMS:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK26_10_L,0,BIT(0));
                break;
            }
            case E_PQ_UCD:
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF00E_00_L,0,BIT(0));
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF00F_00_L,0,BIT(0));
                break;
            }
            case E_PQ_DLC:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK1A_04_L,0,BIT(7));
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF004_01_L,0,BIT(15));
                break;
            }
            case E_PQ_BWLE:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK1A_0D_L,0,BIT(7));
                break;
            }
            case E_PQ_SWDR:
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF004_01_L,0,BIT(14));
                break;
            }
            case E_PQ_VIP_ALL_BYPASS:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK27_70_L, 0,BIT(0));
                MApi_XC_Write2ByteMask(REG_BK3350_01_L,0,BIT(15));
                break;
            }
            case E_PQ_HSY:
            {
                MApi_XC_Write2ByteMask(REG_BK330B_02_L,0,0x0091);
                break;
            }
            case E_PQ_COLORENG_CBCR_BYPASS:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK18_06_L,0,BIT(10));
                break;
            }
            case E_PQ_FCC:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK1B_30_L,0,BIT(2));
                break;
            }
            case E_PQ_FWC:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK0F_70_L,0,BIT(0));
                break;
            }
            case E_PQ_ABF:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK58_10_L,0,BIT(7));
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF008_79_L,0,BIT(1));
                break;
            }
            case E_PQ_PRE_CTI:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK23_61_L,0,0x8004);
                break;
            }
            case E_PQ_POST_CTI:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK27_20_L,0,BIT(0));
                break;
            }
            case E_PQ_SHARPNESS:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK19_10_L,0,0x0051);
                MApi_XC_W2BYTEMSK(REG_SC_BK38_10_L,0,BIT(0));
                MApi_XC_W2BYTEMSK(REG_SC_BK76_70_L,0,BIT(0));
                MApi_XC_Write2ByteMask(REG_BK3360_10_L,0,BIT(4));
                break;
            }
            case E_PQ_PQ_GAMMA:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK10_50_L,0,BIT(0));
                break;
            }
            case E_PQ_PANEL_GAMMA:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK24_6D_L,0,BIT(12));
                break;
            }
            case E_PQ_3D_RGB:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK14_52_L,0,BIT(0));
                MApi_XC_W2BYTEMSK(REG_SC_BK14_64_L,0,BIT(0));
                break;
            }
            case E_PQ_RGB_GAIN:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK0F_53_L,0,0x0003);
                MApi_XC_W2BYTEMSK(REG_SC_BK25_01_L,0,0x0030);
                MApi_XC_W2BYTEMSK(REG_SC_BK24_5F_L,0,0xC000);
                break;
            }
            case E_PQ_LINEAR_RGB:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK25_01_L,BIT(8),BIT(8));
                break;
            }
            case E_PQ_PQ_DRIVER:
            {
                MDrv_PQ_VR_W2BYTEMSK(REG_BKF009_78_L,0,0x8001);
                break;
            }
            case E_PQ_SCALING_FILTER:
            {
                if(_u16ScalingTemp != 0)
                {
                    MApi_XC_W2BYTE(REG_SC_BK23_0B_L,_u16ScalingTemp);
                }
                else
                {
                    PQ_LEVEL_PRINTF(PQ_DBG_INFO,"[PQ] Please Check Bypass Scaling Filter first !! \n");
                }

                break;
            }
            case E_PQ_BRIGHTNESS:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK10_16_L,0,BIT(8));
                break;
            }
            case E_PQ_RGB_CLIP:
            {
                MApi_XC_W2BYTEMSK(REG_SC_BK0F_57_L,0,BIT(0));
                break;
            }
            case E_PQ_HALF_PQ_DELAY:
            {
                _gbHalfPQDelayEchoEnable = FALSE;
                break;
            }
            default:
            {
                PQ_LEVEL_PRINTF(PQ_DBG_INFO,"[PQ] Function default Index :%u \n",enFunctionIndex);
                break;
            }
        }
        return TRUE;
    }
    else
    {
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"[PQ] Enable overflow \n");
        return FALSE;
    }
}

MS_BOOL MHal_PQ_Get_Function_Control_Info(PQ_WIN UNUSED_PARA(enWindow),EN_PQ_FUNCTION_INFO_INDEX enFunctionIndex)
{
    MS_BOOL bEnable = FALSE;

    if(enFunctionIndex >= E_PQ_MAX)
    {
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"[PQ] Function Index overflow:%u \n",enFunctionIndex);
        return FALSE;
    }
    switch(enFunctionIndex)
    {
        case E_PQ_DNR:
        {
            bEnable = ((MApi_XC_R2BYTEMSK(REG_SC_BK06_21_L,0x0003)==0x0003)?TRUE:FALSE);

            break;
        }
        case E_PQ_UCNR:
        {
            bEnable = (((MApi_XC_R2BYTEMSK(REG_SC_BK2A_07_L,BIT(0))==BIT(0)) && ((MApi_XC_ReadByte(REG_BK3385_07_L) & BIT(0))==BIT(0)))?TRUE:FALSE);
            break;
        }
        case E_PQ_ZNR:
        {
            PQ_LEVEL_PRINTF(PQ_DBG_INFO,"[PQ] Function no support \n");
            break;
        }
        case E_PQ_SPF:
        {
            bEnable = (((MApi_XC_R2BYTEMSK(REG_SC_BK0C_70_L,BIT(0))==BIT(0)) && ((MApi_XC_ReadByte(REG_BK3350_01_L) & BIT(3))==BIT(3)))?FALSE:TRUE);
            break;
        }
        case E_PQ_DBK:
        {
            bEnable = ((MApi_XC_R2BYTEMSK(REG_SC_BK0C_10_L,BIT(0))==BIT(0))?TRUE:FALSE);
            break;
        }
        case E_PQ_DMS:
        {
            bEnable = ((MApi_XC_R2BYTEMSK(REG_SC_BK26_10_L,BIT(0))==BIT(0))?TRUE:FALSE);
            break;
        }
        case E_PQ_UCD:
        {
            bEnable = (((MDrv_PQ_VR_R2BYTEMSK(REG_BKF00E_00_L,BIT(0))==BIT(0))&&(MDrv_PQ_VR_R2BYTEMSK(REG_BKF00F_00_L,BIT(0))==BIT(0)))?TRUE:FALSE);
            break;
        }
        case E_PQ_DLC:
        {
            bEnable = (((MApi_XC_R2BYTEMSK(REG_SC_BK1A_04_L,BIT(7))==BIT(7))&&(MDrv_PQ_VR_R2BYTEMSK(REG_BKF004_01_L,BIT(15))==BIT(15)))?TRUE:FALSE);
            break;
        }
        case E_PQ_BWLE:
        {
            bEnable = ((MApi_XC_R2BYTEMSK(REG_SC_BK1A_0D_L,BIT(7))==BIT(7))?TRUE:FALSE);
            break;
        }
        case E_PQ_SWDR:
        {
            bEnable = ((MDrv_PQ_VR_R2BYTEMSK(REG_BKF004_01_L,BIT(14))==BIT(14))?TRUE:FALSE);
            break;
        }
        case E_PQ_VIP_ALL_BYPASS:
        {
            bEnable = (((MApi_XC_R2BYTEMSK(REG_SC_BK27_70_L,BIT(0))==BIT(0)) && ((MApi_XC_ReadByte(REG_BK3350_01_H) & BIT(7))==BIT(7)))?FALSE:TRUE);
            break;
        }
        case E_PQ_HSY:
        {
            bEnable = ((((MApi_XC_ReadByte(REG_BK330B_02_L) & BIT(0))==BIT(0)) &&
                        ((MApi_XC_ReadByte(REG_BK330B_02_L) & BIT(4))==BIT(4)) &&
                        ((MApi_XC_ReadByte(REG_BK330B_02_L) & BIT(7))==BIT(7)))?TRUE:FALSE);
            break;
        }
        case E_PQ_COLORENG_CBCR_BYPASS:
        {
            bEnable = ((MApi_XC_R2BYTEMSK(REG_SC_BK18_06_L,BIT(10))==BIT(10))?TRUE:FALSE);
            break;
        }
        case E_PQ_FCC:
        {
            bEnable = ((MApi_XC_R2BYTEMSK(REG_SC_BK1B_30_L,BIT(2))==BIT(2))?TRUE:FALSE);
            break;
        }
        case E_PQ_FWC:
        {
            bEnable = ((MApi_XC_R2BYTEMSK(REG_SC_BK0F_70_L,BIT(0))==BIT(0))?TRUE:FALSE);
            break;
        }
        case E_PQ_ABF:
        {
            bEnable = (((MApi_XC_R2BYTEMSK(REG_SC_BK58_10_L,BIT(0))==BIT(0)) && (MDrv_PQ_VR_R2BYTEMSK(REG_BKF008_79_L,BIT(1))==BIT(1)))?TRUE:FALSE);
            break;
        }
        case E_PQ_PRE_CTI:
        {
            bEnable = ((MApi_XC_R2BYTEMSK(REG_SC_BK23_61_L,0x8004)==0x8004)?TRUE:FALSE);
            break;
        }
        case E_PQ_POST_CTI:
        {
            bEnable = ((MApi_XC_R2BYTEMSK(REG_SC_BK27_20_L,BIT(0))==BIT(0))?TRUE:FALSE);
            break;
        }
        case E_PQ_SHARPNESS:
        {
            bEnable = (((MApi_XC_R2BYTEMSK(REG_SC_BK19_10_L,0x0051)==0x0051)&&
                       (MApi_XC_R2BYTEMSK(REG_SC_BK38_10_L,BIT(0))==BIT(0))&&
                       (MApi_XC_R2BYTEMSK(REG_SC_BK2A_70_L,BIT(0))==BIT(0))&&
                       ((MApi_XC_ReadByte(REG_BK3360_10_L) & BIT(4)) ==BIT(4)))?TRUE:FALSE);
            break;
        }
        case E_PQ_PQ_GAMMA:
        {
            bEnable = ((MApi_XC_R2BYTEMSK(REG_SC_BK10_50_L,BIT(0))==BIT(0))?TRUE:FALSE);
            break;
        }
        case E_PQ_PANEL_GAMMA:
        {
            bEnable = ((MApi_XC_R2BYTEMSK(REG_SC_BK24_6D_L,BIT(12))==BIT(12))?TRUE:FALSE);
            break;
        }
        case E_PQ_3D_RGB:
        {
            bEnable = (((MApi_XC_R2BYTEMSK(REG_SC_BK14_52_L,BIT(0))==BIT(0))&&(MApi_XC_R2BYTEMSK(REG_SC_BK14_64_L,BIT(0))==BIT(0)))?TRUE:FALSE);
            break;
        }
        case E_PQ_RGB_GAIN:
        {
            bEnable = (((MApi_XC_R2BYTEMSK(REG_SC_BK0F_53_L,0x0003)==0x0003)&&
                       (MApi_XC_R2BYTEMSK(REG_SC_BK25_01_L,0x0030)==0x0030)&&
                       (MApi_XC_R2BYTEMSK(REG_SC_BK24_5F_L,0xC000)==0xC000))?FALSE:TRUE);
            break;
        }
        case E_PQ_LINEAR_RGB:
        {
            bEnable = ((MApi_XC_R2BYTEMSK(REG_SC_BK25_01_L,BIT(8))==BIT(8))?FALSE:TRUE);
            break;
        }
        case E_PQ_PQ_DRIVER:
        {
            bEnable = ((MDrv_PQ_VR_R2BYTEMSK(REG_BKF009_78_L,0x8001)==0x8001)?FALSE:TRUE);
            break;
        }
        case E_PQ_SCALING_FILTER:
        {
            bEnable = ((MApi_XC_R2BYTE(REG_SC_BK23_0B_L)==0x0000)?TRUE:FALSE);
            break;
        }
        case E_PQ_BRIGHTNESS:
        {
            bEnable = ((MApi_XC_R2BYTEMSK(REG_SC_BK10_16_L,BIT(8))==BIT(8))?TRUE:FALSE);
            break;
        }
        case E_PQ_RGB_CLIP:
        {
            bEnable = ((MApi_XC_R2BYTEMSK(REG_SC_BK0F_57_L,BIT(0))==BIT(0))?TRUE:FALSE);
            break;
        }
        case E_PQ_HALF_PQ_DELAY:
        {
            bEnable = _gbIsHalfPQDelayEnable && _gbHalfPQDelayEchoEnable;
            break;
        }
        default:
        {
            PQ_LEVEL_PRINTF(PQ_DBG_INFO, "[PQ] Function default Index :%u \n",enFunctionIndex);
            break;
        }
    }
    return bEnable;
}

MS_U16 MHal_PQ_GetTMOModeLevelIndex(void* pInstance, PQ_WIN enWindow,MS_PQ_HDR_GRULE_INDEX  enHDRGRuleLevelIndex, MS_U16 u16Width, MS_U16 u16Height)
{
    MS_U16 u16PQTMOModeIdx = 0;
    MS_U16 u16TMOGRuleLevelIndex = 0;
    PQ_LEVEL_PRINTF(PQ_DBG_GRULE,"Window[%u] enSWDRGRuleLevelIndex is %u\n",enWindow,enHDRGRuleLevelIndex);
    if((E_PQ_HDR_OPEN_AUTO == enHDRGRuleLevelIndex) || (E_PQ_HDR_HLG_AUTO == enHDRGRuleLevelIndex))
    {
        if(PQ_IS_4K_INPUT(u16Width, u16Height))
        {
            if(IsSourceMultiMediaStreamingMode(enWindow,_enInputSourceType[enWindow]))
            {
                u16TMOGRuleLevelIndex = PQ_GRule_Lvl_TMO_MODE_High_NetStreaming_Main;
            }
            else
            {
                u16TMOGRuleLevelIndex = PQ_GRule_Lvl_TMO_MODE_High_Main;
            }
        }
        else
        {
            if(IsSourceMultiMediaStreamingMode(enWindow,_enInputSourceType[enWindow]))
            {
                u16TMOGRuleLevelIndex = PQ_GRule_Lvl_TMO_MODE_Mid_NetStreaming_Main;
            }
            else
            {
                u16TMOGRuleLevelIndex = PQ_GRule_Lvl_TMO_MODE_Mid_Main;
            }
        }
    }
    else if((E_PQ_HDR_OPEN_HIGH == enHDRGRuleLevelIndex) || (E_PQ_HDR_HLG_HIGH == enHDRGRuleLevelIndex))
    {
        if(IsSourceMultiMediaStreamingMode(enWindow,_enInputSourceType[enWindow]))
        {
            u16TMOGRuleLevelIndex = PQ_GRule_Lvl_TMO_MODE_High_NetStreaming_Main;
        }
        else
        {
            u16TMOGRuleLevelIndex = PQ_GRule_Lvl_TMO_MODE_High_Main;
        }
    }
    else if((E_PQ_HDR_OPEN_MID == enHDRGRuleLevelIndex) || (E_PQ_HDR_HLG_MID == enHDRGRuleLevelIndex))
    {
        if(IsSourceMultiMediaStreamingMode(enWindow,_enInputSourceType[enWindow]))
        {
            u16TMOGRuleLevelIndex = PQ_GRule_Lvl_TMO_MODE_Mid_NetStreaming_Main;
        }
        else
        {
            u16TMOGRuleLevelIndex = PQ_GRule_Lvl_TMO_MODE_Mid_Main;
        }
    }
    else if((E_PQ_HDR_OPEN_LOW == enHDRGRuleLevelIndex) || (E_PQ_HDR_HLG_LOW == enHDRGRuleLevelIndex))
    {
        if(IsSourceMultiMediaStreamingMode(enWindow,_enInputSourceType[enWindow]))
        {
            u16TMOGRuleLevelIndex = PQ_GRule_Lvl_TMO_MODE_Low_NetStreaming_Main;
        }
        else
        {
            u16TMOGRuleLevelIndex = PQ_GRule_Lvl_TMO_MODE_Low_Main;
        }
    }
    else
    {
        PQ_LEVEL_PRINTF(PQ_DBG_GRULE,"Not support this type = %d\n",enHDRGRuleLevelIndex);
        return PQ_INVALID_QMAP_INDEX;

    }

    u16PQTMOModeIdx = MDrv_PQ_GetTMOGRule_LevelIndex(pInstance, PQ_GRule_TMO_MODE_Main, u16TMOGRuleLevelIndex);
    PQ_LEVEL_PRINTF(PQ_DBG_GRULE,"u16TMOGRuleLevelIndex = %d,u16PQTMOModeIdx is %d\n",u16TMOGRuleLevelIndex,u16PQTMOModeIdx);
    return u16PQTMOModeIdx;
}

MS_U16 MHal_PQ_GetSWDRModeLevelIndex(void* pInstance, PQ_WIN enWindow, MS_PQ_SWDR_GRULE_INDEX enSWDRGRuleLevelIndex)
{
    MS_U16 u16PQSWDRModeIdx = 0;
    MS_U16 u16SWDRGRuleLevelIndex = 0;
    PQ_LEVEL_PRINTF(PQ_DBG_GRULE,"Window[%u] enSWDRGRuleLevelIndex is %u\n",enWindow,enSWDRGRuleLevelIndex);
    if((PQ_DynContr_OFF == MDrv_PQ_GetDLCModeStatus(enWindow))
        && (E_PQ_SWDR_OFF == MDrv_PQ_GetSWDRModeStatus(enWindow)))
    {
        enSWDRGRuleLevelIndex = E_PQ_SWDR_DLC_OFF;
        PQ_LEVEL_PRINTF(PQ_DBG_GRULE,"Window[%u] enSWDRGRuleLevelIndex is E_PQ_SWDR_DLC_OFF\n",enWindow);
    }

    if(E_PQ_SWDR_OFF == enSWDRGRuleLevelIndex)
    {
        u16SWDRGRuleLevelIndex = PQ_GRule_Lvl_SWDR_MODE_Off_Main;
    }
    else if(E_PQ_SWDR_LOW == enSWDRGRuleLevelIndex)
    {
        if(IsSourceMultiMediaStreamingMode(enWindow,_enInputSourceType[enWindow]))
        {
            u16SWDRGRuleLevelIndex = PQ_GRule_Lvl_SWDR_MODE_Low_NetStreaming_Main;
        }
        else
        {
            u16SWDRGRuleLevelIndex = PQ_GRule_Lvl_SWDR_MODE_Low_Main;
        }
    }
    else if(E_PQ_SWDR_MID == enSWDRGRuleLevelIndex)
    {
        if(IsSourceMultiMediaStreamingMode(enWindow,_enInputSourceType[enWindow]))
        {
            u16SWDRGRuleLevelIndex = PQ_GRule_Lvl_SWDR_MODE_Mid_NetStreaming_Main;
        }
        else
        {
            u16SWDRGRuleLevelIndex = PQ_GRule_Lvl_SWDR_MODE_Mid_Main;
        }
    }
    else if(E_PQ_SWDR_HIGH == enSWDRGRuleLevelIndex)
    {
        if(IsSourceMultiMediaStreamingMode(enWindow,_enInputSourceType[enWindow]))
        {
            u16SWDRGRuleLevelIndex = PQ_GRule_Lvl_SWDR_MODE_High_NetStreaming_Main;
        }
        else
        {
            u16SWDRGRuleLevelIndex = PQ_GRule_Lvl_SWDR_MODE_High_Main;
        }
    }
    else if(E_PQ_SWDR_AI_PQ == enSWDRGRuleLevelIndex)
    {
        u16SWDRGRuleLevelIndex = PQ_GRule_Lvl_SWDR_MODE_AI_PQ_Main;
    }
#if (PQ_SUPPORT_SWDR_VR_DLCOFF==1)
    else if(E_PQ_SWDR_DLC_OFF == enSWDRGRuleLevelIndex)
    {
        u16SWDRGRuleLevelIndex = PQ_GRule_Lvl_SWDR_MODE_DLC_Off_Main;
    }
#endif
    else
    {
        PQ_LEVEL_PRINTF(PQ_DBG_GRULE,"Not support this type = %d\n",enSWDRGRuleLevelIndex);
        return PQ_INVALID_QMAP_INDEX;
    }

    u16PQSWDRModeIdx = MDrv_PQ_GetTMOGRule_LevelIndex(pInstance, PQ_GRule_SWDR_MODE_Main, u16SWDRGRuleLevelIndex);
    PQ_LEVEL_PRINTF(PQ_DBG_GRULE,"u16SWDRGRuleLevelIndex = %d u16PQSWDRModeIdx is %d\n",u16SWDRGRuleLevelIndex,u16PQSWDRModeIdx);
    return u16PQSWDRModeIdx;
}

MS_U16 MHal_PQ_GetDLCSettingModeLevelIndex(void* pInstance, PQ_WIN enWindow, EN_PQ_DLC_GRULE_INDEX enDLCGRuleLevelIndex)
{
    PQ_LEVEL_PRINTF(PQ_DBG_GRULE,"Window[%u] enDLCGRuleLevelIndex is %u\n",enWindow,enDLCGRuleLevelIndex);

    MS_U16 u16PQDLCModeIdx=0;
    MS_U16 u16DLCSettingModeGRuleLevelIndex = 0;

    if(E_PQ_DLC_DEFAULT == enDLCGRuleLevelIndex)
    {
        if(IsSourceMultiMediaStreamingMode(enWindow,_enInputSourceType[enWindow]))
        {
            u16DLCSettingModeGRuleLevelIndex = PQ_GRule_Lvl_DLC_Setting_MODE_Mid_NetStreaming_Main;
        }
        else
        {
            u16DLCSettingModeGRuleLevelIndex = PQ_GRule_Lvl_DLC_Setting_MODE_Mid_Main;
        }
    }
    else if(E_PQ_DLC_LOW == enDLCGRuleLevelIndex)
    {
        if(IsSourceMultiMediaStreamingMode(enWindow,_enInputSourceType[enWindow]))
        {
            u16DLCSettingModeGRuleLevelIndex = PQ_GRule_Lvl_DLC_Setting_MODE_Low_NetStreaming_Main;
        }
        else
        {
            u16DLCSettingModeGRuleLevelIndex = PQ_GRule_Lvl_DLC_Setting_MODE_Low_Main;
        }
    }
    else if(E_PQ_DLC_MID == enDLCGRuleLevelIndex)
    {
        if(IsSourceMultiMediaStreamingMode(enWindow,_enInputSourceType[enWindow]))
        {
            u16DLCSettingModeGRuleLevelIndex = PQ_GRule_Lvl_DLC_Setting_MODE_Mid_NetStreaming_Main;
        }
        else
        {
            u16DLCSettingModeGRuleLevelIndex = PQ_GRule_Lvl_DLC_Setting_MODE_Mid_Main;
        }
    }
    else //E_PQ_DLC_HIGH == enDLCGRuleLevelIndex
    {
        if(IsSourceMultiMediaStreamingMode(enWindow,_enInputSourceType[enWindow]))
        {
            u16DLCSettingModeGRuleLevelIndex = PQ_GRule_Lvl_DLC_Setting_MODE_High_NetStreaming_Main;
        }
        else
        {
            u16DLCSettingModeGRuleLevelIndex = PQ_GRule_Lvl_DLC_Setting_MODE_High_Main;
        }
    }
    u16PQDLCModeIdx = MDrv_PQ_GetTMOGRule_LevelIndex(pInstance, PQ_GRule_DLC_Setting_MODE_Main, u16DLCSettingModeGRuleLevelIndex);
    PQ_LEVEL_PRINTF(PQ_DBG_GRULE,"u16DLCSettingModeGRuleLevelIndex = %d u16PQDLCModeIdx is %d\n",u16DLCSettingModeGRuleLevelIndex,u16PQDLCModeIdx);
    return u16PQDLCModeIdx;
}

MS_BOOL Hal_PQ_Autodownload_ReadSRAMwithRIU(ST_PQ_AUTODOWNLOAD_SRAM_WITH_RIU* pstReadSRAMInfo)
{
    if( pstReadSRAMInfo == NULL )
    {
        return FALSE;
    }
    switch(pstReadSRAMInfo->u16Client)
    {
        case SC_FILTER_Y_SRAM1:
        case SC_FILTER_Y_SRAM2:
        case SC_FILTER_Y_SRAM3:
        case SC_FILTER_Y_SRAM4:
            //enable Y SRAM read
            MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, BIT(0)|BIT(3), BIT(0)|BIT(1)|BIT(3));
            //select address that we want to read
            if((SC_FILTER_Y_SRAM3 == pstReadSRAMInfo->u16Client) || (SC_FILTER_Y_SRAM4 == pstReadSRAMInfo->u16Client))
            {
                pstReadSRAMInfo->u16Entry |= BIT(8);
            }
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (pstReadSRAMInfo->u16Entry & 0x1FF), 0x1FF);
            //toggle the read trigger
            MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, BIT(9), BIT(9));
            //read data
            pstReadSRAMInfo->u16ReadData[0] = MApi_XC_R2BYTE(REG_SC_BK23_46_L);
            pstReadSRAMInfo->u16ReadData[1] = MApi_XC_R2BYTE(REG_SC_BK23_47_L);
            pstReadSRAMInfo->u16ReadData[2] = MApi_XC_R2BYTE(REG_SC_BK23_48_L);
            pstReadSRAMInfo->u16ReadData[3] = MApi_XC_R2BYTE(REG_SC_BK23_4B_L);
            pstReadSRAMInfo->u16ReadData[4] = MApi_XC_R2BYTE(REG_SC_BK23_4C_L);
            pstReadSRAMInfo->u16ReadData[5] = MApi_XC_R2BYTE(REG_SC_BK23_4F_L);
            pstReadSRAMInfo->u16ReadData[6] = MApi_XC_R2BYTEMSK(REG_SC_BK23_50_L,0xFF);
        break;
        case SC_FILTER_C_SRAM1:
        case SC_FILTER_C_SRAM2:
        case SC_FILTER_C_SRAM3:
        case SC_FILTER_C_SRAM4:
            //enable C SRAM read
            MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, BIT(1)|BIT(3), BIT(0)|BIT(1)|BIT(3));
            //select address that we want to read
            MApi_XC_W2BYTEMSK(REG_SC_BK23_42_L, (pstReadSRAMInfo->u16Entry & 0x1FF), 0x1FF);
            //toggle the read trigger
            MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, BIT(9), BIT(9));
            //read data
            pstReadSRAMInfo->u16ReadData[0] = MApi_XC_R2BYTE(REG_SC_BK23_46_L);
            pstReadSRAMInfo->u16ReadData[1] = MApi_XC_R2BYTE(REG_SC_BK23_47_L);
            pstReadSRAMInfo->u16ReadData[2] = MApi_XC_R2BYTEMSK(REG_SC_BK23_48_L,0xFF);
        break;
        default:
        break;
    }
    return TRUE;
}

MS_BOOL _HAL_PQ_CompareQMapWithRIU_YSRAM(MS_U8 *pu8QMapData,MS_U16 u16Client,EN_PQ_TEST_STATUS* penTestReport)
{
    PQ_TEST_LOG("PQ_TEST_LOG: YSRAM client = %d  [%s][%d]\n",u16Client, __func__, __LINE__);
    if((pu8QMapData==NULL) || (penTestReport==NULL))
    {
       return FALSE;
    }
    else
    {
        MS_U16 u16Count = 0;
        MS_U16 u16QMapCount = 0;
        MsOS_DelayTaskUs(50); //delay for autodownload finish, including HW setting is ready.
        *penTestReport = E_PQ_TEST_PASS;
        for(u16Count=0;u16Count<XC_AUTODOWNLOAD_HVSP_DEPTH;u16Count++)
        {
            //read SRAM throught RIU
            ST_PQ_AUTODOWNLOAD_SRAM_WITH_RIU stReadSRAMInfo;
            stReadSRAMInfo.bReadRIU = TRUE;
            stReadSRAMInfo.u16Client = u16Client;
            //Y SRAM entry address:
            //SRAM0: 0 - 127  ( BIT(7:0) ) + BIT(8)=0
            //SRAM1: 128 - 255( BIT(7:0) ) + BIT(8)=0
            //SRAM2: 0 - 127  ( BIT(7:0) ) + BIT(8)=1
            //SRAM3: 128 - 255( BIT(7:0) ) + BIT(8)=1
            if(SC_FILTER_Y_SRAM1 == u16Client)
            {
                stReadSRAMInfo.u16Entry = u16Count;
            }
            else if(SC_FILTER_Y_SRAM2 == u16Client)
            {
                stReadSRAMInfo.u16Entry = XC_AUTODOWNLOAD_HVSP_DEPTH + u16Count;
            }
            else if(SC_FILTER_Y_SRAM3 == u16Client)
            {
                stReadSRAMInfo.u16Entry = u16Count;
            }
            else
            {
                stReadSRAMInfo.u16Entry = XC_AUTODOWNLOAD_HVSP_DEPTH + u16Count;
            }

            stReadSRAMInfo.u16ReadData[0] = 0;
            stReadSRAMInfo.u16ReadData[1] = 0;
            stReadSRAMInfo.u16ReadData[2] = 0;
            stReadSRAMInfo.u16ReadData[3] = 0;
            stReadSRAMInfo.u16ReadData[4] = 0;
            stReadSRAMInfo.u16ReadData[5] = 0;
            stReadSRAMInfo.u16ReadData[6] = 0;
            if(Hal_PQ_Autodownload_ReadSRAMwithRIU(&stReadSRAMInfo))
            {
                //Compare RIU result with QMap Data
                if(stReadSRAMInfo.u16ReadData[0] != ( ((MS_U16)*(pu8QMapData+u16QMapCount)) |((MS_U16) *(pu8QMapData+u16QMapCount+1)) <<8))
                {
                    PQ_TEST_LOG("PQ_TEST_LOG: YSRAM Data1 entry=%d  RIU=0x%x QMap=0x%x  [%s][%d]\n",u16Count,stReadSRAMInfo.u16ReadData[0],( ((MS_U16)*(pu8QMapData+u16QMapCount)) | ((MS_U16)*(pu8QMapData+u16QMapCount+1)) <<8), __func__, __LINE__);
                    *penTestReport = E_PQ_TEST_FAIL;
                }
                if(stReadSRAMInfo.u16ReadData[1] != ( ((MS_U16)*(pu8QMapData+u16QMapCount+2)) | ((MS_U16)*(pu8QMapData+u16QMapCount+3)) <<8))
                {
                    PQ_TEST_LOG("PQ_TEST_LOG: YSRAM Data2 entry=%d  RIU=0x%x QMap=0x%x  [%s][%d]\n",u16Count,stReadSRAMInfo.u16ReadData[1],( ((MS_U16)*(pu8QMapData+u16QMapCount+2)) | ((MS_U16)*(pu8QMapData+u16QMapCount+3)) <<8), __func__, __LINE__);
                    *penTestReport = E_PQ_TEST_FAIL;
                }
                if(stReadSRAMInfo.u16ReadData[2] != ( ((MS_U16)*(pu8QMapData+u16QMapCount+4)) | ((MS_U16)*(pu8QMapData+u16QMapCount+5)) <<8))
                {
                    PQ_TEST_LOG("PQ_TEST_LOG: YSRAM Data3 entry=%d  RIU=0x%x QMap=0x%x  [%s][%d]\n",u16Count,stReadSRAMInfo.u16ReadData[2],( ((MS_U16)*(pu8QMapData+u16QMapCount+4)) | ((MS_U16)*(pu8QMapData+u16QMapCount+5)) <<8), __func__, __LINE__);
                    *penTestReport = E_PQ_TEST_FAIL;
                }
                if(stReadSRAMInfo.u16ReadData[3] != ( ((MS_U16)*(pu8QMapData+u16QMapCount+6)) | ((MS_U16)*(pu8QMapData+u16QMapCount+7)) <<8))
                {
                    PQ_TEST_LOG("PQ_TEST_LOG: YSRAM Data4 entry=%d  RIU=0x%x QMap=0x%x  [%s][%d]\n",u16Count,stReadSRAMInfo.u16ReadData[3],( ((MS_U16)*(pu8QMapData+u16QMapCount+6)) | ((MS_U16)*(pu8QMapData+u16QMapCount+7)) <<8), __func__, __LINE__);
                    *penTestReport = E_PQ_TEST_FAIL;
                }
                if(stReadSRAMInfo.u16ReadData[4] != ( ((MS_U16)*(pu8QMapData+u16QMapCount+8)) | ((MS_U16)*(pu8QMapData+u16QMapCount+9)) <<8))
                {
                    PQ_TEST_LOG("PQ_TEST_LOG: YSRAM Data5 entry=%d  RIU=0x%x QMap=0x%x  [%s][%d]\n",u16Count,stReadSRAMInfo.u16ReadData[4],( ((MS_U16)*(pu8QMapData+u16QMapCount+8)) | ((MS_U16)*(pu8QMapData+u16QMapCount+9)) <<8), __func__, __LINE__);
                    *penTestReport = E_PQ_TEST_FAIL;
                }
                if(stReadSRAMInfo.u16ReadData[5] != ( ((MS_U16)*(pu8QMapData+u16QMapCount+10)) | ((MS_U16)*(pu8QMapData+u16QMapCount+11)) <<8))
                {
                    PQ_TEST_LOG("PQ_TEST_LOG: YSRAM Data6 entry=%d  RIU=0x%x QMap=0x%x  [%s][%d]\n",u16Count,stReadSRAMInfo.u16ReadData[5],( ((MS_U16)*(pu8QMapData+u16QMapCount+10)) | ((MS_U16)*(pu8QMapData+u16QMapCount+11)) <<8), __func__, __LINE__);
                    *penTestReport = E_PQ_TEST_FAIL;
                }
                if(stReadSRAMInfo.u16ReadData[6] != ((MS_U16)*(pu8QMapData+u16QMapCount+12)))
                {
                    PQ_TEST_LOG("PQ_TEST_LOG: YSRAM Data7 entry=%d  RIU=0x%x QMap=0x%x  [%s][%d]\n",u16Count,stReadSRAMInfo.u16ReadData[6],((MS_U16)*(pu8QMapData+u16QMapCount+12)), __func__, __LINE__);
                    *penTestReport = E_PQ_TEST_FAIL;
                }

                u16QMapCount+=13;
            }
            else
            {
                *penTestReport = E_PQ_TEST_FAIL;
            }
        }
    }
    return TRUE;
}

MS_BOOL _HAL_PQ_CompareQMapWithRIU_CSRAM(MS_U8 *pu8QMapData,MS_U16 u16Client,EN_PQ_TEST_STATUS* penTestReport)
{
    PQ_TEST_LOG("PQ_TEST_LOG: CSRAM client = %d  [%s][%d]\n",u16Client, __func__, __LINE__);
    if((pu8QMapData==NULL) || (penTestReport==NULL))
    {
       return FALSE;
    }
    else
    {
        MS_U16 u16Count = 0;
        MS_U16 u16QMapCount = 0;
        MsOS_DelayTaskUs(50);
        *penTestReport = E_PQ_TEST_PASS;
        for(u16Count=0;u16Count<XC_AUTODOWNLOAD_HVSP_DEPTH/2;u16Count++)
        {
            //read SRAM throught RIU
            ST_PQ_AUTODOWNLOAD_SRAM_WITH_RIU stReadSRAMInfo;
            stReadSRAMInfo.bReadRIU = TRUE;
            stReadSRAMInfo.u16Client = u16Client;
            //C SRAM entry address:
            //SRAM0: 0 - 63
            //SRAM1: 64 - 127
            //SRAM2: 128 - 191
            //SRAM3: 192 - 255
            if(SC_FILTER_C_SRAM1 == u16Client)
            {
                stReadSRAMInfo.u16Entry = u16Count;
            }
            else if(SC_FILTER_C_SRAM2 == u16Client)
            {
                stReadSRAMInfo.u16Entry = XC_AUTODOWNLOAD_HVSP_DEPTH/2 + u16Count;
            }
            else if(SC_FILTER_C_SRAM3 == u16Client)
            {
                stReadSRAMInfo.u16Entry = XC_AUTODOWNLOAD_HVSP_DEPTH + u16Count;
            }
            else
            {
                stReadSRAMInfo.u16Entry = (XC_AUTODOWNLOAD_HVSP_DEPTH*3) /2 + u16Count;
            }

            stReadSRAMInfo.u16ReadData[0] = 0;
            stReadSRAMInfo.u16ReadData[1] = 0;
            stReadSRAMInfo.u16ReadData[2] = 0;
            if(Hal_PQ_Autodownload_ReadSRAMwithRIU(&stReadSRAMInfo))
            {
                //Compare RIU result with QMap Data
                if(stReadSRAMInfo.u16ReadData[0] != ( ((MS_U16)*(pu8QMapData+u16QMapCount)) | ((MS_U16)*(pu8QMapData+u16QMapCount+1)) <<8))
                {
                    PQ_TEST_LOG("PQ_TEST_LOG: CSRAM Data1 entry=%d  RIU=0x%x QMap=0x%x  [%s][%d]\n",u16Count,stReadSRAMInfo.u16ReadData[0],( ((MS_U16)*(pu8QMapData+u16QMapCount)) | ((MS_U16)*(pu8QMapData+u16QMapCount+1)) <<8), __func__, __LINE__);
                    *penTestReport = E_PQ_TEST_FAIL;
                }
                if(stReadSRAMInfo.u16ReadData[1] != ( ((MS_U16)*(pu8QMapData+u16QMapCount+2)) | ((MS_U16)*(pu8QMapData+u16QMapCount+3)) <<8))
                {
                    PQ_TEST_LOG("PQ_TEST_LOG: CSRAM Data2 entry=%d  RIU=0x%x QMap=0x%x  [%s][%d]\n",u16Count,stReadSRAMInfo.u16ReadData[1],( ((MS_U16)*(pu8QMapData+u16QMapCount+2)) | ((MS_U16)*(pu8QMapData+u16QMapCount+3)) <<8), __func__, __LINE__);
                    *penTestReport = E_PQ_TEST_FAIL;
                }
                if(stReadSRAMInfo.u16ReadData[2] != ((MS_U16)*(pu8QMapData+u16QMapCount+4)) )
                {
                    PQ_TEST_LOG("PQ_TEST_LOG: CSRAM Data3 entry=%d  RIU=0x%x QMap=0x%x  [%s][%d]\n",u16Count,stReadSRAMInfo.u16ReadData[2],*(pu8QMapData+u16QMapCount+4) , __func__, __LINE__);
                    *penTestReport = E_PQ_TEST_FAIL;
                }

                u16QMapCount+=5; // 5 Data be combined with one entry
            }
            else
            {
                *penTestReport = E_PQ_TEST_FAIL;
            }
        }
    }
    return TRUE;
}
MS_BOOL Hal_PQ_TestAutodownload(MS_U16 u16Client, EN_PQ_TEST_STATUS* penTestReport)
{
    if(penTestReport == NULL)
    {
        return FALSE;
    }
    *penTestReport = E_PQ_TEST_PASS;
    switch(u16Client)
    {
        case SC_FILTER_Y_SRAM1:
        {
            _HAL_PQ_CompareQMapWithRIU_YSRAM(pu8YSRAM1_QMapAddr,SC_FILTER_Y_SRAM1,penTestReport);
        }
        break;
        case SC_FILTER_Y_SRAM2:
        {
            _HAL_PQ_CompareQMapWithRIU_YSRAM(pu8YSRAM2_QMapAddr,SC_FILTER_Y_SRAM2,penTestReport);
        }
        break;
        case SC_FILTER_Y_SRAM3:
        {
            _HAL_PQ_CompareQMapWithRIU_YSRAM(pu8YSRAM3_QMapAddr,SC_FILTER_Y_SRAM3,penTestReport);
        }
        break;
        case SC_FILTER_Y_SRAM4:
        {
            _HAL_PQ_CompareQMapWithRIU_YSRAM(pu8YSRAM4_QMapAddr,SC_FILTER_Y_SRAM4,penTestReport);
        }
        break;
        case SC_FILTER_C_SRAM1:
        {
            _HAL_PQ_CompareQMapWithRIU_CSRAM(pu8CSRAM1_QMapAddr,SC_FILTER_C_SRAM1,penTestReport);
        }
        break;
        case SC_FILTER_C_SRAM2:
        {
            _HAL_PQ_CompareQMapWithRIU_CSRAM(pu8CSRAM2_QMapAddr,SC_FILTER_C_SRAM2,penTestReport);
        }
        break;
        case SC_FILTER_C_SRAM3:
        {
            _HAL_PQ_CompareQMapWithRIU_CSRAM(pu8CSRAM3_QMapAddr,SC_FILTER_C_SRAM3,penTestReport);
        }
        break;
        case SC_FILTER_C_SRAM4:
        {
            _HAL_PQ_CompareQMapWithRIU_CSRAM(pu8CSRAM4_QMapAddr,SC_FILTER_C_SRAM4,penTestReport);
        }
        break;
        default:
        break;
    }
    return TRUE;
}

static MS_BOOL _MHal_PQ_DS_AddByteCmd(MS_U32 u32Reg, MS_U8 u8Value, MS_U8 u8Mask, EN_DS_MODULE_SEL enDSsel)
{
    MS_U16 u16RegAddr = 0;
    MS_U16 u16TmpBank = 0;

    //Check input
    if(enDSsel >= E_DS_MODULE_MAX)
    {
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"Invalid input enDSsel = %s",enDSsel);
        return FALSE;
    }

    //Set SC BK
    if((u32Reg & 0xFF0000) == 0)
    {
        u32Reg |= BK_SCALER_BASE;
    }

    u16TmpBank = (u32Reg & 0xFFFF00) >> 8;
    u16RegAddr = (MS_U16)(u32Reg & 0x00FFFF);

    if((u16RegAddr%2)==0)
    {
        DS_REG[DS_REG_CNT].u16Value = u8Value;
        DS_REG[DS_REG_CNT].u16Mask  = u8Mask;
    }
    else
    {
        DS_REG[DS_REG_CNT].u16Value = u8Value<<8;
        DS_REG[DS_REG_CNT].u16Mask  = u8Mask<<8;
    }

    DS_REG[DS_REG_CNT].u16Addr  = u16RegAddr;
    DS_REG[DS_REG_CNT].u16Addr = (DS_REG[DS_REG_CNT].u16Addr/2) *2;
    DS_REG[DS_REG_CNT].u16Module = enDSsel;
    DS_REG[DS_REG_CNT].u16Bank = u16TmpBank;
    DS_REG_CNT++;

    if(DS_REG_CNT >= DS_PQ_MAX_NUM)
    {
        PQ_LEVEL_PRINTF(PQ_DBG_ERROR,"DS_CNT_OVERFLOW_ERROR CNT = %u, Max CNT = %u",DS_REG_CNT,DS_PQ_MAX_NUM);
        return FALSE;
    }
    return TRUE;
}

MS_BOOL MHal_PQ_Fire_HVSPXRule_ADL(void)
{
    MS_BOOL bRet = FALSE;

    //Set HVSP ADL to SW mode
    bRet = _MHal_PQ_DS_AddByteCmd(REG_SC_BK67_38_H, BIT(3), BIT(3), E_DS_MODULE_OP);
    if(bRet == TRUE)
    {
        //Fire HVSP ADL in DS
        bRet = _MHal_PQ_DS_AddByteCmd(REG_SC_BK67_39_H, BIT(3), BIT(3), E_DS_MODULE_OP);
        return bRet;
    }

    return bRet;
}

MS_BOOL MHal_PQ_IsHalfPQDelaySupport(PQ_INPUT_SOURCE_TYPE enInputSourceType)
{
    MS_BOOL bRet = FALSE;

#if defined(PQDS_INFO_VERSION)&&(PQDS_INFO_VERSION >= 1)
    XC_PQDS_SUPPORTED_CAPS stCapsPQDS;
    stCapsPQDS.enPQDSType = E_PQ_DS_XRULE;
    stCapsPQDS.bSupported = FALSE;
    MApi_XC_GetChipCaps(E_XC_SUPPORT_PQ_DS, (MS_U32*)&stCapsPQDS, sizeof(XC_PQDS_SUPPORTED_CAPS));

    //1/2 PQ Delay Enable Condition:1.PQDS_XRule support 2.MVOP Source 3.SW Enable  4.EchoCMD Enable
    if(stCapsPQDS.bSupported && MApi_XC_GetDynamicScalingStatus() && QM_IsSourceMultiMedia(enInputSourceType))
    {
        if(SUPPORT_HALF_PQ_DELAY)
        {
            bRet = TRUE;
        }
    }
    PQ_LEVEL_PRINTF(PQ_DBG_DELAYTIME,"[1/2 PQ Delay] DS_XRule support:%s, Is MVOP Source:%s, SW Enable:%s, Echo Enable:%s\n"
                    ,(stCapsPQDS.bSupported && MApi_XC_GetDynamicScalingStatus())?("TRUE"):("FALSE")
                    , QM_IsSourceMultiMedia(enInputSourceType)?("TRUE"):("FALSE")
                    , SUPPORT_HALF_PQ_DELAY?("TRUE"):("FALSE")
                    , _gbHalfPQDelayEchoEnable?("TRUE"):("FALSE"));
#else
    PQ_LEVEL_PRINTF(PQ_DBG_DELAYTIME,"[1/2 PQ Delay] DS_XRule not support\n");
#endif

    _gbIsHalfPQDelayEnable = bRet;
    return (bRet && _gbHalfPQDelayEchoEnable);
}
MS_U16 MHal_PQ_GetHSVPHSizeCondition(void)
{
    /*
    Qmap Common Register Control ,4K Chip Default is 0, 2K Chip default is 1
    0:3840x6
    1:1920x6
    XC SW needs this values to switch DS_HVSP Xrule  Horizontal Points in code */
    MS_U16 u16HSVPPQsize = 0;
    if(MDrv_PQ_VR_R2BYTEMSK(REG_BKF004_01_L,BIT(0)) == 0)
    {
        u16HSVPPQsize = PQ_SIZE_1920;     //3840/2 = 1920
    }
    else
    {
        u16HSVPPQsize = (PQ_SIZE_1920>>1);//1920/2 = 960
    }
    PQ_LEVEL_PRINTF((PQ_DBG_HVSP|PQ_DBG_SRULE),"u16HSVPPQsize = %d",u16HSVPPQsize);
    return u16HSVPPQsize;
}

void Hal_PQ_ResumeYCSram(void *pInstance)
{
    if(pInstance != NULL)
    {
        if(_gu64YCSramIndex[SC_FILTER_C_SRAM1] != 0)
        {
            Hal_PQ_set_c_sram_table(pInstance, SC_FILTER_C_SRAM1,(void *)_gu64YCSramIndex[SC_FILTER_C_SRAM1]);
        }

        if(_gu64YCSramIndex[SC_FILTER_C_SRAM2] != 0)
        {
            Hal_PQ_set_c_sram_table(pInstance,SC_FILTER_C_SRAM2,(void *)_gu64YCSramIndex[SC_FILTER_C_SRAM2]);
        }

        if(_gu64YCSramIndex[SC_FILTER_C_SRAM3] != 0)
        {
            Hal_PQ_set_c_sram_table(pInstance,SC_FILTER_C_SRAM3,(void *)_gu64YCSramIndex[SC_FILTER_C_SRAM3]);
        }

        if(_gu64YCSramIndex[SC_FILTER_C_SRAM4] != 0)
        {
            Hal_PQ_set_c_sram_table(pInstance,SC_FILTER_C_SRAM4,(void *)_gu64YCSramIndex[SC_FILTER_C_SRAM4]);
        }

        if(_gu64YCSramIndex[SC_FILTER_Y_SRAM1] != 0)
        {
            Hal_PQ_set_y_sram_table(pInstance,SC_FILTER_Y_SRAM1,(void *)_gu64YCSramIndex[SC_FILTER_Y_SRAM1]);
        }

        if(_gu64YCSramIndex[SC_FILTER_Y_SRAM2] != 0)
        {
            Hal_PQ_set_y_sram_table(pInstance,SC_FILTER_Y_SRAM2,(void *)_gu64YCSramIndex[SC_FILTER_Y_SRAM2]);
        }

        if(_gu64YCSramIndex[SC_FILTER_Y_SRAM3] != 0)
        {
            Hal_PQ_set_y_sram_table(pInstance,SC_FILTER_Y_SRAM3,(void *)_gu64YCSramIndex[SC_FILTER_Y_SRAM3]);
        }

        if(_gu64YCSramIndex[SC_FILTER_Y_SRAM4] != 0)
        {
            Hal_PQ_set_y_sram_table(pInstance,SC_FILTER_Y_SRAM4,(void *)_gu64YCSramIndex[SC_FILTER_Y_SRAM4]);
        }
    }
}

MS_BOOL MHal_PQ_IsMMDSByPass(PQ_WIN enWindow)
{
    if(IsSourceMultiMediaPhotoMode(enWindow,_enInputSourceType[enWindow]))//PQ DS isn't suitable for photo
    {
        PQ_LEVEL_PRINTF(PQ_DBG_SRULE,"PQ DS isn't suitable for photo\n");
        return TRUE;
    }
    return FALSE;
}

MS_BOOL MHal_PQ_EnableCFDHSVPUpdate(MS_BOOL bEnable)
{
    if(bEnable == TRUE)
    {
        MDrv_PQ_VR_W2BYTE(REG_VR_BK05_06_L, 0x01);
    }
    else
    {
        MDrv_PQ_VR_W2BYTE(REG_VR_BK05_06_L, 0x0);
    }
    return TRUE;
}
