//<MStar Software>
//******************************************************************************
// MStar Software
// Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
// All software, firmware and related documentation herein ("MStar Software") are
// intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
// law, including, but not limited to, copyright law and international treaties.
// Any use, modification, reproduction, retransmission, or republication of all
// or part of MStar Software is expressly prohibited, unless prior written
// permission has been granted by MStar.
//
// By accessing, browsing and/or using MStar Software, you acknowledge that you
// have read, understood, and agree, to be bound by below terms ("Terms") and to
// comply with all applicable laws and regulations:
//
// 1. MStar shall retain any and all right, ownership and interest to MStar
//    Software and any modification/derivatives thereof.
//    No right, ownership, or interest to MStar Software and any
//    modification/derivatives thereof is transferred to you under Terms.
//
// 2. You understand that MStar Software might include, incorporate or be
//    supplied together with third party`s software and the use of MStar
//    Software may require additional licenses from third parties.
//    Therefore, you hereby agree it is your sole responsibility to separately
//    obtain any and all third party right and license necessary for your use of
//    such third party`s software.
//
// 3. MStar Software and any modification/derivatives thereof shall be deemed as
//    MStar`s confidential information and you agree to keep MStar`s
//    confidential information in strictest confidence and not disclose to any
//    third party.
//
// 4. MStar Software is provided on an "AS IS" basis without warranties of any
//    kind. Any warranties are hereby expressly disclaimed by MStar, including
//    without limitation, any warranties of merchantability, non-infringement of
//    intellectual property rights, fitness for a particular purpose, error free
//    and in conformity with any international standard.  You agree to waive any
//    claim against MStar for any loss, damage, cost or expense that you may
//    incur related to your use of MStar Software.
//    In no event shall MStar be liable for any direct, indirect, incidental or
//    consequential damages, including without limitation, lost of profit or
//    revenues, lost or damage of data, and unauthorized system use.
//    You agree that this Section 4 shall still apply without being affected
//    even if MStar Software has been modified by MStar in accordance with your
//    request or instruction for your use, except otherwise agreed by both
//    parties in writing.
//
// 5. If requested, MStar may from time to time provide technical supports or
//    services in relation with MStar Software to you for your use of
//    MStar Software in conjunction with your or your customer`s product
//    ("Services").
//    You understand and agree that, except otherwise agreed by both parties in
//    writing, Services are provided on an "AS IS" basis and the warranty
//    disclaimer set forth in Section 4 above shall apply.
//
// 6. Nothing contained herein shall be construed as by implication, estoppels
//    or otherwise:
//    (a) conferring any license or right to use MStar name, trademark, service
//        mark, symbol or any other identification;
//    (b) obligating MStar or any of its affiliates to furnish any person,
//        including without limitation, you and your customers, any assistance
//        of any kind whatsoever, or any information; or
//    (c) conferring any license or right under any intellectual property right.
//
// 7. These terms shall be governed by and construed in accordance with the laws
//    of Taiwan, R.O.C., excluding its conflict of law rules.
//    Any and all dispute arising out hereof or related hereto shall be finally
//    settled by arbitration referred to the Chinese Arbitration Association,
//    Taipei in accordance with the ROC Arbitration Law and the Arbitration
//    Rules of the Association by three (3) arbitrators appointed in accordance
//    with the said Rules.
//    The place of arbitration shall be in Taipei, Taiwan and the language shall
//    be English.
//    The arbitration award shall be final and binding to both parties.
//
//******************************************************************************
//<MStar Software>
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2008-2009 MStar Semiconductor, Inc.
// All rights reserved.
//
// Unless otherwise stipulated in writing, any and all information contained
// herein regardless in any format shall remain the sole proprietary of
// MStar Semiconductor Inc. and be kept in strict confidence
// ("MStar Confidential Information") by the recipient.
// Any unauthorized act including without limitation unauthorized disclosure,
// copying, use, reproduction, sale, distribution, modification, disassembling,
// reverse engineering and compiling of the contents of MStar Confidential
// Information is unlawful and strictly prohibited. MStar hereby reserves the
// rights to any and all damages, losses, costs and expenses resulting therefrom.
//
////////////////////////////////////////////////////////////////////////////////
//==============================================================================
// [mhal_sc.h]
// Date: 20081203
// Descriptions: Add a new layer for HW setting
//==============================================================================
#ifndef MHAL_SC_H
#define MHAL_SC_H

#ifdef MSOS_TYPE_LINUX_KERNEL
#include <asm/div64.h>
#else
#define do_div(x,y) ((x)/=(y))
#endif


#include "hwreg_sc.h"
#include "hwreg_mod.h"
#include "mhal_xc_chip_config.h"
#include "utopia_dapi.h"
//==============================================================================
#if (FRC_INSIDE && (HW_DESIGN_4K2K_VER == 6))
#define IsFSCOrFRCEnable() (pXCResourcePrivate->stdrvXC_MVideo_Context.g_bFSCEnabled \
            || ((!pXCResourcePrivate->stdrvXC_MVideo_Context.g_bFSCEnabled) \
            && pXCResourcePrivate->stdrvXC_MVideo_Context.g_bFRCEnabled))
#endif

// Scaling Ratio Macro
#ifdef MSOS_TYPE_LINUX_KERNEL
#define H_PreScalingDownRatio(Input, Output)                { u64_result = ((MS_U64)(Output))    * 2097152ul;do_div(u64_result,(Input));     u64_result +=1;do_div(u64_result,2);}
#define H_PreScalingDownRatioAdv(Input, Output)             { u64_result = ((MS_U64)(Input)-1)   * 2097152ul;do_div(u64_result,(Output-1));  u64_result +=1;do_div(u64_result,2);} //Advance scaling
#define H_PreScalingDownRatioAdv_No_Minus1(Input, Output)   { u64_result = ((MS_U64)(Input))     * 2097152ul;do_div(u64_result,((Output)) *2);}   //Advance scaling without minus 1
#if PIP_PATCH_USING_SC1_MAIN_AS_SC0_SUB
#define H_PreScalingDownRatio_SC1(Input, Output)                { u64_result = ((MS_U64)(Output))    * 1048576ul;do_div(u64_result,(Input));     u64_result +=1;}
#define H_PreScalingDownRatioAdv_SC1(Input, Output)             { u64_result = ((MS_U64)(Input)-1)   * 1048576ul;do_div(u64_result,(Output-1)); } //Advance scaling
#define H_PreScalingDownRatioAdv_No_Minus1_SC1(Input, Output)   { u64_result = ((MS_U64)(Input))     * 1048576ul;do_div(u64_result,(Output));}   //Advance scaling without minus 1
#endif
#define V_PreScalingDownRatio(Input, Output)                { u64_result = ((MS_U64)(Output))    * 1048576ul;do_div(u64_result,(Input));     u64_result +=1;} // CB mode
#define V_PreScalingDownRatioBilinear(Input, Output)        { u64_result = ((MS_U64)(Input)-1)   * 1048576ul;do_div(u64_result,((Output) -1));} // Bilinear

#define H_PostScalingRatio(Input, Output)                   { u64_result = ((MS_U64)(Input))     * 2097152ul;do_div(u64_result,(Output));    u64_result +=1;do_div(u64_result,2);}
#define H_PostScalingUpPhase(Input, Output)                 { u64_Phaseresult = ((MS_U64)(Input))     * 1048576ul;do_div(u64_Phaseresult,(Output));    u64_Phaseresult +=1048576ul; u64_Phaseresult +=1;do_div(u64_Phaseresult,2);}
#define H_PostScalingDownPhase(Input, Output)               { u64_Phaseresult = ((MS_U64)(Input))     * 1048576ul;do_div(u64_Phaseresult,(Output));    u64_Phaseresult =u64_Phaseresult - 1048576ul; u64_Phaseresult +=1;do_div(u64_Phaseresult,2);}
#define V_PostScalingRatio(Input, Output)                 { u64_result = ((MS_U64)(Input))     * 2097152ul;do_div(u64_result,(Output));    u64_result +=1;do_div(u64_result,2);}
#define V_PostScalingRatio_P2I(Input, Output)               { u64_result = ((MS_U64)(Input))     * 2097152ul;do_div(u64_result,(Output*2));}
#define V_PostScalingUpPhase(Input, Output)                 { u64_Phaseresult = ((MS_U64)(Input))     * 1048576ul;do_div(u64_Phaseresult,(Output));    u64_Phaseresult +=1048576ul; u64_Phaseresult +=1;do_div(u64_Phaseresult,2);}
#define V_PostScalingDownPhase(Input, Output)               { u64_Phaseresult = ((MS_U64)(Input))     * 1048576ul;do_div(u64_Phaseresult,(Output));    u64_Phaseresult =u64_Phaseresult - 1048576ul; u64_Phaseresult +=1;do_div(u64_Phaseresult,2);}

#else
// H_PreScalingDownRatio() was refined to reduce the calculation error.
// Use round up (x+y/2)/y might reduce the scaling ratio and induce right vertical garbage line.
// So use un-conditional add by 1 (x+y)/y.
#define H_PreScalingDownRatio(Input, Output)                ((MS_U32)( (((MS_U64)(Output)) * 2097152ul)/ (Input) + 1 ) /2)
#define H_PreScalingDownRatioAdv(Input, Output)             ((MS_U32)( (((MS_U64)(Input)-1) * 2097152ul)/ ((Output)-1) +1) /2) //Advance scaling
#define H_PreScalingDownRatioAdv_No_Minus1(Input, Output)   ((MS_U32)( (((MS_U64)(Input)) * 2097152ul)/ ((Output)) /2 ) )    //Advance scaling without minus 1
#if PIP_PATCH_USING_SC1_MAIN_AS_SC0_SUB
#define H_PreScalingDownRatio_SC1(Input, Output)                ( (((MS_U32)(Output)) * 1048576ul)/ (Input) + 1 )
#define H_PreScalingDownRatioAdv_SC1(Input, Output)             ( (((MS_U32)(Input)-1) * 1048576ul)/ ((Output)-1) ) //Advance scaling
#define H_PreScalingDownRatioAdv_No_Minus1_SC1(Input, Output)   ( (((MS_U32)(Input)) * 1048576ul)/ ((Output)) )     //Advance scaling without minus 1
#endif
#define V_PreScalingDownRatio(Input, Output)                ((MS_U32)( (((MS_U64)(Output)) * 1048576ul)/ (Input) + 1 )) // CB mode
#define V_PreScalingDownRatioBilinear(Input, Output)        ((MS_U32)( (((MS_U64)(Input)-1) * 1048576ul)/ ((Output) -1))) // Bilinear

#define H_PostScalingRatio(Input, Output)        ((MS_U32)( ((MS_U64)(Input)) * 2097152ul / (Output) + 1 )/2 )
#define H_PostScalingUpPhase(Input, Output)        ((MS_U32)( 1048576ul + ((MS_U64)(Input)) * 1048576ul / (Output) + 1 )/2 )
#define H_PostScalingDownPhase(Input, Output)        ((MS_U32)( ((MS_U64)(Input)) * 1048576ul / (Output) - 1048576ul + 1 )/2 )
//#define H_PostScalingRatioAdv(Input, Output)     ( ((MS_U32)(Input)-1) * 1048576ul / ((Output)-1) + 1 )
#define V_PostScalingRatio(Input, Output)        ((MS_U32)( ((MS_U64)(Input)) * 2097152ul / (Output) + 1 )/2 )
#define V_PostScalingUpPhase(Input, Output)        ((MS_U32)( 1048576ul + ((MS_U64)(Input)) * 1048576ul / (Output) + 1 )/2 )
#define V_PostScalingDownPhase(Input, Output)        ((MS_U32)( ((MS_U64)(Input)) * 1048576ul / (Output) - 1048576ul + 1 )/2 )
#define V_PostScalingRatio_P2I(Input, Output)        ((MS_U32)( ((MS_U64)(Input)) * 2097152ul / (Output) /2) )
#endif

#if (XC_H8ALIGN_PATCH || XC_V8ALIGN_PATCH)
#define XC8ALIGN(x) (((x) + 0x7) & (~0x7))
#endif

// In MDrv_SC_3D_Adjust_PreHorDstSize(),
// do a rough check after all, for 2 frame case.
#define ENABLE_2_FRAME_SIZE_PROTECTION  TRUE
//support Qmap MMDS XRule setting
#define PQ_DS_XRULE_SUPPORT 1

#if IRQ_CLEAN_INKERNEL
#define INTERRUPT_DUMMY_REGISTER  REG_SC_BK30_4C_L
#define INTERRUPT_DUMMY_REGISTER_H  REG_SC_BK30_4D_L
#define INTERRUPT_EXT_DUMMY_REGISTER_L  (REG_SC_BK4E_21_L)  //extend dummy register for ISR_L
#define INTERRUPT_EXT_DUMMY_REGISTER_H  (REG_SC_BK4E_22_L)  //extend dummy register for ISR_H
//CFD plus
#define CFD_PLUS_VERSION          (1)
#define IRQ_INT_DISP_NUM          (64)   //when you modify it, please modify DUMMY_MAPPING_TABLE_ARRAY at the same
#define IRQ_INT_DISP_DUMMY_NUM    (16)
#define CFD_PLUS_INTERRUPT_DUMMY_REGISTER       REG_SC_BK25_2F_L  //0: OP2, 1:IP1_ADJ, 2: HDR IP, 3: HDR descrb, 4: OP1, 5: EMP DMA, 6: F2_FRAME_RDY
#define DUMMY_MAPPING_TABLE_ARRAY       {0xFF,0xFF,0xFF,0xFF,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x04, \
                                         0x01,0xFF,0xFF,0xFF,0xFF,0x02,0x03,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, \
                                         0xFF,0xFF,0xFF,0xFF,0x06,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, \
                                         0xFF,0xFF,0xFF,0xFF,0x05,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF}
#endif

#define REG_MAXRGB_BANK_EXT_335D    (0x335D)
#define MAXRGB_H_START              (0x08)
#define MAXRGB_H_END                (0x0A)
#define MAXRGB_V_START              (0x0C)
#define MAXRGB_V_END                (0x0E)

// Decide DLC CaptureRange
#ifndef DLC_CaptureRange_SIX_OVER_EIGHT
#define DLC_CaptureRange_SIX_OVER_EIGHT 0
#endif

#define FORCEP_P_MODE_MADI_MODE (0x2000)
#define FORCEP_I_MODE_MADI_MODE (0x2500)
#define IPM_ACCESS_MODE_Y (0x1800)
#define IPM_ACCESS_MODE_YM (0x1900)

#define Hal_SC_Is_Need_Frc_Unmute(x) FALSE
#define Hal_SC_set_frc_black_screen(x,y)
#define Hal_SC_set_frc_black_screen_burst(x,y)
#define MHal_XC_GetDelayTime(x,y) 0

#define IS_ENHANCE_V_PRESCALING_DOWN(Input, Output)       (((Input * 2) > (Output * 3)) ? TRUE : FALSE)
#define IS_HDMI420_2P_OLD_CHIP_PATCH(arg...) (FALSE)
#define EDCLK_172MHZ         (172000000U)
#define EDCLK_345MHZ         (345000000U)
#define EDCLK_216MHZ         (216000000U)
#define EDCLK_192MHZ         (192000000U)
#define EDCLK_240MHZ         (240000000U)
#define EDCLK_320MHZ         (320000000U)

#define XC_SCMI_IPM_W_TRIGGER_SLOW_DOWN         (0x39)
#define XC_SCMI_IPM_W_STOP                      (0x43)
#define XC_SCMI_IPM_W_RELEASE_STOP              (0x30)
#define XC_SCMI_IPM_W_RELEASE_SLOW_DOWN         (0x26)

typedef enum
{
    E_XC_BANDWIDTH_SCMI_IPM_W = 0,
    E_XC_BANDWIDTH_NUM,
} EN_XC_BANDWIDTH_TYPE;

typedef enum
{
    E_XC_SAMPLE_VSTART_WITH_2YLOCK,
    E_XC_SAMPLE_VSTART_WITH_YLOCK,
    E_XC_SAMPLE_VSTART,
    E_XC_SAMPLE_VEND,
} EN_XC_MEMSYNC_TO_VS;

typedef struct
{
    MS_PHY u32IPMBase0;
    MS_PHY u32IPMBase1;
    MS_PHY u32IPMBase2;
    MS_U16 u16IPMOffset;
    MS_U16 u16IPMFetch;
    MS_U16 u16VLength;
    MS_PHY u32WriteLimitBase;

    MS_BOOL bLinearAddrMode;
    MS_BOOL bYCSeparate;

    MS_BOOL bMemFormat422;
    MS_BOOL bInterlace;
    MS_U8 u8BitPerPixel;
    MS_U8 u8FBNum;
} SC_FRAMEBUF_INFO_t;

typedef struct __attribute__((packed))
{
    MS_U16 u16MiuG0Mask;
    MS_U16 u16MiuG1Mask;
    MS_U16 u16MiuG2Mask;
    MS_U16 u16MiuG3Mask;
    MS_U16 u16MiuG4Mask;
    MS_U16 u16MiuG5Mask;
    MS_U16 u16MiuG6Mask;
    MS_U16 u16MiuG7Mask;
} SC_MIUMASK_t;

typedef struct
{
    MS_U8 u8MainFBSel;
    MS_U8 u8SubFBSel;
} SC_MIUSEL_t;

typedef struct __attribute__((packed))
{
    MS_U32 u32Sram1B : 10;
    MS_U32 u32Sram1G : 10;
    MS_U32 u32Sram1R : 10;
    MS_U32 u32Sram1Dummy : 1;
    MS_U32 u32Sram1En : 1;
    MS_U32 u32Sram2B : 10;
    MS_U32 u32Sram2G : 10;
    MS_U32 u32Sram2R : 10;
    MS_U32 u32Sram2Dummy : 1;
    MS_U32 u32Sram2En : 1;
    MS_U32 u32Sram3B : 10;
    MS_U32 u32Sram3G : 10;
    MS_U32 u32Sram3R : 10;
    MS_U32 u32Sram3Dummy : 1;
    MS_U32 u32Sram3En : 1;
    MS_U32 u32Sram4B : 10;
    MS_U32 u32Sram4G : 10;
    MS_U32 u32Sram4R : 10;
    MS_U32 u32Sram4Dummy : 1;
    MS_U32 u32Sram4En : 1;
    MS_U32 u32Sram5B : 10;
    MS_U32 u32Sram5G : 10;
    MS_U32 u32Sram5R : 10;
    MS_U32 u32Sram5Dummy : 1;
    MS_U32 u32Sram5En : 1;
    MS_U32 u32Sram6B : 10;
    MS_U32 u32Sram6G : 10;
    MS_U32 u32Sram6R : 10;
    MS_U32 u32Sram6Dummy : 1;
    MS_U32 u32Sram6En : 1;
    MS_U32 u32Sram7B : 10;
    MS_U32 u32Sram7G : 10;
    MS_U32 u32Sram7R : 10;
    MS_U32 u32Sram7Dummy : 1;
    MS_U32 u32Sram7En : 1;
    MS_U32 u32Sram8B : 10;
    MS_U32 u32Sram8G : 10;
    MS_U32 u32Sram8R : 10;
    MS_U32 u32Sram8Dummy : 1;
    MS_U32 u32Sram8En : 1;
}SC_XC_OP2LUT_3DLUT_DRAM_FORMAT;

typedef enum
{
    E_XC_FPLL_DIR_UNKNOWN,
    E_XC_FPLL_DIR_UP,
    E_XC_FPLL_DIR_DOWN,
} MS_XC_FPLL_DIRECTION;

typedef enum
{
    E_XC_FPLL_RES_WAITING,
    E_XC_FPLL_RES_TIMEOUT,
    E_XC_FPLL_RES_FINISHED,
} MS_XC_FPLL_RESULT;

typedef struct
{
    MS_U8  u8Debounce;
    MS_U16 u16PhaseDiff;
    MS_XC_FPLL_DIRECTION eFpllDir;
    MS_XC_FPLL_RESULT eFpllResult;
} MS_XC_GET_FPLL_PHASEDIFF;

typedef enum
{
    E_HAL_SC_3D_LRCHGMODE_OFF   = 0,
    E_HAL_SC_3D_LRCHGMODE_FRAME = 1,
    E_HAL_SC_3D_LRCHGMODE_BLOCK = 2,
    E_HAL_SC_3D_LRCHGMODE_LINE  = 3,
} HAL_SC_3D_LRCHGMODE;

typedef enum
{
    E_XC_FORCE_MEMORY_REQUEST_OFF_MAIN = 0,
    E_XC_FORCE_MEMORY_REQUEST_OFF_MAIN_DUAL,
    E_XC_FORCE_MEMORY_REQUEST_OFF_SUB,
    E_XC_FORCE_MEMORY_REQUEST_OFF_MAIN_OPW,
    E_XC_FORCE_MEMORY_REQUEST_OFF_SUB_OPW,
    E_XC_FORCE_MEMORY_REQUEST_OFF_ALL,
    E_XC_FORCE_MEMORY_REQUEST_OFF_NUM,
} E_XC_FORCE_MEMORY_REQUEST_OFF;

typedef struct DLL_PACKED {
    SCALER_WIN enWindow;
    MS_BOOL bUCMReqOff;  //TURE: Disable ZNR memroy access; FALSE: Enable ZNR memroy access;
    MS_BOOL bSCMIReqOff; //TURE: Disable XC memroy access; FALSE: Enable XC memroy access;
} ST_XC_MEM_REQ_CTRL;

typedef struct
{
    void* pInstance;
    MS_BOOL bEnable;
    SCALER_WIN eWindow;
}SC_SET_FORCE_CURRENT_READ_BANK_t;

typedef enum {
    EN_XC_PIXEL_SHIFT_INVALID = 0,
    EN_XC_PIXEL_SHIFT_DISABLE,
    EN_XC_PIXEL_SHIFT_ENABLE,
    EN_XC_PIXEL_SHIFT_FORCE_UPDATE,
} XC_PIXEL_SHIFT_STATUS;

typedef struct {
    //BK10
    MS_U16 u16RegTGenDeVstart;
    MS_U16 u16RegTGenDeVend;

    // BK68
    MS_U16 u16RegSTGenDeVstart;
    MS_U16 u16RegSTGenDeVend;
} XC_VSYNC_VSTART;

typedef struct xc_window_info{
    MS_U16 u16Hstart;
    MS_U16 u16Hend;
    MS_U16 u16Vstart;
    MS_U16 u16Vend;
}XC_WINDOW_INFO;

typedef struct xc_pixel_shift_win{
    //BK10
    struct xc_window_info stTGenFdeWin;
    struct xc_window_info stTGenMdeWin;

    // BK68
    struct xc_window_info stSTGenFdeWin;
    struct xc_window_info stSTGenMdeWin;

    //BK0F
    struct xc_window_info stPSFdeWin;
} XC_PIXEL_SHIFT_WIN;

typedef enum
{
        E_DELAY_TIME_UNKNOWN = 0,
        E_DELAY_TIME_FRC = 1,
}XC_DELAY_TIME_STATUS;

/// Define pcmonitor source type
typedef enum
{
    // new ip architecture
    E_PCMONITOR_SOURCE_VGA = 0,
    E_PCMONITOR_SOURCE_YPBPR,
    E_PCMONITOR_SOURCE_HDMI,
    E_PCMONITOR_SOURCE_HDMI2,
    E_PCMONITOR_SOURCE_HDMI3,
    E_PCMONITOR_SOURCE_HDMI4,
    E_PCMONITOR_SOURCE_NUM,
    E_PCMONITOR_SOURCE_INVALID = E_PCMONITOR_SOURCE_NUM,
}EN_PCMONITOR_SOURCE_TYPE_t;

typedef enum
{
  EN_XC_MIUCLIENT_IPOP = 0,
  EN_XC_MIUCLIENT_HSE = 1,
  EN_XC_MIUCLIENT_ALL = 2,
} EN_XC_MIUCLIENT_CONTROLTYPE;

typedef struct DLL_PACKED
{
    MS_U16 u16Htt_out;
    MS_U16 u16Vtt_out;
    MS_U16 u16TGEN_VsyncStart;
    MS_U16 u16TGEN_VsyncEnd;
}ST_XC_DISPLAYOUT_INFO;
//==============================================================================
//==============================================================================
#ifdef MHAL_SC_C
#define INTERFACE
#else
#define INTERFACE extern
#endif

INTERFACE void Hal_SC_setfield(void *pInstance, MS_U16 reg_1D, MS_U16 reg_21, MS_U16 reg_23, SCALER_WIN eWindow);

INTERFACE void Hal_SC_set_ficlk(void *pInstance, MS_BOOL bPreDown, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_shiftline(void *pInstance, MS_U8 u8Val, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_422_cbcr_swap(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_pre_align_pixel(void *pInstance, MS_BOOL bEnable, MS_U16 pixels, SCALER_WIN eWindow);
INTERFACE void Hal_XC_Set_FreeFRCMD(void *pInstance, MS_BOOL bEnable);
#define Hal_SC_force3fb(args...)
#define Hal_SC_force4fb(args...)
#define Hal_SC_force8fb(args...)
INTERFACE XC_FRAME_STORE_NUMBER Hal_SC_GetFrameStoreMode(void *pInstance, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_csc(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_wr_bank_mapping(void *pInstance, MS_U8 u8val, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_frcm_wr_bank_mapping(void *pInstance, MS_U8 u8val, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_wr_bank_mapping_num(void *pInstance, MS_U8 u8val, SCALER_WIN eWindow);
INTERFACE MS_U8 Hal_SC_Get_WR_Bank_Mapping(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_U8 Hal_SC_Get_WR_Bank_Mapping_Num(void *pInstance, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_delayline(void *pInstance, MS_U8 u8DelayLines, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_write_limit(void *pInstance, MS_PHY u32WritelimitAddrBase, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_dual_write_limit(void *pInstance, MS_PHY u32WritelimitAddrBase, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_frcm_write_limit(void *pInstance, MS_PHY u32WritelimitAddrBase, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_opm_write_limit(void *pInstance, MS_BOOL bEnable, MS_BOOL bFlag, MS_PHY u32OPWlimitAddr, SCALER_WIN eWindow);
INTERFACE void Hal_SC_sw_db(void *pInstance, P_SC_SWDB_INFO pDBreg, SCALER_WIN eWindow);
INTERFACE void Hal_SC_sw_db_burst(void *pInstance, P_SC_SWDB_INFO pDBreg, SCALER_WIN eWindow);
INTERFACE void Hal_SC_dual_sw_db_burst(void *pInstance, P_SC_SWDB_INFO pMainDBreg, P_SC_SWDB_INFO pSubDBreg);
INTERFACE E_APIXC_ReturnValue Hal_SC_VIP_Peaking_Setting(void *pInstance, SCALER_WIN eWindow);
INTERFACE E_APIXC_ReturnValue Hal_SC_support_source_to_ve(void *pInstance, MS_U16* OutputCapability);
INTERFACE E_APIXC_ReturnValue Hal_SC_set_output_capture_enable(void *pInstance, MS_BOOL bEnable,E_XC_SOURCE_TO_VE eSourceToVE);
INTERFACE void Hal_SC_set_de_window(void *pInstance, XC_PANEL_INFO *pPanel_Info);
INTERFACE void Hal_SC_get_disp_de_window(void *pInstance, MS_WINDOW_TYPE *pWin);
INTERFACE MS_PHY Hal_SC_Get_DNRBase0(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_PHY Hal_SC_Get_DNRBase1(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_PHY Hal_SC_Get_OPMBase0(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_PHY Hal_SC_Get_OPMBase1(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_PHY Hal_SC_Get_OPMBase2(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_PHY Hal_SC_Get_FRCMBaseAddr(void *pInstance, MS_U8 u8id,SCALER_WIN eWindow);
INTERFACE MS_U16 Hal_SC_Get_LBOffset(void *pInstance, SCALER_WIN eWindow);
INTERFACE void Hal_SC_Set_LBOffset(void *pInstance, MS_U16 u16LBOffset, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_DNRBase0(void *pInstance, MS_PHY u32DNRBase0, SCALER_WIN eWindow);
#define Hal_SC_set_DNRBase1(args...)
#define Hal_SC_set_DNRBase2(args...)
INTERFACE void Hal_SC_set_OPMBase0(void *pInstance, MS_PHY u32OPMBase0, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_OPMBase1(void *pInstance, MS_PHY u32OPMBase1, SCALER_WIN eWindow);
#define Hal_SC_set_OPMBase2(args...)
INTERFACE void Hal_SC_set_FRCM_WBase0(void *pInstance, MS_PHY u32FRCM_WBase0, SCALER_WIN eWindow);
#define Hal_SC_set_FRCM_WBase1(args...)
#define Hal_SC_set_FRCM_WBase2(args...)
INTERFACE void Hal_SC_set_FRCM_RBase0(void *pInstance, MS_PHY u32FRCM_RBase0, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_FRCM_RBase1(void *pInstance, MS_PHY u32FRCM_RBase1, SCALER_WIN eWindow);
#define Hal_SC_set_FRCM_RBase2(args...)
INTERFACE void Hal_SC_set_memoryaddress(void *pInstance, MS_PHY u32DNRBase0, MS_PHY u32DNRBase1, MS_PHY u32DNRBase2, MS_PHY u32OPMBase0, MS_PHY u32OPMBase1, MS_PHY u32OPMBase2, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_frcm_memoryaddress(void *pInstance, MS_PHY u32FRCM_WBase0, MS_PHY u32FRCM_WBase1, MS_PHY u32FRCM_WBase2, MS_PHY u32FRCM_RBase0, MS_PHY u32FRCM_RBase1, MS_PHY u32FRCM_RBase2, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_dual_memoryaddress(void *pInstance, MS_PHY u32DNRBase0, MS_PHY u32DNRBase1, MS_PHY u32DNRBase2, MS_PHY u32OPMBase0, MS_PHY u32OPMBase1, MS_PHY u32OPMBase2, SCALER_WIN eWindow);
INTERFACE void Hal_SC_Enable_MiuMask(void *pInstance, SCALER_WIN enWindow, EN_XC_MIUCLIENT_CONTROLTYPE enControlType);
INTERFACE void Hal_SC_Disable_MiuMask(void *pInstance, SCALER_WIN enWindow, EN_XC_MIUCLIENT_CONTROLTYPE enControlType);
INTERFACE void Hal_SC_set_miusel(void *pInstance, MS_U8 u8MIUSel, SCALER_WIN enWindow);
INTERFACE void Hal_SC_get_miusel(void *pInstance, SC_MIUSEL_t* stMIUSel, SCALER_WIN enWindow);
INTERFACE void Hal_SC_set_dual_miusel(void *pInstance, MS_U8 u8MIUSel);
INTERFACE void Hal_SC_get_dual_miusel(void *pInstance, SC_MIUSEL_t* stMIUSel);
INTERFACE void Hal_SC_set_dual_disable(void *pInstance);
INTERFACE void Hal_SC_set_blsk(void *pInstance, MS_BOOL bEn);
INTERFACE void Hal_SC_set_blsk_burst(void *pInstance, MS_BOOL bEn);

INTERFACE void Hal_SC_set_main_black_screen_burst(void *pInstance, MS_BOOL bEn);
INTERFACE void Hal_SC_set_main_sub_black_screen_burst(void *pInstance, MS_BOOL bEn);
INTERFACE void Hal_SC_set_sub_blue_screen_burst(void *pInstance, MS_BOOL bEn, MS_BOOL bBlue);
INTERFACE void Hal_SC_set_main_black_screen(void *pInstance, MS_BOOL bEn);
INTERFACE void Hal_SC_set_main_sub_black_screen(void *pInstance, MS_BOOL bEn);
INTERFACE void Hal_SC_set_sub_blue_screen(void *pInstance, MS_BOOL bEn, MS_BOOL bBlue);
INTERFACE E_APIXC_ReturnValue Hal_SC_IP_Memory_Write_Request(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE E_APIXC_ReturnValue Hal_SC_IP_Memory_Read_Request(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE E_APIXC_ReturnValue Hal_SC_OP_Memory_Write_Request(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE E_APIXC_ReturnValue Hal_SC_frcmw_Memory_Write_Request(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE E_APIXC_ReturnValue Hal_SC_frcmr_Memory_Read_Request(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_disable_inputsource_burst(void *pInstance, MS_BOOL bDisable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_disable_inputsource(void *pInstance, MS_BOOL bDisable, SCALER_WIN eWindow);
INTERFACE MS_U16 Hal_SC_Is_InputSource_Disable(void *pInstance, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_nosignal_color(void *pInstance, MS_U8 u8Color,SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_fbl(void *pInstance, MS_BOOL bEn);
INTERFACE MS_BOOL Hal_SC_get_fbl(void *pInstance);
INTERFACE void HAL_SC_Set_FB_Num(void *pInstance, SCALER_WIN eWindow, XC_FRAME_STORE_NUMBER eBestFBNum, MS_BOOL bInterlace);
INTERFACE void Hal_SC_set_freezeimg_burst(void *pInstance, MS_BOOL bEn, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_freezeimg(void *pInstance, MS_BOOL bEn, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_frcm_freezeimg(void *pInstance, MS_BOOL bEn, SCALER_WIN eWindow);
INTERFACE MS_BOOL Hal_SC_get_freezeimg(void *pInstance, SCALER_WIN eWindow);
INTERFACE void Hal_SC_ip_Init_for_internal_timing(void *pInstance, XC_Internal_TimingType timingtype, SCALER_WIN eWindow);
INTERFACE MS_U16 Hal_SC_rgb_average_info(void *pInstance, MS_U16 u16mask, SCALER_WIN eWindow);
INTERFACE void Hal_SC_autogain_enable(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE MS_BOOL Hal_SC_autogain_status(void *pInstance, SCALER_WIN eWindow);
INTERFACE void Hal_SC_init_riu_base(MS_VIRT u32riu_base, MS_VIRT u32PMriu_base, MS_VIRT u32EXTriu_base);
INTERFACE void Hal_SC_set_mirror(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_frcm_mirror(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE MS_U16 Hal_SC_GetAVDStatus(void);
INTERFACE void Hal_SC_set_rep_window(void *pInstance, MS_BOOL bEnable,MS_U16 x,MS_U16 y,MS_U16 w,MS_U16 h,MS_U8 u8Color);
INTERFACE void Hal_SC_set_disp_window(void *pInstance, SCALER_WIN eWindow, MS_WINDOW_TYPE *pdspwin);
INTERFACE void Hal_SC_get_disp_window(void *pInstance, SCALER_WIN eWindow, MS_WINDOW_TYPE *pdspwin);
INTERFACE void Hal_SC_set_Fclk(void *pInstance,EN_SET_FCLK_CASE enCase, MS_U16 u16ClkLevel);
INTERFACE void Hal_SC_get_framebuf_Info(void *pInstance, SC_FRAMEBUF_INFO_t *pFrameBufInfo, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_framebuf_Info(void *pInstance, SC_FRAMEBUF_INFO_t pFrameBufInfo);
INTERFACE MS_U8 HAL_SC_get_dnr_setting(void *pInstance, SCALER_WIN eWindow);
INTERFACE void HAL_SC_enable_dnr(void *pInstance, MS_U8 u8Val, SCALER_WIN eWindow);
INTERFACE void HAL_SC_enable_field_avg_y(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void HAL_SC_enable_field_avg_c(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE MS_U8 Hal_SC_get_cs_det_cnt(void *pInstance, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_linearmem_mode(MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_cs_det_cnt(void *pInstance, MS_U8 u8val, SCALER_WIN eWindow);
INTERFACE MS_U8 Hal_SC_get_plus_width(void *pInstance, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_opm_fetch(void *pInstance, SCALER_WIN eWindow, MS_U16 u16OPMFetch);
INTERFACE MS_U16 Hal_SC_get_opm_fetch(void *pInstance, SCALER_WIN eWindow);
INTERFACE void Hal_SC_SWDS_AddCmd(void *pInstance, P_SC_SWDB_INFO pDBreg, SCALER_WIN eWindow);
INTERFACE void Hal_SC_SWDS_AddPQCmd(void *pInstance,SCALER_WIN eWindow);
INTERFACE void Hal_SC_SWDS_Fire(void *pInstance, SCALER_WIN eWindow);

INTERFACE void HAL_SC_VOP_Set_Contrast_En(void *pInstance, MS_BOOL bEenable, SCALER_WIN eWindow);
INTERFACE void HAL_SC_VOP_Set_Contrast_Value(void *pInstance, MS_XC_VOP_CHANNEL_t eVop_Channel, MS_U16 u16Val, SCALER_WIN eWindow);
INTERFACE void HAL_SC_VOP_Set_Brightness_En(void *pInstance, MS_BOOL bEenable, SCALER_WIN eWindow);
INTERFACE void HAL_SC_VOP_Set_Brightness_Value(void *pInstance, MS_XC_VOP_CHANNEL_t eVop_Channel, MS_U16 u16Val, SCALER_WIN eWindow);

INTERFACE void HAL_SC_Enable_VInitFactor(void *pInstance, MS_BOOL bEnable,SCALER_WIN eWindow);
#define HAL_SC_Set_VInitFactorOne(args...);
INTERFACE void HAL_SC_Set_VInitFactorTwo(void *pInstance, MS_U32 u32Value,SCALER_WIN eWindow);
INTERFACE void HAL_SC_Set_vsd_input_line_count(void *pInstance, MS_BOOL bEnable,MS_BOOL bUserMode,MS_U32 u32UserLineCount,SCALER_WIN eWindow);
INTERFACE void HAL_SC_Set_vsd_output_line_count(void *pInstance, MS_BOOL bEnable,MS_U32 u32LineCount,SCALER_WIN eWindow);
INTERFACE MS_U32 Hal_SC_CheckSubWinPreScaling(MS_U16 u16ScaleDst,MS_BOOL bInterlace);
INTERFACE void HAL_SC_EnableFPLL(void);
INTERFACE MS_BOOL HAL_SC_WaitFPLLDone(void *pInstance);
INTERFACE MS_U16 HAL_SC_GetOutputVFreqX100(MS_U32 u32XTAL_Clock);
INTERFACE MS_BOOL Hal_SC_get_ip2_csc(void *pInstance, SCALER_WIN eWindow);

//Add for T3
INTERFACE void HAL_SC_FilmMode_Patch1(void *pInstance);

INTERFACE void HAL_SC_SetMainLineBufferOffset(void *pInstance, MS_U16 u16Linebuffer);
INTERFACE void HAL_SC_SetSubLineBufferOffset(void *pInstance, MS_U16 u16Linebuffer);
INTERFACE void HAL_SC_SetDisplay_LineBuffer_Mode(void *pInstance, MS_BOOL bEnable);
INTERFACE void HAL_SC_SetDisplay_Start_Mode(void *pInstance, MS_BOOL bEnable);
INTERFACE void HAL_SC_FillLineBuffer(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_enable_window(void *pInstance, MS_BOOL bEn,SCALER_WIN eWindow);
INTERFACE void Hal_SC_enable_window_burst(void *pInstance, MS_BOOL bEn,SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_trigger_signal(void);
INTERFACE void Hal_SC_Set_extra_fetch_line(void *pInstance, MS_U8 u8val);
INTERFACE void Hal_SC_Set_extra_adv_line(void *pInstance, MS_U8 u8val);
INTERFACE void Hal_SC_SetOPWriteOff(void *pInstance, MS_BOOL bEna);
INTERFACE MS_BOOL Hal_SC_GetOPWriteOff(void *pInstance);
INTERFACE MS_BOOL Hal_SC_get_pixel_rgb(void *pInstance, XC_Get_Pixel_RGB *pData);

// FPLL
void HAL_SC_Set_FPLL_Limit(void *pInstance, MS_U32 *u32PllSet, MS_U32 u32LowBound, MS_U32 u32UpBound, MS_BOOL _bInFPLLDbgMode, MS_U32 _U32LimitD5D6D7);

//Add for U4
#define Hal_SC_Set_OSD2VE(args...)
//Add for T4/Janus
INTERFACE MS_BOOL Hal_SC_IsOPMFetchPatch_Enable(void);
INTERFACE MS_BOOL Hal_SC_Check_HNonLinearScaling(void *pInstance);

//Add for T8 H3D reg handle
INTERFACE void Hal_XC_H3D_Enable(void *pInstance, MS_BOOL bEn);
INTERFACE void Hal_XC_H3D_Input3DType(void *pInstance, E_XC_3D_INPUT_MODE e3DType);
INTERFACE void Hal_XC_H3D_Breakline_Enable(void *pInstance, MS_BOOL bEn);
INTERFACE void Hal_XC_H3D_HDE(void *pInstance, MS_U16 u16Hde);
INTERFACE void Hal_XC_H3D_VDE_F0(MS_U16 u16Vde);
INTERFACE void Hal_XC_H3D_VDE_F2(MS_U16 u16Vde);
INTERFACE void Hal_XC_H3D_HBLANK(MS_U16 u16Hblank);
INTERFACE void Hal_XC_H3D_INIT_VBLANK(MS_U8 u8Vblank);
INTERFACE void Hal_XC_H3D_VBLANK0(MS_U8 u8Vblank);
INTERFACE void Hal_XC_H3D_VBLANK1(MS_U8 u8Vblank);
INTERFACE void Hal_XC_H3D_VBLANK2(MS_U8 u8Vblank);
INTERFACE void Hal_XC_H3D_VSYNC_WIDTH(MS_U8 u8Width);
INTERFACE void Hal_XC_H3D_VSYNC_POSITION(MS_U16 u16Position);
INTERFACE void Hal_XC_H3D_SELECT_REGEN_TIMING(MS_BOOL bEn);
INTERFACE void Hal_XC_H3D_LR_Toggle_Enable(void *pInstance, MS_BOOL bEn, MS_BOOL b2DTo3D, MS_BOOL bSkipDefaultLRFlag);
INTERFACE void HAL_XC_H3D_OPM_SBYS_PIP_Enable(void *pInstance, MS_BOOL bEn);

INTERFACE MS_BOOL Hal_SC_Detect_RequestFBL_Mode(void *pInstance);
INTERFACE MS_BOOL Hal_SC_Set_RequestFBL_Mode(void *pInstance, MS_BOOL bEn);
INTERFACE void Hal_XC_SetFrameColor(void *pInstance, MS_U32 u32aRGB);
INTERFACE MS_BOOL Hal_SC_is_extra_req_en(void *pInstance, MS_U16 *pu16MainHStart, MS_U16 *pu16MainHEnd, MS_U16 *pu16SubHStart,  MS_U16 *pu16SubHEnd);
INTERFACE MS_U8 Hal_SC_getVSyncWidth(void *pInstance, SCALER_WIN eWindow);
INTERFACE void Hal_SC_enable_cursor_report(void *pInstance, MS_BOOL bEn);

//Add for K1, just a dummy function at this chip
INTERFACE E_APIXC_ReturnValue Hal_SC_Set_OSDLayer(void *pInstance, E_VOP_OSD_LAYER_SEL  eVOPOSDLayer, SCALER_WIN eWindow);
INTERFACE E_VOP_OSD_LAYER_SEL Hal_SC_Get_OSDLayer(void *pInstance, SCALER_WIN eWindow);
INTERFACE E_APIXC_ReturnValue Hal_SC_Set_VideoAlpha(void *pInstance, MS_U8 u8Val, SCALER_WIN eWindow);
INTERFACE E_APIXC_ReturnValue Hal_SC_Get_VideoAlpha(void *pInstance, MS_U8 *pu8Val, SCALER_WIN eWindow);
INTERFACE E_APIXC_ReturnValue Hal_SC_SetOSDBlendingFormula(void *pInstance, E_XC_OSD_INDEX enOsdIndex, E_XC_OSD_BlENDING_TYPE enType, SCALER_WIN eWindow);
INTERFACE void Hal_XC_ClearScalingFactorForInternalCalib(void *pInstance );
INTERFACE MS_BOOL Hal_SC_IsHW2Dto3DPatch_Enable(void);

INTERFACE MS_U8 MHal_SC_cal_usedgain_to_reggain(MS_U32 u16UsedGain_x32);
INTERFACE E_APIXC_ReturnValue Hal_SC_OP2VOPDESel(void *pInstance, E_OP2VOP_DE_SEL eVopDESel);
INTERFACE MS_BOOL Hal_XC_SVOutput_GetCaps(void *pInstance);

INTERFACE void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk);
INTERFACE void _MHal_SC_Set_LPLL_Limit(MS_U32 u32LpllLimitHigh, MS_U32 u32LpllLimitLow, MS_U8 u8Lpll_bank);
INTERFACE void _MHal_SC_Flock_Set_IGainPGain(void *pInstance, MS_U8 u8FRC_Out, MS_U16 u16OutputVfreqAfterFRC, MS_U16 Htt, MS_U16 Vtt);
INTERFACE void _MHal_SC_Flock_Set_LPLL_Enable(E_XC_FLOCK_TYPE eFlock_type);

#define MHal_CLKGEN_FRC_Init(args...)
#define MHal_CLKGEN_FRC_Bypass_Enable(args...)

#define Hal_XC_IsForcePrescaling_3D Hal_XC_IsForcePrescaling
INTERFACE E_APIXC_ReturnValue Hal_XC_IsForcePrescaling(void *pInstance, const XC_InternalStatus *pSrcInfo, MS_BOOL *pbForceV, MS_BOOL *pbForceH, SCALER_WIN eWindow);
INTERFACE MS_U32 MHal_SC_Get_LpllSet_Factor(void *pInstance, MS_U8 u8LPLL_Mode, MS_U8 u8LPLL_Type,MS_U32 u32DefaultDClk);
INTERFACE MS_U32 MHal_SC_Get_LpllSet_Div(void *pInstance, MS_U8 u8LPLL_Mode, MS_U8 u8LPLL_Type,MS_U32 u32DefaultDClk);

INTERFACE E_APIXC_ReturnValue Hal_SC_Enable_AVMute(void *pInstance, SCALER_WIN eWindow);
INTERFACE E_APIXC_ReturnValue Hal_SC_Disable_AVMute(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_BOOL Hal_XC_GetPixelInfo(void *pInstance, MS_XC_REPORT_PIXELINFO *pstRepPixInfo);
INTERFACE MS_BOOL Hal_XC_SetPixelInfo(void *pInstance, MS_XC_REPORT_PIXELINFO *pstRepPixInfo, MS_BOOL bEnable);

INTERFACE void MHal_XC_Calc_IGainPGain(void *pInstance, MS_U8 *u8GainI, MS_U8 *u8GainP, MS_U32 u32XTAL_Clock, MS_U8 u8LGain, MS_U8 u8Vco, MS_U16 u16HTotal, MS_U16 u16VTotal, MS_U8 u8FRC_Out);

INTERFACE void Hal_SC_set_mrq_miusel(void *pInstance, MS_U8 u8MIUSel);
INTERFACE MS_PHY Hal_SC_get_mcdi_memoryaddressfromreg(void *pInstance, E_XC_MCDI_TYPE eType);
INTERFACE void Hal_SC_set_mcdi_memoryaddress(void *pInstance, MS_PHY u32FBAddress, E_XC_MCDI_TYPE eType);
INTERFACE void Hal_SC_set_mcdi_write_limit(void *pInstance, MS_BOOL bEn, MS_PHY u32LimitAddress, E_XC_MCDI_TYPE eType);
INTERFACE void Hal_SC_enable_mcdi(void *pInstance, MS_BOOL bEn, E_XC_MCDI_TYPE eType);

INTERFACE void Hal_SC_set_bws_mode(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_sw_lcnt_en(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_sw_lcnt(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_ipmw_lcnt_inv(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_ipmr_lcnt_inv(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_opm_lcnt_inv(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);

INTERFACE void MHAL_SC_set_osdc_tgen_hsync_start(void *pInstance, MS_U16 u16Value);
INTERFACE void MHAL_SC_set_osdc_tgen_hsync_end(void *pInstance, MS_U16 u16Value);
INTERFACE void MHAL_SC_set_osdc_tgen_hframe_de_start(void *pInstance, MS_U16 u16Value);
INTERFACE void MHAL_SC_set_osdc_tgen_hframe_de_end(void *pInstance, MS_U16 u16Value);
INTERFACE void MHAL_SC_set_osdc_tgen_htotal(void *pInstance, MS_U16 u16Value);
INTERFACE void MHAL_SC_set_osdc_tgen_vtotal(void *pInstance, MS_U16 u16Value);
INTERFACE void MHAL_SC_set_osdc_tgen_vframe_de_start(void *pInstance, MS_U16 u16Value);
INTERFACE void MHAL_SC_set_osdc_tgen_vframe_de_end(void *pInstance, MS_U16 u16Value);
INTERFACE void MHAL_SC_set_osdc_tgen_vsync_start(void *pInstance, MS_U16 u16Value);
INTERFACE void MHAL_SC_set_osdc_tgen_vsync_end(void *pInstance, MS_U16 u16Value);
INTERFACE void MHAL_SC_set_osdc_tgen_reset_enable(void *pInstance, MS_BOOL bEnable);
INTERFACE void MHAL_SC_set_osdc_swreset_enable(void *pInstance, MS_BOOL bEnable);
INTERFACE void MHAL_SC_set_osdc_mixer_bypass_enable(void *pInstance, MS_BOOL bEnable);
INTERFACE void MHAL_SC_set_osdc_mixer_inv_alpha_enable(void *pInstance, MS_BOOL bEnable);
INTERFACE void MHAL_SC_set_osdc_mixer_hs_n_vfde_enable(void *pInstance, MS_BOOL bEnable);
INTERFACE void MHAL_SC_set_osdc_mixer_hfde_n_vfde_enable(void *pInstance, MS_BOOL bEnable);
INTERFACE void MHAL_SC_enable_osdc(void *pInstance, MS_BOOL bEnable);
INTERFACE void MHAL_SC_PowerDownOSDCLPLL(MS_BOOL bEnable);
INTERFACE void MHAL_SC_set_osdc_clk_mux(void *pInstance, MS_U8 u8Clk_Mux);

INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_hsync_start(void *pInstance);
INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_hsync_end(void *pInstance);
INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_hframe_de_start(void *pInstance);
INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_hframe_de_end(void *pInstance);
INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_htotal(void *pInstance);
INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_vtotal(void *pInstance);
INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_vframe_de_start(void *pInstance);
INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_vframe_de_end(void *pInstance);
INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_vsync_start(void *pInstance);
INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_vsync_end(void *pInstance);
INTERFACE MS_BOOL MHAL_SC_get_osdc_mixer_bypass_status(void *pInstance);
INTERFACE MS_BOOL MHAL_SC_get_osdc_mixer_inv_alpha_status(void *pInstance);
INTERFACE MS_BOOL MHAL_SC_get_osdc_mixer_hs_n_vfde_status(void *pInstance);
INTERFACE MS_BOOL MHAL_SC_get_osdc_mixer_hfde_n_vfde_status(void *pInstance);
INTERFACE MS_BOOL MHAL_SC_get_osdc_onoff_status(void *pInstance);

INTERFACE void MHal_XC_SetForceReadBank(void *pInstance, MS_BOOL bEnable, MS_U8 u8Bank, SCALER_WIN eWindow);
#define MHal_XC_SetForceCurrentReadBank(args...)
#define Hal_SC_SetPX2MemFormat(args...) 0
#define Hal_SC_IsPX2MemFormat(args...) 0

INTERFACE MS_BOOL MHal_XC_SetDNRBufAddress(void *pInstance, MS_PHY u32DNRBaseAddr, SCALER_WIN eWindow);
INTERFACE MS_PHY MHal_XC_GetDNRBufAddress(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_BOOL MHal_XC_SetDNRBufSize(void *pInstance, MS_PHY u32DNRBufSize, SCALER_WIN eWindow);
INTERFACE MS_PHY MHal_XC_GetDNRBufSize(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_BOOL MHal_XC_SetFRCMBufAddress(void *pInstance, MS_PHY u32BaseAddr, SCALER_WIN eWindow);
INTERFACE MS_PHY MHal_XC_GetFRCMBufAddress(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_BOOL MHal_XC_SetFRCMBufSize(void *pInstance, MS_PHY u32BufSize, SCALER_WIN eWindow);
INTERFACE MS_PHY MHal_XC_GetFRCMBufSize(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_BOOL MHal_XC_SetDualDNRBufAddress(void *pInstance, MS_PHY u32DNRBaseAddr, SCALER_WIN eWindow);
INTERFACE MS_PHY MHal_XC_GetDualDNRBufAddress(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_BOOL MHal_XC_SetDualDNRBufSize(void *pInstance, MS_PHY u32DNRBufSize, SCALER_WIN eWindow);
INTERFACE MS_PHY MHal_XC_GetDualDNRBufSize(void *pInstance, SCALER_WIN eWindow);

INTERFACE MS_BOOL MHal_XC_Init_Patch(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE E_APIXC_ReturnValue Hal_SC_SetOSDDetect(void *pInstance, MS_BOOL bEnable, MS_U32 Threhold);
INTERFACE E_APIXC_ReturnValue Hal_SC_GetOSDDetect(void *pInstance, MS_BOOL *pbOSD);

#define MHal_XC_ByPass_SetOSDVsyncPos(args...)
#define MHal_XC_Bypass_SetinputSrc(args...)
#define MHal_XC_BYPASS_Setinputclk(args...)
#define MHal_XC_BYPASS_SetCSC(args...)
#define MHal_XC_Refine_FrameNum(args...)

//Vtrack
#define MHal_XC_Vtrack_SetPayloadData(args...) E_APIXC_RET_FAIL_FUN_NOT_SUPPORT
#define MHal_XC_Vtrack_SetUserDefindedSetting(args...) E_APIXC_RET_FAIL_FUN_NOT_SUPPORT
#define MHal_XC_Vtrack_Enable(args...) E_APIXC_RET_FAIL_FUN_NOT_SUPPORT
//Bypass mode
#define MHal_XC_Check_Bypass(args...) 0

INTERFACE void HAL_SC_Set_LB_MergeAddress(void *pInstance);
INTERFACE MS_BOOL MHal_XC_IsPNLYUVOutput(void *pInstance);
INTERFACE void MHal_XC_DTVPatch(void *pInstance, SCALER_WIN eWindow);

#ifndef DONT_USE_CMA
#if (XC_SUPPORT_CMA ==TRUE)
INTERFACE void MHal_XC_CMAPatch(void *pInstance, SCALER_WIN eWindow);
INTERFACE void MHal_XC_CMAPatchClose(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_BOOL MHal_XC_Get_CMA_UsingCondition(void *pInstance, MS_BOOL bIsGetCMABuff[], MS_U32 au32CMAMemSCMSize[],MS_U32 au32CMAMemFRCMSize[], MS_U32* pu32DualMiuMemSize, MS_U32 u32DataSize, SCALER_WIN eWindow);
INTERFACE MS_BOOL MHal_XC_Release_CMA(void *pInstance, XC_CMA_CLIENT enCmaClient, SCALER_WIN eWindow);
INTERFACE MS_U64 MHal_XC_Get_CMA_Addr(void *pInstance, XC_CMA_CLIENT enCmaClient, MS_U32 u32GetCMASize, SCALER_WIN eWindow);
#endif
#endif

#define HAL_SC_Set_vsd_3D_autofactor_reset(args...)

INTERFACE void MHal_SC_set_manual_rbank_switch_cnt(void *pInstance, MS_BOOL bEnable, MS_U16 u16SwitchCnt, SCALER_WIN eWindow);
INTERFACE MS_BOOL Hal_SC_Init(void *pInstance);
INTERFACE MS_U32 Hal_SC_Get_Device_Offset(MS_U8 deviceIdx);

INTERFACE void Hal_SC_set_edclk(void *pInstance, MS_U8 u8Clk_Mux, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_ficlk2(void *pInstance, MS_U8 u8Clk_Mux, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_fmclk(void *pInstance, MS_BOOL bEnable);
INTERFACE void HAL_SC_EnableLegacyMode(void *pInstance, MS_BOOL bEnable);
INTERFACE void MHAL_SC_set_r2y_en(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE MS_BOOL MHAL_SC_get_r2y_en_status(void *pInstance, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_T3D_setting(void *pInstance, MS_BOOL bEnable);
INTERFACE void Hal_SC_set_T3D_H_size(void *pInstance, MS_U16 u16Hsize);
INTERFACE MS_BOOL Hal_SC_3D_Is_LR_Sbs2Line(void *pInstance);
INTERFACE void Hal_SC_3D_SetLRChgMode(void *pInstance, HAL_SC_3D_LRCHGMODE eLRChgMode);
INTERFACE void Hal_SC_3D_SetInitialLRIndex(void *pInstance, MS_BOOL bRFirst);
INTERFACE void Hal_SC_3D_SetSplitHalf(void *pInstance, MS_BOOL bEnable);
INTERFACE void Hal_SC_3D_CopyDispWinToSTGEN(void *pInstance, SCALER_WIN eWindow);

INTERFACE void Hal_SC_set_frcm_to_FD_mask(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_3D_set_top_win_6Tap(void *pInstance, MS_BOOL bEnable);
INTERFACE void Hal_SC_set_frcm_to_freeze(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_3D_SetActiveVideoHeight(void *pInstance, MS_U16 u16VideoSize);
INTERFACE void Hal_SC_3D_SetActiveBlankSize0(void *pInstance, MS_U16 u16BlankSize);
INTERFACE void Hal_SC_3D_SetActiveBlankSize1(void *pInstance, MS_U16 u16BlankSize);
INTERFACE void Hal_SC_3D_SetActiveVideoWidth(void *pInstance, MS_U16 u16VideoSize);
INTERFACE void Hal_SC_3D_SetActiveVideoHeightAfterVSD(void *pInstance, MS_U16 u16VideoSize);
INTERFACE void Hal_SC_3D_SetFRCMActiveVideoHeightAfterVSD(void *pInstance, MS_U16 u16VideoSize);
INTERFACE void Hal_SC_3D_SetPixelSeparationWidth(void *pInstance, MS_U16 u16VideoSize);
INTERFACE void Hal_SC_3D_SetSoftware_F2VBottomEndPosition(void *pInstance, MS_U16 u16VideoSize);
INTERFACE void Hal_SC_3D_SetSoftware_F1VBottomStartPosition(void *pInstance, MS_U16 u16VideoSize);
INTERFACE void Hal_SC_3D_SetSoftware_F1VBottomEndPosition(void *pInstance, MS_U16 u16VideoSize);
INTERFACE void Hal_SC_SetHDMI_Spliter(void *pInstance,XC_IP_SYNC_STATUS *sXC_Sync_Status,E_MUX_INPUTPORT enInputPort ,SCALER_WIN eWindow);
INTERFACE void Hal_SC_Set_2pmode(void *pInstance,MS_BOOL benable_IP2p,MS_BOOL benable_OP2p,MS_BOOL benable_bypass_all_2p,SCALER_WIN eWindow);
INTERFACE MS_BOOL Hal_SC_check_opm_2pmode_timing(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_BOOL HAL_SC_set_bwr_config(void *pInstance, void *pstParam, SCALER_WIN eWindow);
INTERFACE MS_BOOL HAL_SC_set_bwr_config_burst(void *pInstance, void *pstParam, SCALER_WIN eWindow);
INTERFACE MS_BOOL Hal_SC_AdjustIpmWriteLimite(void *pInstance, MS_BOOL bIsLeft, MS_BOOL bNeedSwap, SCALER_WIN eWindow);
#define Hal_SC_3D_enable_FALLRR_out(args...)
INTERFACE void Hal_SC_3D_Adjust_PreHVscaling_SaveBW(void *pInstance, XC_InternalStatus *pSrcInfo, MS_BOOL *pb3DPreHScaling,MS_BOOL *pb3DPreVScaling,MS_BOOL bForcePreHScalingDown,MS_BOOL bForcePreVScalingDown,SCALER_WIN eWindow);
INTERFACE void Hal_SC_3D_InvertMemsyncInterlaceMode(void *pInstance);
INTERFACE void Hal_SC_Set_T3D_MiuSelectExternal(void *pInstance, MS_U8 u8MIUSel);
INTERFACE MS_BOOL MHal_XC_GetPQPathStatus(void* pInstance, E_XC_PQ_Path_Type ePqPathType, MS_U16 u16Width, MS_U16 u16Height);
INTERFACE void Hal_SC_3D_Enable_FRC_LR_Flag(void *pInstance, MS_BOOL bEnable);

#if FRC_INSIDE
INTERFACE void MHal_XC_FRCR2_IP_Patch(void *pInstance, SCALER_WIN eWindow);
INTERFACE void MHal_XC_FRCR2_IP_PatchClose(void *pInstance, SCALER_WIN eWindow);
INTERFACE void MHal_XC_FRCR2_OP_Patch(void *pInstance, SCALER_WIN eWindow);
INTERFACE void MHal_XC_FRCR2_OP_PatchClose(void *pInstance, SCALER_WIN eWindow);
#endif

#ifdef ENABLE_SPREADMODE
INTERFACE MS_BOOL MHal_XC_IsSupportSpreadMode(void *pInstance);
#endif


#ifdef UFO_XC_AUTO_DOWNLOAD
INTERFACE E_APIXC_ReturnValue MHal_XC_AutoDownload_Config(void* pInstance, EN_XC_AUTODOWNLOAD_CLIENT enClient, MS_PHY phyBaseAddr, EN_XC_AUTODOWNLOAD_MODE enMode, MS_U32 u32Size, MS_BOOL bEnable);
INTERFACE E_APIXC_ReturnValue MHal_XC_AutoDownload_Write(void* pInstance, EN_XC_AUTODOWNLOAD_CLIENT enClient, MS_U8* pu8Data, MS_U32 u32Size, void* pParam);
INTERFACE E_APIXC_ReturnValue MHal_XC_AutoDownload_Fire(void* pInstance, EN_XC_AUTODOWNLOAD_CLIENT enClient);
INTERFACE E_APIXC_ReturnValue MHal_XC_GetAutoDownloadCaps(EN_XC_AUTODOWNLOAD_CLIENT enClient, MS_BOOL *pbSupported);
#endif

#ifdef UFO_XC_HDR
#if (UFO_XC_HDR_VERSION == 2)
INTERFACE E_APIXC_ReturnValue MHal_XC_HDR_Control(void* pInstance, EN_XC_HDR_CTRL_TYPE enCtrlType, void *pParam);
INTERFACE E_APIXC_ReturnValue MHal_XC_HDR_GetCaps(void *pInstance, XC_HDR_SUPPORTED_CAPS *pstHDRCaps);
#endif
#endif

#ifdef CONFIG_MSTAR_SRAMPD
INTERFACE E_APIXC_ReturnValue MHal_XC_SRAM_PowerDown_Control(void* pInstance, MS_BOOL bEnable);
INTERFACE MS_BOOL MHal_XC_Is_SRAM_PowerDown(void* pInstance);
INTERFACE void MHal_XC_Set_LD_SRAM_Power_Down(void* pInstance, MS_BOOL bIsSRAMPowerDown);
INTERFACE void MHal_XC_Set_ADC_SRAM_Power_Down(void* pInstance, MS_BOOL bIsSRAMPowerDown);
INTERFACE void Hal_SC_Sub_SRAM_PowerDown_Control(void *pInstance, MS_BOOL bPipEnable);
#endif
INTERFACE MS_BOOL Hal_SC_get_pre_align_pixel(void * pInstance, SCALER_WIN eWindow);
INTERFACE MS_BOOL MHal_XC_PixelShiftStatusChange(void* pInstance, XC_PIXEL_SHIFT_STATUS enStatus);
#define MHal_XC_GetWinInfo(args...)
#define MHal_XC_UpdatePixelShiftWindow(args...)
#define MHal_XC_UpdateDispWindow(args...)
#define MHal_XC_UpdateFdeWindow(args...)
#define MHal_XC_Set1PShift(args...)
INTERFACE void MHal_XC_SetVopVttByBK68(void* pInstance, MS_U16 u16Vtt, MS_BOOL bMLoadEnable);
INTERFACE MS_BOOL Hal_SC_CheckMuteStatusByRegister(void *pInstance, SCALER_WIN eWindow);
INTERFACE void Hal_SC_add_reg_to_shm(void *pInstance,SCALER_WIN eWindow,MS_U32 u32_bk,MS_U16 u16_value,MS_U16 u16_mask);
INTERFACE void Hal_SC_add_dram_to_shm(void *pInstance,SCALER_WIN eWindow,MS_PHY u32address,MS_U32 u32length);
INTERFACE MS_BOOL Hal_SC_secure_lock(void *pInstance, SCALER_WIN eWindow, MS_U32 u32SecureDMA, MS_U32 u32OperationMode);
INTERFACE void Hal_SC_update_to_shm(void *pInstance, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_Dual_DNRBase0(void *pInstance, MS_PHY u32DNRBase0, SCALER_WIN eWindow);
INTERFACE void Hal_SC_set_Dual_OPMBase0(void *pInstance, MS_PHY u32OPMBase0, SCALER_WIN eWindow);
#if PIP_PATCH_USING_SC1_MAIN_AS_SC0_SUB
INTERFACE MS_BOOL Hal_SC_3D_IsDualViewMode(void *pInstance, SCALER_WIN eWindow);
INTERFACE void Hal_SC_3D_Set_DualView(void *pInstance, MS_BOOL bEnable);
INTERFACE void Hal_SC_set_dualview_clone(void *pInstance, MS_BOOL bEnable);
#endif

INTERFACE E_XC_FB_LEVEL MHal_XC_Get_FB_Level(void* pInstance, MS_WINDOW_TYPE* pstCropWin, MS_WINDOW_TYPE* pstDispWin, MS_BOOL bInterlace, MS_U16* pu16HSize, MS_U16* pu16VSize);
#define MHal_XC_Get_FB_Level_EX(args...)    (E_XC_FB_LEVEL_NUM)
INTERFACE MS_U32 Hal_SC_get_HDMIpolicy(void *pInstance);

INTERFACE E_APIXC_ReturnValue MHal_XC_Vtrack_SetAllPayloadData(void *pInstance, XC_VTRACK_PAYLOAD *vtrack_payload);
INTERFACE E_APIXC_ReturnValue MHal_XC_Vtrack_SetVtrackKey(void *pInstance, MS_U64 u64VtrackKey);
INTERFACE void Hal_SC_HDR_CLK_Setting(void *pInstance);

#define Hal_SC_set_main_black_screen_by_mode_burst(args...) E_APIXC_RET_OK;
#define Hal_SC_set_sub_blue_screen_by_mode_burst(args...) E_APIXC_RET_OK;
#define Hal_SC_set_main_black_screen_by_mode(args...) E_APIXC_RET_OK;
#define Hal_SC_set_sub_blue_screen_by_mode(args...) E_APIXC_RET_OK;


#ifdef CONFIG_UTOPIA_PROC_DBG_SUPPORT
void SYMBOL_WEAK MHal_XCMdbIoctl_EchoCmd(MDBCMD_CMDLINE_PARAMETER *paraCmdLine);
void SYMBOL_WEAK MHal_XCMdbIoctl_Cat(MDBCMD_GETINFO_PARAMETER *paraGetInfo);
#endif
INTERFACE E_APIXC_ReturnValue Hal_SC_Enable_VE_BypassPath(void *pInstance, MS_BOOL bEnable);
INTERFACE void Hal_SC_MVOP_HandShake_Control(void * pInstance,SCALER_WIN eWindow,P_SC_SWDB_INFO pDBreg);
INTERFACE void Hal_SC_MVOP_Gen_Timing_From_XC_Control(void * pInstance,SCALER_WIN eWindow);
INTERFACE MS_BOOL Hal_SC_IsLockFromIP(void *pInstance, SCALER_WIN eWindow);
#define Hal_SC_MCNR_SetSize(args...)
#define MHal_XC_Is_Support_Sub_Window_Disp(args...)
#ifdef UFO_XC_SCAN_TYPE
INTERFACE void MHal_XC_SetMemoryType_ForceP(void *pInstance, MS_BOOL bInterlace);
INTERFACE void MHal_XC_SetVirtualBox(void *pInstance, MS_U16 *pu16VBWidth, MS_U16 *pu16VBHeight);
INTERFACE void MHal_XC_SetFrameNum(void *pInstance, MS_U8 *u8FrameCount);
INTERFACE void MHal_XC_SetForcepConfig(void *pInstance, E_XC_SCAN_TYPE eScanType);
#endif
INTERFACE void MHal_XC_IP2VE_FlowControl(void *pInstance, MS_BOOL bEnable);
INTERFACE E_APIXC_ReturnValue MHal_XC_PQDS_GetCaps(void *pInstance, XC_PQDS_SUPPORTED_CAPS *pstPQDSCaps);
INTERFACE MS_U16 Hal_SC_Set_OSDZorderLayer(E_VIDEO_ON_OSD_LAYER enlayer);
INTERFACE void MHal_XC_ConnectDisplay(void* pInstance, ST_XC_CONNECTDISPLAY *pstXCDispaly,SCALER_WIN enWindow);
#define MHal_XC_ABF_Enable(args...) E_APIXC_RET_OK
#define MHal_XC_Is_ABF_Enable(args...) FALSE
#define MHal_XC_SetMemoryAddress(args...) E_APIXC_RET_OK

INTERFACE MS_U16 MHal_XC_FSS_BankTransfer(void * pInstance, MS_U16 u16BankRegister, SCALER_WIN eWindow);
INTERFACE MS_U16 MHal_XC_FSS_SoftwareResetTransfer(void * pInstance, MS_U16 u16BankRegister, SCALER_WIN eWindow, MS_U8 u8Reset, MS_U16 u16Mask);
INTERFACE void MHal_XC_FSS_IpSoftwareReset(void *pInstance, SCALER_WIN eWindow, MS_U8 u8Reset, MS_U16 u16Mask);
INTERFACE EN_PCMONITOR_SOURCE_TYPE_t MHal_XC_InputSrcToPCMonitorSrc(void * pInstance, INPUT_SOURCE_TYPE_t enSrcType);
INTERFACE INPUT_SOURCE_TYPE_t MHal_XC_GetOfflineSource(void * pInstance, SCALER_WIN eWindow);
INTERFACE void MHal_XC_SetOfflineSource(void * pInstance, SCALER_WIN eWindow, INPUT_SOURCE_TYPE_t enSrcType);
INTERFACE MS_BOOL MHal_XC_IsHDMI420(void * pInstance, INPUT_SOURCE_TYPE_t enSrcType);
INTERFACE void MHal_XC_SetFSSHDMI420Enable(void * pInstance, INPUT_SOURCE_TYPE_t enSrcType, MS_BOOL bEnable);
INTERFACE MS_U32 MHal_SC_GetIPCLK(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_U32 MHal_SC_GetOPCLK(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_BOOL MHal_SC_IsDistractHBlanking(void *pInstance, SCALER_WIN eWindow);
INTERFACE void MHal_XC_FSS_Patch(void *pInstance,INPUT_SOURCE_TYPE_t PathSrc);
INTERFACE void MHal_XC_Set_MIU_DynamicPriority(void *pInstance);
INTERFACE MS_BOOL MHal_XC_IsSupportIP2VE(void *pInstance, SCALER_WIN enWindow);

INTERFACE E_APIXC_ReturnValue MHal_XC_FAST_DISP_GetCaps(void *pInstance, XC_PQ_FAST_DISP_SUPPORTED_CAPS *pstPQFastDispCaps);

#define MHal_XC_CalDispWindow(args...)

INTERFACE void MHal_XC_IdClkMappingPatch(void);
INTERFACE void MHal_XC_SetYLockPoint(void* pInstance, MS_U8 u8YlockPoint, SCALER_WIN eWindow);
INTERFACE void MHal_XC_SetOPKeepFieldMode(void *pInstance, MS_BOOL bEnable, MS_BOOL bInterlace, SCALER_WIN eWindow);
INTERFACE void MHal_XC_SetBOBMode(void *pInstance, MS_BOOL bEnable, MS_BOOL bInterlace, SCALER_WIN eWindow);
INTERFACE void MHal_XC_WriteFbNum(void* pInstance, MS_U32 u32Reg, MS_U8 u8FrameCount);
INTERFACE MS_BOOL MHal_XC_IsSupportDolbyReload(void* pInstance);
INTERFACE void MHal_XC_IPVsyncTrig_Control(void * pInstance, MS_BOOL bInterlace, SCALER_WIN enWindow, P_SC_SWDB_INFO pDBreg);
INTERFACE E_APIXC_ReturnValue MHal_XC_Memory_Enable(void * pInstance, ST_XC_MEM_ENABLE_CTRL* pstMemEnableCtrl);
#if ((defined(MSOS_TYPE_OPTEE)) || (defined(MSOS_TYPE_NUTTX))) || ((!defined(DONT_USE_CMA))&&(XC_SUPPORT_CMA ==TRUE))||(XC_SUPPORT_IOMMU == TRUE)
INTERFACE void MHal_SC_Memory_Request_Force_Off(void * pInstance, MS_BOOL bEnable,E_XC_FORCE_MEMORY_REQUEST_OFF eMemoryOffType);
#endif
#if (((!defined(DONT_USE_CMA))&&(XC_SUPPORT_CMA == TRUE)) || (XC_SUPPORT_IOMMU == TRUE))
INTERFACE void MHal_SC_Memory_Access_Control(void *pInstance, const ST_XC_MEM_REQ_CTRL *pstMemReqCtrl);
#endif
INTERFACE MS_BOOL MHal_XC_CheckHDMIRepetition(void * pInstance);
INTERFACE MS_BOOL MHal_XC_GetFrameLockStatus(void *pInstance);
INTERFACE E_APIXC_ReturnValue MHal_XC_GetFrameLockDelay(void* pInstance, ST_XC_VIDEO_LATENCY_INFO* pstVideoLantencyInfo, SCALER_WIN enWindow);
INTERFACE MS_BOOL MHal_XC_IsForceP(void *pInstance, SCALER_WIN eWindow);
#if (XC_SUPPORT_IOMMU == TRUE)
INTERFACE MS_U32 MHal_XC_GetMMAUsingBufferSize(void *pInstance,SCALER_WIN enWindow);
INTERFACE MS_PHY MHal_XC_GetMMAAddr(void *pInstance, MS_U32 u32MMASize,MS_BOOL bSecure,SCALER_WIN enWindow);
INTERFACE MS_BOOL MHal_XC_ReleaseMMA(void *pInstance,SCALER_WIN enWindow);
INTERFACE MS_BOOL MHal_XC_HdmiDMAReleaseMMA(void *pInstance,SCALER_WIN enWindow);
INTERFACE MS_PHY MHal_XC_HdmiDMAGetMMAAddr(void *pInstance,MS_U32 u32MMASize,MS_BOOL bSecure,SCALER_WIN enWindow);
INTERFACE MS_BOOL MHal_XC_AuthorizeMMA(void *pInstance,SCALER_WIN enWindow);
INTERFACE MS_BOOL MHal_XC_UnauthorizeMMA(void *pInstance,SCALER_WIN enWindow);
INTERFACE MS_PHY MHal_XC_HseGetMMAAddr(void *pInstance, MS_U32 u32MMASize, MS_BOOL bSecure, SCALER_WIN enWindow);
INTERFACE MS_BOOL MHal_XC_HseReleaseMMA(void *pInstance, SCALER_WIN enWindow);
INTERFACE MS_BOOL MHal_XC_HseAuthorizeMMA(void *pInstance, SCALER_WIN enWindow);
INTERFACE MS_BOOL MHal_XC_HseUnauthorizeMMA(void *pInstance,SCALER_WIN enWindow);
INTERFACE MS_BOOL MHal_XC_SetPeripheralAID(void* pInstance,MS_BOOL bSecure,SCALER_WIN enWindow);
#endif
INTERFACE MS_BOOL MHal_XC_EnableDualAIDSource(void* pInstance,MS_BOOL bEnable);
INTERFACE MS_BOOL MHal_XC_SetDualAID(void* pInstance,MS_BOOL bSecure,EN_XC_DRAM_AID enDramAID);
INTERFACE MS_U8 MHal_XC_GetOPTeeVersion(MS_U8 u8OPTEEVersion);
INTERFACE void MHal_SC_CheckDILineBufferSize(MS_BOOL *pbBypass_DILB, MS_U16 u16Width);
INTERFACE void MHal_XC_ClockControl(void* pInstance, MS_BOOL bAllEnable, MS_U16 u16ClkLevel);
INTERFACE void MHal_XC_SetTimeStamp(void *pInstance, SCALER_WIN enWindow);
INTERFACE MS_BOOL MHal_XC_IsSupportFOHVSP(void);
#define MHal_XC_CalFOHVSP_HScalingRatio(args...)
#define MHal_XC_CalFOHVSP_VScalingRatio(args...)
#define MHal_XC_FOHVSPCondition(args...)
#define MHal_XC_Is_Support4K2K120Hz_2pMode(args...) (FALSE)
#define MHal_XC_Is_Support_HFR_Path(args...) (FALSE)
#define MHal_XC_IsSupportABF(args...) (FALSE)
#define MHal_XC_ABF_SetBlockSize(args...)
#define MHal_XC_SetABFSetting(args...)
#define MHal_XC_IsSupportZNR(args...) (FALSE)
#define MHal_XC_SetUCMMemoryAddress(args...)
#define MHal_XC_SetZNRAndUCMSetting(args...)
#define MHal_XC_UCM_FlowControl(args...)
#define MHal_XC_GetUCMRwDiff(args...) (0)
#define MHal_XC_Is_Support_FRC_HSK_Mode(args...) (FALSE)
#define MHal_XC_Is_Support_DIP_Sub_Path(args...) (FALSE)

INTERFACE MS_BOOL Hal_SC_NeedXCH8Align(void *pInstance);
INTERFACE MS_BOOL Hal_SC_NeedXCV8Align(void *pInstance);
#define Hal_SC_Is8AlignVPatch_Enable(args...) FALSE
INTERFACE void Hal_SC_8AlignPatchBy2ndSDE(void *pInstance,MS_BOOL bMenuloadEnable, MS_WINDOW_TYPE *pdspwin);
INTERFACE MS_BOOL MHal_XC_IsSupportFHDDownClk(void);
INTERFACE void MHal_XC_FHDDownClk(void *pInstance, SCALER_WIN enWindow);
INTERFACE MS_BOOL MHal_XC_IsSupportSPFLineBuffer(void);
INTERFACE MS_BOOL MHal_XC_IsSupportPQDSPlus(void);
INTERFACE void MHal_XC_Set_LockPoint_DelayLines(void *pInstance, SCALER_WIN eWindow, P_SC_SWDB_INFO pDBreg);
#define MHal_SC_HFR_Path_CLK_Setting(args...)
#define MHal_SC_HFR_IP2_Init(args...)
#define MHal_XC_Is_Enable_HFR_Path(args...) (FALSE)
#define MHal_XC_FE_HFR_TOP_Control(args...)
#define MHal_XC_HFR_Disable_CropBeforeFRC(args...)
E_XC_CROP_MODE MHal_XC_GetCropMode(void);
INTERFACE MS_BOOL MHal_XC_IsSourceWithoutMvopSuportDS(void);
#define MHal_XC_CheckDisplayWin(args...)
INTERFACE MS_BOOL MHal_XC_IsDtv4K2KI(MS_U16 u16SrcW, MS_U16 u16SrcH, MS_BOOL bInterface, INPUT_SOURCE_TYPE_t enSrcType);
INTERFACE void MHal_XC_OPM_FlowControl(void * pInstance, SCALER_WIN enWindow);
INTERFACE MS_BOOL MHal_XC_FIFO_Control(void *pInstance, INPUT_SOURCE_TYPE_t enSrcType,SCALER_WIN enWindow);
INTERFACE MS_BOOL MHal_XC_Is2kModel(void *pInstance);
#define MHal_XC_SetHfrHdrWindow(args...) (FALSE)
#define MHal_XC_GetForcePMemorySize(args...) (0)
#define MHal_XC_IsSwitchHFRSubBank(args...) (FALSE)
INTERFACE void MHal_SC_SetHSEMemory(void *pInstance, MS_BOOL bIsIommuEnabled);
INTERFACE MS_BOOL MHal_XC_IsSupportDecimalCrop(void *pInstance);
INTERFACE void MHal_XC_SetDecimalPostScaling(void *pInstance, XC_InternalStatus *pSrcInfo, SCALER_WIN eWindow);
INTERFACE void MHal_SC_VRR_Init(void *pInstance);
INTERFACE void MHal_XC_SetVRRFSM_Enable(void *pInstance, MS_BOOL bEn);
INTERFACE MS_BOOL MHal_XC_GetVRRFSM_Enable(void *pInstance);
INTERFACE MS_BOOL MHal_XC_GetVRREnableFromHDMI(void *pInstance);
INTERFACE void Hal_SC_ip_set_IPAutoNoSignalForAllHDMIPorts(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_Ip_ForceDisableAutoNoSignalForAllHDMIPorts(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow);
INTERFACE void Hal_SC_ip_set_de_only_modeForAllHDMIPorts(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow, MS_BOOL bAllHDMIPorts);
INTERFACE void Hal_SC_ip_set_user_def_interlace_statusForAllHDMIPorts(void *pInstance, MS_BOOL bEnable, MS_BOOL bIsInterlace, SCALER_WIN eWindow, MS_BOOL bAllHDMIPorts);
INTERFACE void MHal_XC_SetMemoryCtrlMethod(void *pInstance, SCALER_WIN eWindow);
INTERFACE void MHal_SC_SetHSEInfo(XC_HSE_PREINIT_INFO_t *pstHSEPreInitInfo);
INTERFACE void MHal_SC_GetHSEInfo(XC_HSE_PREINIT_INFO_t *pstHSEPreInitInfo);
INTERFACE void MHal_XC_OPMHttControl(void* pInstance,SCALER_WIN enWindow);
#define MHal_XC_FBLModeSetForceReadBank(args...)
INTERFACE void MHal_XC_SetLockPoint(void *pInstance);
INTERFACE MS_BOOL MHal_SC_IsHSEEnabled(void* pInstance);
INTERFACE MS_BOOL MHal_SC_IsHSESupported(void);
INTERFACE void MHal_XC_IP2HSDPatch(void* pInstance, MS_BOOL bEnable);
INTERFACE void MHal_XC_IP2HSDPatch_Counter(SC_INT_SRC eIntNum, void *pParam);
INTERFACE MS_BOOL MHal_XC_Get_IP2HSDPatchStatus(void);
INTERFACE void MHal_XC_IP2HSDPatch_DelayUnmute(void *pInstance, SCALER_WIN eWindow);
INTERFACE MS_BOOL MHal_XC_SetSub1Mode(void *pInstance, SCALER_WIN enWindow, MS_BOOL *pbIsHScalingUp, MS_BOOL *pbIsVScalingUp, MS_U8 *pu8DelayFrame);
INTERFACE void MHal_XC_SetBandwidth_Enable(void *pInstance,MS_BOOL bEnable,EN_XC_BANDWIDTH_TYPE enBandwidthType);
INTERFACE void MHal_XC_SetBandwidth_Init(void *pInstance,EN_XC_BANDWIDTH_TYPE enBandwidthType);
INTERFACE void MHal_XC_SetDSXRuleFrameCount(void *pInstance, XC_GET_DS_INFO *pstGetDSInfo);
INTERFACE MS_BOOL MHal_XC_DSXRuleFrameCountMapping(void *pInstance, MS_U8 u8FrameCount, MS_U8 *u8PQFrameCount);
#define MHal_XC_UpdateVSizeForUCM(args...) (0)
INTERFACE void MHal_XC_Get_TGENInfo(void *pInstance, ST_XC_DISPLAYOUT_INFO *pstDisplayOutInfo);
INTERFACE MS_BOOL MHal_XC_AuthorizeCMA(void *pInstance,SCALER_WIN enWindow);
INTERFACE MS_BOOL MHal_XC_UnauthorizeCMA(void *pInstance,SCALER_WIN enWindow);
INTERFACE MS_BOOL MHal_XC_Do_VPreScalingAlign2(void *pInstance);
INTERFACE void MHal_XC_SetHandShakeMode(void *pInstance, MS_BOOL bEnable);
#define MHal_XC_SetOSDStatus(args...)
#define MHal_XC_Set_RWPointDiff(args...)    (E_APIXC_RET_FAIL_FUN_NOT_SUPPORT)
INTERFACE void _XCMdbloctl_TestPattern(void *pInstance, MS_U8 u8IP, MS_BOOL bEnable, MS_U8 u8window, MS_U16 BValue, MS_U16 GValue, MS_U16 RValue);
INTERFACE MS_BOOL MHal_XC_GetCusForceFreerun(void *pInstance);
#undef INTERFACE
#endif /* MHAL_SC_H */

