/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
/*
 * Copyright (c) 2020 MediaTek Inc.
 */

#ifndef _DT_BINDINGS_CLK_MT5896_SCDV_H
#define _DT_BINDINGS_CLK_MT5896_SCDV_H

#define CLK_SCDV_XTAL_12M_INT_CK	1
#define CLK_SCDV_XTAL_24M_INT_CK	2
#define CLK_SCDV_MCU_NONPM_INT_CK	3
#define CLK_SCDV_RIU_NONPM_INT_CK	4
#define CLK_SCDV_SMI_INT_CK	5
#define CLK_SCDV_MCU_XC_INT_CK	6
#define CLK_SCDV_RIU_XC_INT_CK	7
#define CLK_SCDV_XC_FN_INT_CK	8
#define CLK_SCDV_XC_FN_2_INT_CK	9
#define CLK_SCDV_DV_HW5_SRAM_INT_CK	10
#define CLK_SCDV_NR	11

#endif
