/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
/*
 * Copyright (c) 2020 MediaTek Inc.
 */

#ifndef _DT_BINDINGS_CLK_MT5896_SCSR_H
#define _DT_BINDINGS_CLK_MT5896_SCSR_H

#define CLK_SCSR_XTAL_12M_INT_CK	1
#define CLK_SCSR_XTAL_24M_INT_CK	2
#define CLK_SCSR_MCU_NONPM_INT_CK	3
#define CLK_SCSR_RIU_NONPM_INT_CK	4
#define CLK_SCSR_SMI_INT_CK	5
#define CLK_SCSR_MCU_XC_INT_CK	6
#define CLK_SCSR_RIU_XC_INT_CK	7
#define CLK_SCSR_XC_FS_INT_CK	8
#define CLK_SCSR_XC_FN_INT_CK	9
#define CLK_SCSR_XC_AISR_INT_CK	10
#define CLK_SCSR_XC_SRS_INT_CK	11
#define CLK_SCSR_XC_SR_SRAM_SHARE_INT_CK	12
#define CLK_SCSR_XC_SR_ALAI_INT_CK	13
#define CLK_SCSR_AISR_SRAM_INT_CK	14
#define CLK_SCSR_AISR_SRAM_PH_1_INT_CK	15
#define CLK_SCSR_AISR_HVSP_SRAM_INT_CK	16
#define CLK_SCSR_NR	17

#endif
