#define CLK_MEMC_EN_FRC_FCLK_2X2DEFLICKER	1
#define CLK_MEMC_EN_FRC_FCLK_2X2FDCLK_2X	2
#define CLK_MEMC_EN_FRC_FCLK_2X2FRCIOPM	3
#define CLK_MEMC_EN_FRC_FCLK_2X2FRCIOPMRV55	4
#define CLK_MEMC_EN_FRC_FCLK_2X2MI_PH3	5
#define CLK_MEMC_EN_FRC_FCLK_2X2MI_PH4	6
#define CLK_MEMC_EN_FRC_FCLK_2X2OUT_STAGE	7
#define CLK_MEMC_EN_FRC_FCLK_2X2SNR	8
#define CLK_MEMC_EN_FRC_FCLK_2XPLUS2FRCIOPMRV55	9
#define CLK_MEMC_EN_FRC_FCLK_2XPLUS2SCIP	10
#define CLK_MEMC_EN_FRC_FCLK_2XPLUS2SCMW	11
#define CLK_MEMC_EN_FRC_FCLK2FDCLK	12
#define CLK_MEMC_EN_FRC_FCLK2FRCIOPM	13
#define CLK_MEMC_EN_FRC_FCLK2FRCIOPMRV55	14
#define CLK_MEMC_EN_FRC_FCLK2FRCMEMLB_CLK_ALL	15
#define CLK_MEMC_EN_FRC_FCLK2FRCMEMLB_CLK_MLB_SRAM	16
#define CLK_MEMC_EN_FRC_FCLK2FRCMEMLB_CLK_SAD_0	17
#define CLK_MEMC_EN_FRC_FCLK2FRCMEMLB_CLK_SAD_1	18
#define CLK_MEMC_EN_FRC_FCLK2FRCMEMLB_CLK_SAD_2	19
#define CLK_MEMC_EN_FRC_FCLK2FRCMEMLB_CLK_SAD_3	20
#define CLK_MEMC_EN_FRC_FCLK2FRCMEMLB_CLK_SAD_4	21
#define CLK_MEMC_EN_FRC_FCLK2FRCMEMLB_CLK_SAD_5	22
#define CLK_MEMC_EN_FRC_FCLK2FRCMEMLB_CLK_SAD_6	23
#define CLK_MEMC_EN_FRC_FCLK2FRCMEMLB_CLK_SAD_7	24
#define CLK_MEMC_EN_FRC_FCLK2FRCMEMLB_GMV	25
#define CLK_MEMC_EN_FRC_FCLK2FRCMI_CLK_ALL	26
#define CLK_MEMC_EN_FRC_FCLK2FRCMI_CLK_MLB_MI_L	27
#define CLK_MEMC_EN_FRC_FCLK2FRCMI_CLK_MLB_MI_R	28
#define CLK_MEMC_EN_FRC_FCLK2FRCMI_CLK_MLB_MI_SRAM_L	29
#define CLK_MEMC_EN_FRC_FCLK2FRCMI_CLK_MLB_MI_SRAM_R	30
#define CLK_MEMC_EN_FRC_FCLK2ME	31
#define CLK_MEMC_EN_FRC_FCLK2ME_4X4	32
#define CLK_MEMC_EN_FRC_FCLK2ME_PH1	33
#define CLK_MEMC_EN_FRC_FCLK2ME_PH2	34
#define CLK_MEMC_EN_FRC_FCLK2FRCMEMLB_CLK_SAD_8	35
#define CLK_MEMC_EN_XTAL_24M2FRCIOPM	36
#define CLK_MEMC_EN_XTAL_24M2FRCIOPMRV55	37
#define CLK_MEMC_EN_XTAL_24M2FRCMEHALO	38
#define CLK_MEMC_EN_XTAL_24M2FRCMEMLB	39
#define CLK_MEMC_EN_XTAL_24M2FRCMI	40
#define CLK_MEMC_EN_NR	41
