/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
/*
 * Copyright (c) 2020 MediaTek Inc.
 */

#define CLK_XC_EN_FRC_FCLK_2X2FRCCORE1	1
#define CLK_XC_EN_FRC_FCLK_2XPLUS2FRCCORE1	2
#define CLK_XC_EN_SMI2FRCCORE1	3
#define CLK_XC_EN_SMI2SMI_FRCCORE1	4
#define CLK_XC_EN_XTAL_24M2FRCCORE1	5
#define CLK_XC_EN_FRC_FCLK2FRCCORE2	6
#define CLK_XC_EN_SMI2FRCCORE2	7
#define CLK_XC_EN_XTAL_24M2FRCCORE2	8
#define CLK_XC_EN_FRC_FCLK_2X2FRCCORE3	9
#define CLK_XC_EN_SMI2FRCCORE3	10
#define CLK_XC_EN_XTAL_24M2FRCCORE3	11
#define CLK_XC_EN_DAP2FRCMISC	12
#define CLK_XC_EN_FRC_FUART02FRCMISC	13
#define CLK_XC_EN_FRC_MSPI02FRCMISC	14
#define CLK_XC_EN_FRC_UART02FRCMISC	15
#define CLK_XC_EN_FRC_UART12FRCMISC	16
#define CLK_XC_EN_RV55DAP_JTAG_TCK2FRCMISC	17
#define CLK_XC_EN_SMI2FRCMISC	18
#define CLK_XC_EN_XTAL_12M2FRCMISC	19
#define CLK_XC_EN_SMI2SCACE	20
#define CLK_XC_EN_SMI2SCDISP	21
#define CLK_XC_EN_SMI2SCDV	22
#define CLK_XC_EN_SMI2SCIP	23
#define CLK_XC_EN_SMI2SCMW	24
#define CLK_XC_EN_SMI2SMI_LARB_SCMW	25
#define CLK_XC_EN_SMI2SCNR	26
#define CLK_XC_EN_SMI2SCPQ	27
#define CLK_XC_EN_SMI2SCSCL	28
#define CLK_XC_EN_SMI2SCSR	29
#define CLK_XC_EN_SMI2SCTCON	30
#define CLK_XC_EN_NR	31
