#define TCON_ADL_CRC_BKA369 0x0146D200

//Page TCON_ADL_CRC_BKA369
#define REG_0004_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x004)
    #define REG_0004_TCON_ADL_CRC_BKA369_REG_ADL_DONE_CLR Fld(1,0,AC_MSKB0)//[0:0]
#define REG_0008_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x008)
    #define REG_0008_TCON_ADL_CRC_BKA369_REG_CRC_ADL_DONE Fld(1,0,AC_MSKB0)//[0:0]
#define REG_0018_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x018)
    #define REG_0018_TCON_ADL_CRC_BKA369_REG_CHK_SUM_OUT_SEL Fld(5,0,AC_MSKB0)//[4:0]
#define REG_001C_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x01C)
    #define REG_001C_TCON_ADL_CRC_BKA369_REG_CRC_CHK_SUM_OUT Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0020_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x020)
    #define V3_REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0 Fld(16,0,AC_FULLW10)//[15:0]
	#define REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0_0020_0 Fld(1,0,AC_MSKB0)//[0:0]
	#define REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0_0020_1 Fld(1,1,AC_MSKB0)//[1:1]
	#define REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0_0020_2 Fld(1,2,AC_MSKB0)//[2:2]
	#define REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0_0020_3 Fld(1,3,AC_MSKB0)//[3:3]
	#define REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0_0020_4 Fld(1,4,AC_MSKB0)//[4:4]
	#define REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0_0020_5 Fld(1,5,AC_MSKB0)//[5:5]
	#define REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0_0020_6 Fld(1,6,AC_MSKB0)//[6:6]
	#define REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0_0020_7 Fld(1,7,AC_MSKB0)//[7:7]
	#define REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0_0020_8 Fld(1,8,AC_MSKB1)//[8:8]
	#define REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0_0020_9 Fld(1,9,AC_MSKB1)//[9:9]
	#define REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0_0020_10 Fld(1,10,AC_MSKB1)//[10:10]
	#define REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0_0020_11 Fld(1,11,AC_MSKB1)//[11:11]
	#define REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0_0020_12 Fld(1,12,AC_MSKB1)//[12:12]
	#define REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0_0020_13 Fld(1,13,AC_MSKB1)//[13:13]
	#define REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0_0020_14 Fld(1,14,AC_MSKB1)//[14:14]
	#define REG_0020_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_0_0020_15 Fld(1,15,AC_MSKB1)//[15:15]
#define REG_0024_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x024)
    #define REG_0024_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_1 Fld(10,0,AC_MSKW10)//[9:0]
	#define V3_REG_0024_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_1_0024_16 Fld(1,0,AC_MSKB0)//[0:0]
	#define REG_0024_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_1_0024_17 Fld(1,1,AC_MSKB0)//[1:1]
	#define REG_0024_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_1_0024_18 Fld(1,2,AC_MSKB0)//[2:2]
	#define REG_0024_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_1_0024_19 Fld(1,3,AC_MSKB0)//[3:3]
	#define REG_0024_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_1_0024_20 Fld(1,4,AC_MSKB0)//[4:4]
	#define REG_0024_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_1_0024_21 Fld(1,5,AC_MSKB0)//[5:5]
	#define REG_0024_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_1_0024_22 Fld(1,6,AC_MSKB0)//[6:6]
	#define REG_0024_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_1_0024_23 Fld(1,7,AC_MSKB0)//[7:7]
	#define REG_0024_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_1_0024_24 Fld(1,8,AC_MSKB1)//[8:8]
	#define REG_0024_TCON_ADL_CRC_BKA369_REG_FAKE_ACTIVE_EN_1_0024_25 Fld(1,9,AC_MSKB1)//[9:9]
#define REG_0028_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x028)
	#define REG_0028_TCON_ADL_CRC_BKA369_REG_ADL_DONE_FINAL_IRQ_0_0028 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_002C_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x02C)
	#define REG_002C_TCON_ADL_CRC_BKA369_REG_ADL_DONE_FINAL_IRQ_1_002C Fld(8,0,AC_FULLB0)//[7:0]
#define REG_0030_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x030)
	#define REG_0030_TCON_ADL_CRC_BKA369_REG_ADL_DONE_RAW_IRQ_0_0030 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0034_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x034)
	#define REG_0034_TCON_ADL_CRC_BKA369_REG_ADL_DONE_RAW_IRQ_1_0034 Fld(8,0,AC_FULLB0)//[7:0]
#define REG_0038_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x038)
	#define REG_0038_TCON_ADL_CRC_BKA369_REG_ADL_DONE_IRQ_FORCE_0_0038 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_003C_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x03C)
	#define REG_003C_TCON_ADL_CRC_BKA369_REG_ADL_DONE_IRQ_FORCE_1_003C Fld(8,0,AC_FULLB0)//[7:0]
#define REG_0040_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x040)
    #define REG_0040_TCON_ADL_CRC_BKA369_REG_CLIENT4_2_BASEADR_0 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0044_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x044)
    #define REG_0044_TCON_ADL_CRC_BKA369_REG_CLIENT4_2_BASEADR_1 Fld(13,0,AC_MSKW10)//[12:0]
#define REG_0048_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x048)
    #define REG_0048_TCON_ADL_CRC_BKA369_REG_CLIENT4_3_BASEADR_0 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_004C_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x04C)
    #define REG_004C_TCON_ADL_CRC_BKA369_REG_CLIENT4_3_BASEADR_1 Fld(13,0,AC_MSKW10)//[12:0]
#define REG_0050_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x050)
    #define REG_0050_TCON_ADL_CRC_BKA369_REG_CLIENT_CLR_DONE_0 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0054_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x054)
    #define REG_0054_TCON_ADL_CRC_BKA369_REG_CLIENT_CLR_DONE_1 Fld(8,0,AC_FULLB0)//[7:0]
#define REG_0058_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x058)
    #define REG_0058_TCON_ADL_CRC_BKA369_REG_CLIENT_SET_DONE_0 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_005C_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x05C)
    #define REG_005C_TCON_ADL_CRC_BKA369_REG_CLIENT_SET_DONE_1 Fld(8,0,AC_FULLB0)//[7:0]
#define REG_0100_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x100)
    #define REG_0100_TCON_ADL_CRC_BKA369_REG_CLIENTJ_EN Fld(1,0,AC_MSKB0)//[0:0]
    #define REG_0100_TCON_ADL_CRC_BKA369_REG_CLIENTJ_TRIG_MODE Fld(1,1,AC_MSKB0)//[1:1]
    #define REG_0100_TCON_ADL_CRC_BKA369_REG_CLIENTJ_CLK_GATE_EN Fld(1,2,AC_MSKB0)//[2:2]
#define REG_0104_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x104)
    #define REG_0104_TCON_ADL_CRC_BKA369_REG_CLIENTJ_BASEADR_0 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0108_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x108)
    #define REG_0108_TCON_ADL_CRC_BKA369_REG_CLIENTJ_BASEADR_1 Fld(13,0,AC_MSKW10)//[12:0]
#define REG_010C_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x10C)
    #define REG_010C_TCON_ADL_CRC_BKA369_REG_CLIENTJ_DEPTH Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0110_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x110)
    #define REG_0110_TCON_ADL_CRC_BKA369_REG_CLIENTJ_REQ_LEN Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0114_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x114)
    #define REG_0114_TCON_ADL_CRC_BKA369_REG_CLIENTJ_INI_ADDR Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0118_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x118)
    #define REG_0118_TCON_ADL_CRC_BKA369_REG_CLIENTK_EN Fld(1,0,AC_MSKB0)//[0:0]
    #define REG_0118_TCON_ADL_CRC_BKA369_REG_CLIENTK_TRIG_MODE Fld(1,1,AC_MSKB0)//[1:1]
    #define REG_0118_TCON_ADL_CRC_BKA369_REG_CLIENTK_CLK_GATE_EN Fld(1,2,AC_MSKB0)//[2:2]
#define REG_011C_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x11C)
    #define REG_011C_TCON_ADL_CRC_BKA369_REG_CLIENTK_BASEADR_0 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0120_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x120)
    #define REG_0120_TCON_ADL_CRC_BKA369_REG_CLIENTK_BASEADR_1 Fld(13,0,AC_MSKW10)//[12:0]
#define REG_0124_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x124)
    #define REG_0124_TCON_ADL_CRC_BKA369_REG_CLIENTK_DEPTH Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0128_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x128)
    #define REG_0128_TCON_ADL_CRC_BKA369_REG_CLIENTK_REQ_LEN Fld(16,0,AC_FULLW10)//[15:0]
#define REG_012C_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x12C)
    #define REG_012C_TCON_ADL_CRC_BKA369_REG_CLIENTK_INI_ADDR Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0130_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x130)
    #define REG_0130_TCON_ADL_CRC_BKA369_REG_CLIENTL_EN Fld(1,0,AC_MSKB0)//[0:0]
    #define REG_0130_TCON_ADL_CRC_BKA369_REG_CLIENTL_TRIG_MODE Fld(1,1,AC_MSKB0)//[1:1]
    #define REG_0130_TCON_ADL_CRC_BKA369_REG_CLIENTL_CLK_GATE_EN Fld(1,2,AC_MSKB0)//[2:2]
#define REG_0134_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x134)
    #define REG_0134_TCON_ADL_CRC_BKA369_REG_CLIENTL_BASEADR_0 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0138_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x138)
    #define REG_0138_TCON_ADL_CRC_BKA369_REG_CLIENTL_BASEADR_1 Fld(13,0,AC_MSKW10)//[12:0]
#define REG_013C_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x13C)
    #define REG_013C_TCON_ADL_CRC_BKA369_REG_CLIENTL_DEPTH Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0140_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x140)
    #define REG_0140_TCON_ADL_CRC_BKA369_REG_CLIENTL_REQ_LEN Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0144_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x144)
    #define REG_0144_TCON_ADL_CRC_BKA369_REG_CLIENTL_INI_ADDR Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0148_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x148)
    #define REG_0148_TCON_ADL_CRC_BKA369_REG_CLIENTM_EN Fld(1,0,AC_MSKB0)//[0:0]
    #define REG_0148_TCON_ADL_CRC_BKA369_REG_CLIENTM_TRIG_MODE Fld(1,1,AC_MSKB0)//[1:1]
    #define REG_0148_TCON_ADL_CRC_BKA369_REG_CLIENTM_CLK_GATE_EN Fld(1,2,AC_MSKB0)//[2:2]
#define REG_014C_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x14C)
    #define REG_014C_TCON_ADL_CRC_BKA369_REG_CLIENTM_BASEADR_0 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0150_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x150)
    #define REG_0150_TCON_ADL_CRC_BKA369_REG_CLIENTM_BASEADR_1 Fld(13,0,AC_MSKW10)//[12:0]
#define REG_0154_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x154)
    #define REG_0154_TCON_ADL_CRC_BKA369_REG_CLIENTM_DEPTH Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0158_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x158)
    #define REG_0158_TCON_ADL_CRC_BKA369_REG_CLIENTM_REQ_LEN Fld(16,0,AC_FULLW10)//[15:0]
#define REG_015C_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x15C)
    #define REG_015C_TCON_ADL_CRC_BKA369_REG_CLIENTM_INI_ADDR Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0160_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x160)
    #define REG_0160_TCON_ADL_CRC_BKA369_REG_CLIENTN_EN Fld(1,0,AC_MSKB0)//[0:0]
    #define REG_0160_TCON_ADL_CRC_BKA369_REG_CLIENTN_TRIG_MODE Fld(1,1,AC_MSKB0)//[1:1]
    #define REG_0160_TCON_ADL_CRC_BKA369_REG_CLIENTN_CLK_GATE_EN Fld(1,2,AC_MSKB0)//[2:2]
#define REG_0164_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x164)
    #define REG_0164_TCON_ADL_CRC_BKA369_REG_CLIENTN_BASEADR_0 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0168_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x168)
    #define REG_0168_TCON_ADL_CRC_BKA369_REG_CLIENTN_BASEADR_1 Fld(13,0,AC_MSKW10)//[12:0]
#define REG_016C_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x16C)
    #define REG_016C_TCON_ADL_CRC_BKA369_REG_CLIENTN_DEPTH Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0170_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x170)
    #define REG_0170_TCON_ADL_CRC_BKA369_REG_CLIENTN_REQ_LEN Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0174_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x174)
    #define REG_0174_TCON_ADL_CRC_BKA369_REG_CLIENTN_INI_ADDR Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0178_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x178)
    #define REG_0178_TCON_ADL_CRC_BKA369_REG_CLIENTO_EN Fld(1,0,AC_MSKB0)//[0:0]
    #define REG_0178_TCON_ADL_CRC_BKA369_REG_CLIENTO_TRIG_MODE Fld(1,1,AC_MSKB0)//[1:1]
    #define REG_0178_TCON_ADL_CRC_BKA369_REG_CLIENTO_CLK_GATE_EN Fld(1,2,AC_MSKB0)//[2:2]
#define REG_017C_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x17C)
    #define REG_017C_TCON_ADL_CRC_BKA369_REG_CLIENTO_BASEADR_0 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0180_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x180)
    #define REG_0180_TCON_ADL_CRC_BKA369_REG_CLIENTO_BASEADR_1 Fld(13,0,AC_MSKW10)//[12:0]
#define REG_0184_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x184)
    #define REG_0184_TCON_ADL_CRC_BKA369_REG_CLIENTO_DEPTH Fld(16,0,AC_FULLW10)//[15:0]
#define REG_0188_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x188)
    #define REG_0188_TCON_ADL_CRC_BKA369_REG_CLIENTO_REQ_LEN Fld(16,0,AC_FULLW10)//[15:0]
#define REG_018C_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x18C)
    #define REG_018C_TCON_ADL_CRC_BKA369_REG_CLIENTO_INI_ADDR Fld(16,0,AC_FULLW10)//[15:0]
#define REG_01A8_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x1A8)
    #define REG_01A8_TCON_ADL_CRC_BKA369_REG_CLIENTI_EN Fld(1,0,AC_MSKB0)//[0:0]
    #define REG_01A8_TCON_ADL_CRC_BKA369_REG_CLIENTI_TRIG_MODE Fld(1,1,AC_MSKB0)//[1:1]
    #define REG_01A8_TCON_ADL_CRC_BKA369_REG_CLIENTI_CLK_GATE_EN Fld(1,2,AC_MSKB0)//[2:2]
#define REG_01AC_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x1AC)
    #define REG_01AC_TCON_ADL_CRC_BKA369_REG_CLIENTI_BASEADR_0 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_01B0_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x1B0)
    #define REG_01B0_TCON_ADL_CRC_BKA369_REG_CLIENTI_BASEADR_1 Fld(13,0,AC_MSKW10)//[12:0]
#define REG_01B4_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x1B4)
    #define REG_01B4_TCON_ADL_CRC_BKA369_REG_CLIENTI_DEPTH Fld(16,0,AC_FULLW10)//[15:0]
#define REG_01B8_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x1B8)
    #define REG_01B8_TCON_ADL_CRC_BKA369_REG_CLIENTI_REQ_LEN Fld(16,0,AC_FULLW10)//[15:0]
#define REG_01BC_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x1BC)
    #define REG_01BC_TCON_ADL_CRC_BKA369_REG_CLIENTI_INI_ADDR Fld(16,0,AC_FULLW10)//[15:0]
#define REG_01C0_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x1C0)
    #define REG_01C0_TCON_ADL_CRC_BKA369_REG_ADL_STATUS_1 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_01C4_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x1C4)
    #define REG_01C4_TCON_ADL_CRC_BKA369_REG_ADL_STATUS_2 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_01C8_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x1C8)
    #define REG_01C8_TCON_ADL_CRC_BKA369_REG_ADL_STATUS_3 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_01CC_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x1CC)
    #define REG_01CC_TCON_ADL_CRC_BKA369_REG_ADL_STATUS_4 Fld(16,0,AC_FULLW10)//[15:0]
#define REG_01D0_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x1D0)
    #define REG_01D0_TCON_ADL_CRC_BKA369_REG_DMA_FIFO_DEPTH Fld(8,0,AC_FULLB0)//[7:0]
    #define REG_01D0_TCON_ADL_CRC_BKA369_REG_REQ_TH Fld(8,8,AC_FULLB1)//[15:8]
#define REG_01D4_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x1D4)
    #define REG_01D4_TCON_ADL_CRC_BKA369_REG_MIU_ULTRA_MASK Fld(1,0,AC_MSKB0)//[0:0]
    #define REG_01D4_TCON_ADL_CRC_BKA369_REG_MIU_PREULTRA_TH Fld(8,8,AC_FULLB1)//[15:8]
#define REG_01D8_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x1D8)
    #define REG_01D8_TCON_ADL_CRC_BKA369_REG_MIU_ULTRA_TH Fld(8,0,AC_FULLB0)//[7:0]
#define REG_01DC_TCON_ADL_CRC_BKA369 (TCON_ADL_CRC_BKA369 + 0x1DC)
    #define REG_01DC_TCON_ADL_CRC_BKA369_REG_MIU_URGENT_TH Fld(8,8,AC_FULLB1)//[15:8]

