#
# Realtek Semiconductor Corp.
#
# RLX Linux Kernel Configuration
#
# Tony Wu (tonywu@realtek.com)
# Dec. 07, 2008
#

#
# MIPS
#
config SHEIPA
	bool
	default y
	select SYS_SUPPORTS_LITTLE_ENDIAN if SOC_CPU_EL
	select SYS_SUPPORTS_BIG_ENDIAN if SOC_CPU_EB
	select IRQ_ICTL if SOC_ENABLE_ICTL
	select CPU_MIPSR2_IRQ_VI if SOC_ENABLE_IRQ_VI
	select CPU_MIPSR2_IRQ_EI if SOC_ENABLE_IRQ_EI
	select HW_HAS_PCI if SOC_ENABLE_PCI
	select HW_HAS_USB if SOC_ENABLE_USB
	select SMP if SOC_ENABLE_SMP
	select DMA_COHERENT if SOC_ENABLE_IOCU
	select DMA_NONCOHERENT if !SOC_ENABLE_IOCU
	select CPU_HAS_FPU if SOC_ENABLE_FPU
	select CPU_HAS_EMU if SOC_ENABLE_EMU
	select CPU_HAS_DSP if SOC_ENABLE_DSP
	select CPU_HAS_RADIAX if SOC_ENABLE_RADIAX
	select HARDWARE_WATCHPOINTS if SOC_ENABLE_WATCH
	select HAS_DMA
	select USE_OF if SOC_ENABLE_OF
	select BUILTIN_DTB if SOC_ENABLE_BUILTIN_DTB
	select CPU_HAS_L2C if SOC_ENABLE_L2C
	select SYS_SUPPORTS_ZBOOT_UART_PROM
	select CPU_MIPS32_R2 if SOC_CPU_MIPS
	select CPU_RLX if SOC_CPU_RLX

#
# CPU
#
config CPU_MIPS4K
	bool
	default y if SOC_CPU_MIPS4K
	select SYS_HAS_CPU_MIPS32_R2

config CPU_MIPS24K
	bool
	default y if SOC_CPU_MIPS24K
	select SYS_HAS_CPU_MIPS32_R2
	select CPU_HAS_TLS

config CPU_MIPS34K
	bool
	default y if SOC_CPU_MIPS34K
	select SYS_HAS_CPU_MIPS32_R2
	select CPU_HAS_TLS
	select SYS_SUPPORTS_MULTITHREADING
	select SYS_SUPPORTS_SMP
	select MIPS_MT_SMP if SOC_ENABLE_SMP

config CPU_MIPS74K
	bool
	default y if SOC_CPU_MIPS74K
	select SYS_HAS_CPU_MIPS32_R2
	select CPU_HAS_TLS

config CPU_MIPS1004K
	bool
	default y if SOC_CPU_MIPS1004K
	select SYS_HAS_CPU_MIPS32_R2
	select CPU_HAS_TLS
	select SYS_SUPPORTS_SMP
	select SYS_SUPPORTS_MULTITHREADING
	select SYS_SUPPORTS_MIPS_CMP
	select SYS_SUPPORTS_MIPS_CPS
	select MIPS_GIC
	select MIPS_CMP if SOC_ENABLE_CMP
	select MIPS_CPS if SOC_ENABLE_CPS
	select MIPS_MT_SMP if SOC_ENABLE_MT
	select WEAK_REORDERING_BEYOND_LLSC
	select CLKSRC_MIPS_GIC
	select COMMON_CLK

config CPU_MIPS1074K
	bool
	default y if SOC_CPU_MIPS1074K
	select SYS_HAS_CPU_MIPS32_R2
	select CPU_HAS_TLS
	select SYS_SUPPORTS_SMP
	select SYS_SUPPORTS_MIPS_CMP
	select SYS_SUPPORTS_MIPS_CPS
	select MIPS_GIC
	select MIPS_CMP if SOC_ENABLE_CMP
	select MIPS_CPS if SOC_ENABLE_CPS
	select WEAK_REORDERING_BEYOND_LLSC
	select CLKSRC_MIPS_GIC
	select COMMON_CLK

config CPU_MIPSIA
	bool
	default y if SOC_CPU_MIPSIA
	select SYS_HAS_CPU_MIPS32_R2
	select CPU_HAS_TLS
	select SYS_SUPPORTS_SMP
	select SYS_SUPPORTS_MULTITHREADING
	select SYS_SUPPORTS_MIPS_CMP
	select SYS_SUPPORTS_MIPS_CPS
	select MIPS_GIC
	select MIPS_CMP if SOC_ENABLE_CMP
	select MIPS_CPS if SOC_ENABLE_CPS
	select MIPS_MT_SMP if SOC_ENABLE_MT
	select WEAK_REORDERING_BEYOND_LLSC
	select CLKSRC_MIPS_GIC
	select COMMON_CLK

config CPU_RLX4181
	bool
	default y if SOC_CPU_RLX4181
	select SYS_HAS_CPU_RLX

config CPU_RLX5181
	bool
	default y if SOC_CPU_RLX5181
	select SYS_HAS_CPU_RLX
	select CPU_HAS_CLS

config CPU_RLX4281
	bool
	default y if SOC_CPU_RLX4281 || SOC_CPU_RLX4381
	default y if SOC_CPU_RLX4271 || SOC_CPU_RLX4371
	select SYS_HAS_CPU_RLX
	select CPU_HAS_TLS
	select SYS_SUPPORTS_SMP if SOC_ENABLE_SMP
	select SYS_SUPPORTS_TAROKO_CMP if SOC_ENABLE_SMP
	select TAROKO_GIC if SOC_ENABLE_SMP
	select TAROKO_CMP if SOC_ENABLE_SMP

config CPU_RLX5281
	bool
	default y if SOC_CPU_RLX5281 || SOC_CPU_RLX5381
	default y if SOC_CPU_RLX5271 || SOC_CPU_RLX5371
	select SYS_HAS_CPU_RLX
	select CPU_HAS_CLS
	select CPU_HAS_TLS
	select SYS_SUPPORTS_SMP if SOC_ENABLE_SMP
	select SYS_SUPPORTS_TAROKO_CMP if SOC_ENABLE_SMP
	select TAROKO_GIC if SOC_ENABLE_SMP
	select TAROKO_CMP if SOC_ENABLE_SMP
	select RESET_CONTROLLER
	select COMMON_CLK
	select ARCH_HAVE_CUSTOM_GPIO_H
	select PINCTRL
	select IRQ_DOMAIN

#
# CPU features
#
config CPU_HAS_DSP
	bool

config CPU_HAS_FPU
	bool

config CPU_HAS_EMU
	bool

config CPU_HAS_CLS
	bool

config CPU_HAS_TLS
	bool

config CPU_HAS_RADIAX
	bool

config CPU_HAS_SLEEP
	bool

#
# IRQ
#
config IRQ_ICTL
	bool

#
# CACHE
#
config CPU_HAS_SPRAM
	bool

config CPU_HAS_WBC
	bool
	default y

config CPU_HAS_L2C
	bool

config CPU_HAS_AR7
	bool

config CPU_HAS_WBIC
	bool
	default y if SOC_CACHE_WBIC

#
# BUS
#
config HW_HAS_USB
	bool

config SOC_CPU_RLX
	bool
	default y

config SOC_CPU_RLX5281
	bool
	default y

config SOC_CPU_EL
	bool
	default y

config SOC_ENABLE_FPU
	bool
	default y

config SOC_ENABLE_RADIAX
	bool
	default y

config SOC_ENABLE_OF
	bool
	default y

config SOC_ENABLE_BUILTIN_DTB
	bool
	default y

config SOC_ENABLE_ICTL
	bool
	default y

config SOC_ENABLE_USB
	bool "Enable USB controller"
	default n

#
# System Config
#
config SOC_PLATFORM
	string
	default "sheipa"

config SOC_SHEIPA
	bool
	default y
	select SOC_SUPPORT_RLX4181
	select SOC_SUPPORT_RLX5181
	select SOC_SUPPORT_RLX4281
	select SOC_SUPPORT_RLX5281
	select SOC_SUPPORT_ICTL
	select SOC_SUPPORT_L2C
	select SOC_SUPPORT_PCI
	select SOC_SUPPORT_USB
	select SOC_CPU_RLX
	select SOC_SUPPORT_FPU
	select SOC_ENABLE_OF

choice
	prompt "Devicetree selection"
	default DTB_RTS_NONE
	depends on SOC_SHEIPA
	help
	  Select the devicetree.

	config DTB_RTS_NONE
		bool "None"

	config DTB_RTS3903_EVB
		bool "rts3903 eval board"
		select BUILTIN_DTB

	config DTB_RTS3903N_EVB
		bool "rts3903n eval board"
		select BUILTIN_DTB

	config DTB_RTS3903N_PTZ
		bool "rts3903n ptz board"
		select BUILTIN_DTB

	config DTB_RTS3904_EVB
		bool "rts3904 eval board"
		select BUILTIN_DTB

	config DTB_RTS3904N_EVB
		bool "rts3904n eval board"
		select BUILTIN_DTB

	config DTB_RTS3905N_EVB
		bool "rts3905n eval board"
		select BUILTIN_DTB

	config DTB_RTS3913_FPGA
		bool "rts3913 fpga"
		select BUILTIN_DTB

	config DTB_RTS3913N_EVB
		bool "rts3913n eval board"
		select BUILTIN_DTB

	config DTB_RTS3913L_EVB
		bool "rts3913l eval board"
		select BUILTIN_DTB

	config DTB_RTS3914N_EVB
		bool "rts3914n eval board"
		select BUILTIN_DTB

	config DTB_RLE0849_FPGA
		bool "rle0849 fpga"
		select BUILTIN_DTB

	config DTB_RTS3915_FPGA
		bool "rts3915 fpga"
		select BUILTIN_DTB

	config DTB_RTS3916_EVB
		bool "rts3916 eval board"
		select BUILTIN_DTB

	config DTB_RX5281_VM
		bool "rx5281 VM"
		select BUILTIN_DTB
endchoice

choice
	prompt "Chip model selection"
	default RTS_HW_VER_NONE
	depends on SOC_SHEIPA
	help
	  Select chip model.

	config RTS_HW_VER_NONE
		bool "None"

	config RTS_HW_VER_RX5281VM
		bool "RX5281VM"

	config RTS_HW_VER_RTS3903
		bool "RTS3903"

	config RTS_HW_VER_RTS3913
		bool "RTS3913"

	config RTS_HW_VER_RTS3915
		bool "RTS3915"

endchoice

config DDR_SIZE
	int "DDR Memory Size (MB)"
	default 0
	range 0 512
	help
	  Normally, kernel would get DDR size from Uboot. This option
	  is only used in the situation that you want to evaluate or
	  test your system in different DDR size configurations and don't
	  want to change your hardware.
	  It's strongly recommended to leave this option as 0, unless you
	  REALLY understand what you want.
