/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
/*
 * Copyright (c) 2020 MediaTek Inc.
 */
#ifndef _MTK_TV_DRM_VRR_H_
#define _MTK_TV_DRM_VRR_H_

#include "mtk_tv_drm_panel_common.h"
#include "hwreg_render_common_trigger_gen.h"

#include "../mtk_tv_drm_plane.h"
#include "../mtk_tv_drm_drv.h"
#include "../mtk_tv_drm_crtc.h"
#include "../mtk_tv_drm_connector.h"
#include "../mtk_tv_drm_encoder.h"
#include <linux/gpio/consumer.h>
#include <drm/mtk_tv_drm_panel.h>
#include <drm/mtk_tv_drm.h>
#include <linux/jump_label.h>

//-------------------------------------------------------------------------------------------------
// Define & Macro
//-------------------------------------------------------------------------------------------------

//------------------------------------------------------------------------------
// Enum
//------------------------------------------------------------------------------
enum EN_XC_QMS_SETTING_STATUS {
	E_XC_QMS_SETTING_NONE,
	E_XC_QMS_SETTING_READY,
	E_XC_QMS_SETTING_START,
};

enum EN_XC_QMS_FRAME_IDX {
	E_XC_QMS_FRAME_NEXT,
	E_XC_QMS_FRAME_FRC_READ,

	E_XC_QMS_FRAME_MAX,
};

//{vrr_qms_project}, {vrr_qms_project_sw_mode}, {vrr_qms_project_hw_support}
enum EN_XC_QMS_PROJECT {
	EN_XC_QMS_PROJECT_LOW_BUFFER_USAGE_SW = 0x100,
	EN_XC_QMS_PROJECT_LOW_BUFFER_USAGE_HW = 0x101,
	EN_XC_QMS_PROJECT_PERFECT_DELAY_SW_MLOAD_HW_COUNTER = 0x200,
	EN_XC_QMS_PROJECT_PERFECT_DELAY_HW = 0x201,  //support
	EN_XC_QMS_PROJECT_PERFECT_DELAY_SW_MLOAD = 0x210, //support

	EN_XC_QMS_PROJECT_MAX,
};

//-------------------------------------------------------------------------------------------------
// Structure
//-------------------------------------------------------------------------------------------------
struct vrr_qms_buf_mem_info {
	uint64_t u64VrrQmsBufVirAddr;
	uint64_t u64VrrQmsBufPhyAddr;
	u32 u32VrrQmsBufSize;
};

struct vrr_qms_base_info {
	uint8_t u8TotalDelayFrame;
	uint8_t u8MaxFrameInfoLen;
};

struct vrr_qms_per_frame_info {
	uint8_t u8FrameIdx;
	uint8_t bQms;
	uint8_t u8InputTfr;
	uint8_t u8InputVFreqFRC;
	uint8_t bUsrTfrMode;
	uint8_t u8UsrTfr;
	uint8_t u8OutputVFreqFRC;
	uint8_t u8OutRatio;
	uint8_t u8FrcOpmRIdx;
	uint16_t u16InputVFreqX100;
	uint16_t u16InputVtt;
	uint32_t u32FifoCounter;
};

struct vrr_init_info {
	uint32_t vrr_qms_suport;
	uint32_t vrr_qms_project;
	uint32_t vrr_qms_hw_support_error_handling;
};

//-------------------------------------------------------------------------------------------------
// Function
//-------------------------------------------------------------------------------------------------
struct mtk_tv_kms_context;
void mtk_tv_panel_vrr_control(struct mtk_tv_kms_context *pctx);
void mtk_tv_panel_vrr_get_shm_info(void);
#endif
