/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
/*
 * Copyright (c) 2020 MediaTek Inc.
 * Author Kevin Ho <kevin-yc.ho@mediatek.com>
 */

#ifndef _MT5896_HWSPINLOCK_CODA_H_
#define _MT5896_HWSPINLOCK_CODA_H_

//Page SEMAPH
#define SEMAPH_REG_0000_SEMAPH (0x0000)
    #define REG_SEMA_0 Fld(4, 0, AC_MSKB0)//[3:0]
#define SEMAPH_REG_0004_SEMAPH (0x0004)
    #define REG_SEMA_1 Fld(4, 0, AC_MSKB0)//[3:0]
#define SEMAPH_REG_0008_SEMAPH (0x0008)
    #define REG_SEMA_2 Fld(4, 0, AC_MSKB0)//[3:0]
#define SEMAPH_REG_000C_SEMAPH (0x000C)
    #define REG_SEMA_3 Fld(4, 0, AC_MSKB0)//[3:0]
#define SEMAPH_REG_0010_SEMAPH (0x0010)
    #define REG_SEMA_4 Fld(4, 0, AC_MSKB0)//[3:0]
#define SEMAPH_REG_0014_SEMAPH (0x0014)
    #define REG_SEMA_5 Fld(4, 0, AC_MSKB0)//[3:0]
#define SEMAPH_REG_0018_SEMAPH (0x0018)
    #define REG_SEMA_6 Fld(4, 0, AC_MSKB0)//[3:0]
#define SEMAPH_REG_001C_SEMAPH (0x001C)
    #define REG_SEMA_7 Fld(4, 0, AC_MSKB0)//[3:0]
#define SEMAPH_REG_0020_SEMAPH (0x0020)
    #define REG_SEMA_8 Fld(4, 0, AC_MSKB0)//[3:0]
#define SEMAPH_REG_0024_SEMAPH (0x0024)
    #define REG_SEMA_9 Fld(4, 0, AC_MSKB0)//[3:0]
#define SEMAPH_REG_0028_SEMAPH (0x0028)
    #define REG_SEMA_10 Fld(4, 0, AC_MSKB0)//[3:0]
#define SEMAPH_REG_002C_SEMAPH (0x002C)
    #define REG_SEMA_11 Fld(4, 0, AC_MSKB0)//[3:0]
#define SEMAPH_REG_0030_SEMAPH (0x0030)
    #define REG_SEMA_12 Fld(4, 0, AC_MSKB0)//[3:0]
#define SEMAPH_REG_0034_SEMAPH (0x0034)
    #define REG_SEMA_13 Fld(4, 0, AC_MSKB0)//[3:0]
#define SEMAPH_REG_0038_SEMAPH (0x0038)
    #define REG_SEMA_14 Fld(4, 0, AC_MSKB0)//[3:0]
#define SEMAPH_REG_003C_SEMAPH (0x003C)
    #define REG_SEMA_15 Fld(4, 0, AC_MSKB0)//[3:0]

#endif

