/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2020 MediaTek Inc.
 */


#ifndef __DT_BINDINGS_INTERCONNECT_MTK_MT6873_EMI_H
#define __DT_BINDINGS_INTERCONNECT_MTK_MT6873_EMI_H

#define MT6873_SLAVE_DDR_EMI		0
#define MT6873_MASTER_MCUSYS		1
#define MT6873_MASTER_GPUSYS		2
#define MT6873_MASTER_MMSYS		3
#define MT6873_MASTER_MM_VPU		4
#define MT6873_MASTER_MM_DISP		5
#define MT6873_MASTER_MM_VDEC		6
#define MT6873_MASTER_MM_VENC		7
#define MT6873_MASTER_MM_CAM		8
#define MT6873_MASTER_MM_IMG		9
#define MT6873_MASTER_MM_MDP		10
#define MT6873_MASTER_VPUSYS		11
#define MT6873_MASTER_VPU_0		12
#define MT6873_MASTER_VPU_1		13
#define MT6873_MASTER_MDLASYS		14
#define MT6873_MASTER_MDLA_0		15
#define MT6873_MASTER_UFS		16
#define MT6873_MASTER_PCIE		17
#define MT6873_MASTER_USB		18
#define MT6873_MASTER_DBGIF		19
#define MT6873_SLAVE_HRT_DDR_EMI	20
#define MT6873_MASTER_HRT_MMSYS		21
#define MT6873_MASTER_HRT_MM_DISP	22
#define MT6873_MASTER_HRT_MM_VDEC	23
#define MT6873_MASTER_HRT_MM_VENC	24
#define MT6873_MASTER_HRT_MM_CAM	25
#define MT6873_MASTER_HRT_MM_IMG	26
#define MT6873_MASTER_HRT_MM_MDP	27
#define MT6873_MASTER_HRT_DBGIF		28
#define MT6873_MASTER_WIFI		29
#define MT6873_MASTER_BT		30
#define MT6873_MASTER_NETSYS		31
#endif
