/* SPDX-License-Identifier: BSD-2-Clause */
/*
 * Copyright (c) 2021 MediaTek Inc.
 */

/*! \file   nic_connac3x_tx.h
*    \brief  Functions that provide TX operation in NIC's point of view.
*
*    This file provides TX functions which are responsible for both Hardware and
*    Software Resource Management and keep their Synchronization.
*
*/


#ifndef _NIC_CONNAC3X_TX_H
#define _NIC_CONNAC3X_TX_H

#if (CFG_SUPPORT_CONNAC3X == 1)
/*******************************************************************************
*                         C O M P I L E R   F L A G S
********************************************************************************
*/

/*******************************************************************************
*                    E X T E R N A L   R E F E R E N C E S
********************************************************************************
*/

/*******************************************************************************
*                              C O N S T A N T S
********************************************************************************
*/
#define NORMAL_GI 0
#define SHORT_GI  1
#define CONNAC3X_TX_DESC_LIFE_TIME_UNIT_IN_POWER_OF_2    6

/*------------------------------------------------------------------------*/
/* Tx descriptor field related information                                */
/*------------------------------------------------------------------------*/
/* DW 0 */
#define CONNAC3X_TX_DESC_TX_BYTE_COUNT_MASK              BITS(0, 15)
#define CONNAC3X_TX_DESC_TX_BYTE_COUNT_OFFSET            0
#define CONNAC3X_TX_DESC_ETHER_TYPE_OFFSET_MASK          BITS(16, 22)
#define CONNAC3X_TX_DESC_ETHER_TYPE_OFFSET_OFFSET        16
#define CONNAC3X_TX_DESC_PACKET_FORMAT_MASK              BITS(23, 24)
#define CONNAC3X_TX_DESC_PACKET_FORMAT_OFFSET            23
#define CONNAC3X_TX_DESC_QUEUE_INDEX_MASK                BITS(25, 31)
#define CONNAC3X_TX_DESC_QUEUE_INDEX_OFFSET              25

/* DW 1 */
#define CONNAC3X_TX_DESC_MLD_ID_MASK                     BITS(0, 11)
#define CONNAC3X_TX_DESC_MLD_ID_OFFSET                   0
#define CONNAC3X_TX_DESC_TGID_MASK                       BITS(12, 13)
#define CONNAC3X_TX_DESC_TGID_OFFSET                     12
#define CONNAC3X_TX_DESC_HEADER_FORMAT_MASK              BITS(14, 15)
#define CONNAC3X_TX_DESC_HEADER_FORMAT_OFFSET            14
#define CONNAC3X_TX_DESC_NON_802_11_MORE_DATA            BIT(16)
#define CONNAC3X_TX_DESC_NON_802_11_EOSP                 BIT(17)
#define CONNAC3X_TX_DESC_NON_802_11_REMOVE_VLAN          BIT(18)
#define CONNAC3X_TX_DESC_NON_802_11_VLAN_FIELD           BIT(19)
#define CONNAC3X_TX_DESC_NON_802_11_ETHERNET_II          BIT(20)
#define CONNAC3X_TX_DESC_NOR_802_11_HEADER_LENGTH_MASK   BITS(16, 20)
#define CONNAC3X_TX_DESC_NOR_802_11_HEADER_LENGTH_OFFSET 16
#define CONNAC3X_TX_DESC_ENH_802_11_EOSP                 BIT(17)
#define CONNAC3X_TX_DESC_ENH_802_11_AMSDU                BIT(18)
#define CONNAC3X_TX_DESC_TID_MGMT_TYPE_MASK              BITS(21, 24)
#define CONNAC3X_TX_DESC_TID_MGMT_TYPE_OFFSET            21
#define CONNAC3X_TX_DESC_OWN_MAC_MASK                    BITS(25, 30)
#define CONNAC3X_TX_DESC_OWN_MAC_OFFSET                  25
#define CONNAC3X_TX_DESC_FIXED_RATE                      BIT(31)

/* DW 2 */
#define CONNAC3X_TX_DESC_SUB_TYPE_MASK                   BITS(0, 3)
#define CONNAC3X_TX_DESC_SUB_TYPE_OFFSET                 0
#define CONNAC3X_TX_DESC_TYPE_MASK                       BITS(4, 5)
#define CONNAC3X_TX_DESC_TYPE_OFFSET                     4
#define CONNAC3X_TX_DESC_BEAMFORM_TYPE_MASK              BITS(6, 7)
#define CONNAC3X_TX_DESC_BEAMFORM_TYPE_OFFSET            6
#define CONNAC3X_TX_DESC_OM_MAP                          BIT(8)
#define CONNAC3X_TX_DESC_FORCE_RTS_CTS                   BIT(9)
#define CONNAC3X_TX_DESC_HEADER_PADDING_LENGTH_MASK      BIT(10)
#define CONNAC3X_TX_DESC_HEADER_PADDING_LENGTH_OFFSET    10
#define CONNAC3X_TX_DESC_HEADER_PADDING_MODE             BIT(11)
#define CONNAC3X_TX_DESC_HEADER_PADDING                  BITS(10, 11)
#define CONNAC3X_TX_DESC_HEADER_PADDING_OFFSET           10
#define CONNAC3X_TX_DESC_DURATION_FIELD_CONTROL          BIT(12)
#define CONNAC3X_TX_DESC_HTC_EXISTS                      BIT(13)
#define CONNAC3X_TX_DESC_FRAGMENT_MASK                   BITS(14, 15)
#define CONNAC3X_TX_DESC_FRAGMENT_OFFSET                 14
#define CONNAC3X_TX_DESC_REMAINING_MAX_TX_TIME_MASK      BITS(16, 25)
#define CONNAC3X_TX_DESC_REMAINING_MAX_TX_TIME_OFFSET    16
#define CONNAC3X_TX_DESC_POWER_OFFSET_MASK               BITS(26, 31)
#define CONNAC3X_TX_DESC_POWER_OFFSET_OFFSET             26

/* DW 3 */
#define CONNAC3X_TX_DESC_NO_ACK                          BIT(0)
#define CONNAC3X_TX_DESC_PROTECTED_FRAME                 BIT(1)
#define CONNAC3X_TX_DESC_EXTEND_MORE_DATA                BIT(2)
#define CONNAC3X_TX_DESC_EXTEND_EOSP                     BIT(3)
#define CONNAC3X_TX_DESC_BROADCAST_MULTICAST             BIT(4)
#define CONNAC3X_TX_DESC_HW_AMSDU                        BIT(5)
#define CONNAC3X_TX_DESC_TX_COUNT_MASK                   BITS(6, 10)
#define CONNAC3X_TX_DESC_TX_COUNT_OFFSET                 6
#define CONNAC3X_TX_DESC_REMAINING_TX_COUNT_MASK         BITS(11, 15)
#define CONNAC3X_TX_DESC_REMAINING_TX_COUNT_OFFSET       11
#define CONNAC3X_TX_DESC_SEQUENCE_NUMBER_MASK            BITS(16, 27)
#define CONNAC3X_TX_DESC_SEQUENCE_NUMBER_MASK_OFFSET     16
#define CONNAC3X_TX_DESC_BA_DISABLE                      BIT(28)
#define CONNAC3X_TX_DESC_POWER_MANAGEMENT_CONTROL        BIT(29)
#define CONNAC3X_TX_DESC_PN_IS_VALID                     BIT(30)
#define CONNAC3X_TX_DESC_SN_IS_VALID                     BIT(31)

/* DW 4 */
#define CONNAC3X_TX_DESC_PN_PART1                        BITS(0, 31)

/* DW 5 */
#define CONNAC3X_TX_DESC_PACKET_ID_MASK                  BITS(0, 7)
#define CONNAC3X_TX_DESC_PACKET_ID_OFFSET                0
#define CONNAC3X_TX_DESC_TX_STATUS_FORMAT                BIT(8)
#define CONNAC3X_TX_DESC_TX_STATUS_FORMAT_OFFSET         8
#define CONNAC3X_TX_DESC_TX_STATUS_TO_MCU                BIT(9)
#define CONNAC3X_TX_DESC_TX_STATUS_TO_HOST               BIT(10)
#define CONNAC3X_TX_DESC_FORCE_BSS_COLOR_TO_ZERO         BIT(12)
#define CONNAC3X_TX_DESC_BYPASS_RX_BASED_TX_BLOCKING     BIT(13)
#define CONNAC3X_TX_DESC_BYPASS_TX_BASED_TX_BLOCKING     BIT(14)
#define CONNAC3X_TX_DESC_FORCE_ASSIGN_LINK               BIT(15)
#define CONNAC3X_TX_DESC_PN_PART2_MASK                   BITS(16, 31)
#define CONNAC3X_TX_DESC_PN_PART2__OFFSET                16

/* DW 6 */
#define CONNAC3X_TX_DESC_AMSDU_CAP_UTXB                  BIT(1)
#define CONNAC3X_TX_DESC_DA_SOURCE_SELECTION             BIT(2)
#define CONNAC3X_TX_DESC_DIS_MAT                         BIT(3)
#define CONNAC3X_TX_DESC_MSDU_COUNT_MASK                 BITS(4, 9)
#define CONNAC3X_TX_DESC_MSDU_COUNT_OFFSET               4
#define CONNAC3X_TX_DESC_TIMESTAMP_OFFSET_IDX_MASK       BITS(10, 14)
#define CONNAC3X_TX_DESC_TIMESTAMP_OFFSET_IDX_OFFSET     10
#define CONNAC3X_TX_DESC_TIMESTAMP_OFFSET_ENABLE         BIT(15)
#define CONNAC3X_TX_DESC_FIXED_RATE_INDEX_MASK           BITS(16, 21)
#define CONNAC3X_TX_DESC_FIXED_RATE_INDEX_OFFSET         16
#define CONNAC3X_TX_DESC_BANDWIDTH_MASK                  BITS(22, 25)
#define CONNAC3X_TX_DESC_BANDWIDTH_OFFSET                22
#define CONNAC3X_TX_DESC_VALID_TXD_ARRIVAL_TIME          BIT(28)
#define CONNAC3X_TX_DESC_TX_PACKET_SOURCE_MASK           BITS(30, 31)
#define CONNAC3X_TX_DESC_TX_PACKET_SOURCE_OFFSET         30

/* DW 7 */
#define CONNAC3X_TX_DESC_SW_PREDICT_TX_TIME_MASK         BITS(0, 9)
#define CONNAC3X_TX_DESC_SW_PREDICT_TX_TIME_OFFSET       0
#define CONNAC3X_TX_DESC_UDP_TCP_CHECKSUM_OFFLOAD        BIT(15)
#define CONNAC3X_TX_DESC_AGGREGATED_TXD_COUNT_MASK       BITS(22, 25)
#define CONNAC3X_TX_DESC_AGGREGATED_TXD_COUNT_OFFSET     22
#define CONNAC3X_TX_DESC_THIS_TXD_IS_AGGREGATED          BIT(26)
#define CONNAC3X_TX_DESC_HIF_OR_MAC_TXD_SDO              BIT(27)
#define CONNAC3X_TX_DESC_DROP_BY_SDO                     BIT(28)
#define CONNAC3X_TX_DESC_IP_CHKSUM_OFFLOAD               BIT(29)
#define CONNAC3X_TX_DESC_TXD_LENGTH_MASK                 BITS(30, 31)
#define CONNAC3X_TX_DESC_TXD_LENGTH_OFFSET               30

/* For Debug Information Use */
#define CONNAC3X_TX_DESC_PSE_FID_MASK                    BITS(16, 27)
#define CONNAC3X_TX_DESC_PSE_FID_OFFSET                  16
#define CONNAC3X_TX_DESC_CTXD_CNT_MASK                   BITS(23, 25)
#define CONNAC3X_TX_DESC_CTXD_CNT_OFFSET                 23
#define CONNAC3X_TX_DESC_CTXD                            BIT(26)

/*******************************************************************************
*                             D A T A   T Y P E S
********************************************************************************
*/

enum ENUM_TXD_TID_MGMT_TYPE {
	TYPE_NORMAL_MANAGEMENT,
	TYPE_TIMING_MEASUREMENT,
	TYPE_ADDBA_FRAME,
};

struct HW_MAC_CONNAC3X_TX_DESC {
	uint32_t u4DW0;
	uint32_t u4DW1;
	uint32_t u4DW2;
	uint32_t u4DW3;
	uint32_t u4PN1;
	uint16_t u2DW5_0;
	uint16_t u2PN2;
	uint32_t u4DW6;
	uint32_t u4DW7;
};

/*******************************************************************************
*                            P U B L I C   D A T A
********************************************************************************
*/

/*******************************************************************************
*                           P R I V A T E   D A T A
********************************************************************************
*/

/*******************************************************************************
*                                 M A C R O S
********************************************************************************
*/

/*------------------------------------------------------------------------------
 * MACRO for HW_MAC_TX_DESC_T
 *------------------------------------------------------------------------------
 */
/* DW 0 */
#define HAL_MAC_CONNAC3X_TXD_GET_TX_BYTE_COUNT(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW0, \
CONNAC3X_TX_DESC_TX_BYTE_COUNT_MASK, CONNAC3X_TX_DESC_TX_BYTE_COUNT_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_TX_BYTE_COUNT(_prHwMacTxD, _u2TxByteCount)\
TX_DESC_SET_FIELD(((_prHwMacTxD)->u4DW0), ((uint16_t)_u2TxByteCount), \
CONNAC3X_TX_DESC_TX_BYTE_COUNT_MASK, CONNAC3X_TX_DESC_TX_BYTE_COUNT_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_GET_ETHER_TYPE_OFFSET(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW0, \
CONNAC3X_TX_DESC_ETHER_TYPE_OFFSET_MASK, \
CONNAC3X_TX_DESC_ETHER_TYPE_OFFSET_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_ETHER_TYPE_OFFSET(_prHwMacTxD, _ucEthTypOff)\
TX_DESC_SET_FIELD(((_prHwMacTxD)->u4DW0), ((uint8_t)_ucEthTypOff), \
CONNAC3X_TX_DESC_ETHER_TYPE_OFFSET_MASK, \
CONNAC3X_TX_DESC_ETHER_TYPE_OFFSET_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_GET_PKT_FORMAT(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW0, \
CONNAC3X_TX_DESC_PACKET_FORMAT_MASK, CONNAC3X_TX_DESC_PACKET_FORMAT_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_PKT_FORMAT(_prHwMacTxDesc, _ucPktFormat) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW0), ((uint8_t)_ucPktFormat), \
CONNAC3X_TX_DESC_PACKET_FORMAT_MASK, CONNAC3X_TX_DESC_PACKET_FORMAT_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_GET_QUEUE_INDEX(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW0,\
CONNAC3X_TX_DESC_QUEUE_INDEX_MASK, CONNAC3X_TX_DESC_QUEUE_INDEX_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_QUEUE_INDEX(_prHwMacTxDesc, _ucQueueIndex) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW0), ((uint8_t)_ucQueueIndex), \
CONNAC3X_TX_DESC_QUEUE_INDEX_MASK, CONNAC3X_TX_DESC_QUEUE_INDEX_OFFSET)

/* DW 1 */
#define HAL_MAC_CONNAC3X_TXD_GET_MLD_ID(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW1,\
CONNAC3X_TX_DESC_MLD_ID_MASK, CONNAC3X_TX_DESC_MLD_ID_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_MLD_ID(_prHwMacTxDesc, _ucWlanIdx) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW1), ((uint8_t)_ucWlanIdx), \
CONNAC3X_TX_DESC_MLD_ID_MASK, CONNAC3X_TX_DESC_MLD_ID_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_GET_TGID(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW1,\
CONNAC3X_TX_DESC_TGID_MASK, CONNAC3X_TX_DESC_TGID_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_TGID(_prHwMacTxDesc, _ucTGID) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW1), ((uint8_t)_ucTGID), \
CONNAC3X_TX_DESC_TGID_MASK, CONNAC3X_TX_DESC_TGID_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_GET_HEADER_FORMAT(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW1, \
CONNAC3X_TX_DESC_HEADER_FORMAT_MASK, CONNAC3X_TX_DESC_HEADER_FORMAT_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_HEADER_FORMAT(_prHwMacTxDesc, _ucHdrFormat) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW1), \
((uint8_t)_ucHdrFormat), CONNAC3X_TX_DESC_HEADER_FORMAT_MASK,\
CONNAC3X_TX_DESC_HEADER_FORMAT_OFFSET)

/* HF = 0x00, 802.11 normal mode */
#define HAL_MAC_CONNAC3X_TXD_IS_MORE_DATA(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW1 & CONNAC3X_TX_DESC_NON_802_11_MORE_DATA)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_MORE_DATA(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW1 |= CONNAC3X_TX_DESC_NON_802_11_MORE_DATA)
#define HAL_MAC_CONNAC3X_TXD_UNSET_MORE_DATA(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW1 &= ~CONNAC3X_TX_DESC_NON_802_11_MORE_DATA)

#define HAL_MAC_CONNAC3X_TXD_IS_REMOVE_VLAN(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW1 & CONNAC3X_TX_DESC_NON_802_11_REMOVE_VLAN)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_REMOVE_VLAN(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW1 |= CONNAC3X_TX_DESC_NON_802_11_REMOVE_VLAN)
#define HAL_MAC_CONNAC3X_TXD_UNSET_REMOVE_VLAN(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW1 &= ~CONNAC3X_TX_DESC_NON_802_11_REMOVE_VLAN)

#define HAL_MAC_CONNAC3X_TXD_IS_VLAN(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW1 & CONNAC3X_TX_DESC_NON_802_11_VLAN_FIELD)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_VLAN(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW1 |= CONNAC3X_TX_DESC_NON_802_11_VLAN_FIELD)
#define HAL_MAC_CONNAC3X_TXD_UNSET_VLAN(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW1 &= ~CONNAC3X_TX_DESC_NON_802_11_VLAN_FIELD)

#define HAL_MAC_CONNAC3X_TXD_IS_ETHERNET_II(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW1 & CONNAC3X_TX_DESC_NON_802_11_ETHERNET_II)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_ETHERNET_II(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW1 |= CONNAC3X_TX_DESC_NON_802_11_ETHERNET_II)
#define HAL_MAC_CONNAC3X_TXD_UNSET_ETHERNET_II(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW1 &= ~CONNAC3X_TX_DESC_NON_802_11_ETHERNET_II)

/* HF = 0x00/0x11, 802.11 normal/enhancement mode */
#define HAL_MAC_CONNAC3X_TXD_IS_EOSP(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW1 & CONNAC3X_TX_DESC_NON_802_11_EOSP)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_EOSP(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW1 |= CONNAC3X_TX_DESC_NON_802_11_EOSP)
#define HAL_MAC_CONNAC3X_TXD_UNSET_EOSP(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW1 &= ~CONNAC3X_TX_DESC_NON_802_11_EOSP)

/* HF = 0x11, 802.11 enhancement mode */
#define HAL_MAC_CONNAC3X_TXD_IS_AMSDU(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW1 & CONNAC3X_TX_DESC_ENH_802_11_AMSDU)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_AMSDU(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW1 |= CONNAC3X_TX_DESC_ENH_802_11_AMSDU)
#define HAL_MAC_CONNAC3X_TXD_UNSET_AMSDU(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW1 &= ~CONNAC3X_TX_DESC_ENH_802_11_AMSDU)

/* HF = 0x10, non-802.11 */
#define HAL_MAC_CONNAC3X_TXD_GET_802_11_HEADER_LENGTH(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW1, \
CONNAC3X_TX_DESC_NOR_802_11_HEADER_LENGTH_MASK, \
CONNAC3X_TX_DESC_NOR_802_11_HEADER_LENGTH_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_802_11_HEADER_LENGTH(_prHwMacTxD, _ucHdrLen)\
TX_DESC_SET_FIELD(((_prHwMacTxD)->u4DW1), ((uint8_t)_ucHdrLen), \
CONNAC3X_TX_DESC_NOR_802_11_HEADER_LENGTH_MASK, \
CONNAC3X_TX_DESC_NOR_802_11_HEADER_LENGTH_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_GET_TID_MGMT_TYPE(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW1, \
CONNAC3X_TX_DESC_TID_MGMT_TYPE_MASK, CONNAC3X_TX_DESC_TID_MGMT_TYPE_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_TID_MGMT_TYPE(_prHwMacTxDesc, _ucTID) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW1), \
((uint8_t)_ucTID), CONNAC3X_TX_DESC_TID_MGMT_TYPE_MASK, \
CONNAC3X_TX_DESC_TID_MGMT_TYPE_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_GET_OWN_MAC_INDEX(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW1, \
CONNAC3X_TX_DESC_OWN_MAC_MASK, CONNAC3X_TX_DESC_OWN_MAC_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_OWN_MAC_INDEX(_prHwMacTxDesc, _ucOwnMacIdx) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW1), ((uint8_t)_ucOwnMacIdx), \
CONNAC3X_TX_DESC_OWN_MAC_MASK, CONNAC3X_TX_DESC_OWN_MAC_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_IS_FIXED_RATE_ENABLE(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW1 & CONNAC3X_TX_DESC_FIXED_RATE)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_FIXED_RATE_ENABLE(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW1 |= CONNAC3X_TX_DESC_FIXED_RATE)
#define HAL_MAC_CONNAC3X_TXD_SET_FIXED_RATE_DISABLE(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW1 &= ~CONNAC3X_TX_DESC_FIXED_RATE)

/* DW 2 */
#define HAL_MAC_CONNAC3X_TXD_GET_SUB_TYPE(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW2, \
CONNAC3X_TX_DESC_SUB_TYPE_MASK, CONNAC3X_TX_DESC_SUB_TYPE_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_SUB_TYPE(_prHwMacTxDesc, _ucSubType) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW2), ((uint8_t)_ucSubType), \
CONNAC3X_TX_DESC_SUB_TYPE_MASK, CONNAC3X_TX_DESC_SUB_TYPE_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_GET_TYPE(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW2, CONNAC3X_TX_DESC_TYPE_MASK, \
CONNAC3X_TX_DESC_TYPE_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_TYPE(_prHwMacTxDesc, _ucType) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW2), ((uint8_t)_ucType), \
CONNAC3X_TX_DESC_TYPE_MASK, CONNAC3X_TX_DESC_TYPE_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_GET_BEAMFORM_TYPE(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW2, \
CONNAC3X_TX_DESC_BEAMFORM_TYPE_MASK, \
CONNAC3X_TX_DESC_BEAMFORM_TYPE_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_BEAMFORM_TYPE(_prHwMacTxDesc, _ucType) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW2), ((uint8_t)_ucType), \
CONNAC3X_TX_DESC_BEAMFORM_TYPE_MASK, CONNAC3X_TX_DESC_BEAMFORM_TYPE_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_IS_OM_MAP(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW2 & CONNAC3X_TX_DESC_OM_MAP)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_OM_MAP(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW2 |= CONNAC3X_TX_DESC_OM_MAP)
#define HAL_MAC_CONNAC3X_TXD_UNSET_OM_MAP(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW2 &= ~CONNAC3X_TX_DESC_OM_MAP)

#define HAL_MAC_CONNAC3X_TXD_IS_FORCE_RTS_CTS_EN(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW2 & CONNAC3X_TX_DESC_FORCE_RTS_CTS)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_FORCE_RTS_CTS(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW2 |= CONNAC3X_TX_DESC_FORCE_RTS_CTS)
#define HAL_MAC_CONNAC3X_TXD_UNSET_FORCE_RTS_CTS(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW2 &= ~CONNAC3X_TX_DESC_FORCE_RTS_CTS)

#define HAL_MAC_CONNAC3X_TXD_GET_HEADER_PADDING(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW2, \
CONNAC3X_TX_DESC_HEADER_PADDING, \
CONNAC3X_TX_DESC_HEADER_PADDING_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_HEADER_PADDING(_prHwMacTxD, _ucHdrPadding) \
TX_DESC_SET_FIELD(((_prHwMacTxD)->u4DW2), ((uint8_t)_ucHdrPadding), \
CONNAC3X_TX_DESC_HEADER_PADDING, \
CONNAC3X_TX_DESC_HEADER_PADDING_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_IS_DURATION_CONTROL_BY_SW(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW2 & CONNAC3X_TX_DESC_DURATION_FIELD_CONTROL)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_DURATION_CONTROL_BY_SW(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW2 |= CONNAC3X_TX_DESC_DURATION_FIELD_CONTROL)
#define HAL_MAC_CONNAC3X_TXD_SET_DURATION_CONTROL_BY_HW(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW2 &= ~CONNAC3X_TX_DESC_DURATION_FIELD_CONTROL)

#define HAL_MAC_CONNAC3X_TXD_IS_HTC_EXIST(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW2 & CONNAC3X_TX_DESC_HTC_EXISTS)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_HTC_EXIST(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW2 |= CONNAC3X_TX_DESC_HTC_EXISTS)
#define HAL_MAC_CONNAC3X_TXD_UNSET_HTC_EXIST(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW2 &= ~CONNAC3X_TX_DESC_HTC_EXISTS)

#define HAL_MAC_CONNAC3X_TXD_IS_FRAG_PACKET(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW2 & CONNAC3X_TX_DESC_FRAGMENT_MASK)?TRUE:FALSE)

#define HAL_MAC_CONNAC3X_TXD_GET_FRAG_PACKET_POS(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW2, CONNAC3X_TX_DESC_FRAGMENT_MASK, \
CONNAC3X_TX_DESC_FRAGMENT_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_FRAG_PACKET_POS(_prHwMacTxDesc, _ucFragPos)\
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW2), ((uint8_t)_ucFragPos), \
CONNAC3X_TX_DESC_FRAGMENT_MASK, CONNAC3X_TX_DESC_FRAGMENT_OFFSET)

/* For driver */
/* in unit of 32TU */
#define HAL_MAC_CONNAC3X_TXD_GET_REMAINING_LIFE_TIME(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW2, \
CONNAC3X_TX_DESC_REMAINING_MAX_TX_TIME_MASK, \
CONNAC3X_TX_DESC_REMAINING_MAX_TX_TIME_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_REMAINING_LIFE_TIME(_prHwMacTxD, _LifeTime) \
TX_DESC_SET_FIELD(((_prHwMacTxD)->u4DW2), ((uint8_t)_LifeTime), \
CONNAC3X_TX_DESC_REMAINING_MAX_TX_TIME_MASK, \
CONNAC3X_TX_DESC_REMAINING_MAX_TX_TIME_OFFSET)

/* in unit of ms (minimal value is about 40ms) */
#define HAL_MAC_CONNAC3X_TXD_GET_REMAINING_LIFE_TIME_IN_MS(_prHwMacTxDesc) \
(TU_TO_MSEC(HAL_MAC_CONNAC3X_TXD_GET_REMAINING_LIFE_TIME(_prHwMacTxDesc)\
<< CONNAC3X_TX_DESC_LIFE_TIME_UNIT_IN_POWER_OF_2))


/*
*    Remaining Life Time/ Max TX Time: This field indicates the remaining life
*                                   time in unit of 64TU used for this packet.
*    8'h0: No life time for current packet, HW should NOT change this field
*    8'hN: N is not 0, HW will calculation a Max. TX time and replace remaining
*          TX time with it. The Max. value is 127.
*    The MSB bit is reserved for HW and SW should set to 0
*    Due to HW design issue, the remaining life time sometimes may have 32TU
*          more than configured.
*    PP will replace this field with "Max. TX Time".
*           (SUM of (Remaining Life Time + Internal Free-run Timer)).
*           If the SUM is 0, PP will add 1 to it.
*/
#define HAL_MAC_CONNAC3X_TXD_SET_REMAINING_LIFE_TIME_IN_MS(_prHwTxD, _LifeMs)\
do { \
uint32_t u4LifeTimeInUnit = ((MSEC_TO_USEC(_LifeMs) / USEC_PER_TU) \
			    >> CONNAC3X_TX_DESC_LIFE_TIME_UNIT_IN_POWER_OF_2); \
if (u4LifeTimeInUnit >= BIT(7)) \
	u4LifeTimeInUnit = BITS(0, 6); \
else if ((u4LifeTimeInUnit != TX_DESC_TX_TIME_NO_LIMIT) \
	&& (u4LifeTimeInUnit == TX_DESC_TX_TIME_NO_LIMIT)) \
	u4LifeTimeInUnit = 1; \
HAL_MAC_CONNAC3X_TXD_SET_REMAINING_LIFE_TIME(_prHwTxD, \
	(uint8_t)u4LifeTimeInUnit); \
} while (0)

#define HAL_MAC_CONNAC3X_TXD_GET_POWER_OFFSET(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW2, \
CONNAC3X_TX_DESC_POWER_OFFSET_MASK, CONNAC3X_TX_DESC_POWER_OFFSET_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_POWER_OFFSET(_prHwTxD, _ucPowerOffset) \
TX_DESC_SET_FIELD(((_prHwTxD)->u4DW2), ((uint8_t)_ucPowerOffset), \
CONNAC3X_TX_DESC_POWER_OFFSET_MASK, CONNAC3X_TX_DESC_POWER_OFFSET_OFFSET)

/* DW 3 */
#define HAL_MAC_CONNAC3X_TXD_IS_NO_ACK(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW3 & CONNAC3X_TX_DESC_NO_ACK)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_NO_ACK(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 |= CONNAC3X_TX_DESC_NO_ACK)
#define HAL_MAC_CONNAC3X_TXD_UNSET_NO_ACK(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 &= ~CONNAC3X_TX_DESC_NO_ACK)

#define HAL_MAC_CONNAC3X_TXD_IS_PROTECTION(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW3 & CONNAC3X_TX_DESC_PROTECTED_FRAME)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_PROTECTION(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 |= CONNAC3X_TX_DESC_PROTECTED_FRAME)
#define HAL_MAC_CONNAC3X_TXD_UNSET_PROTECTION(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 &= ~CONNAC3X_TX_DESC_PROTECTED_FRAME)

#define HAL_MAC_CONNAC3X_TXD_IS_EXTEND_MORE_DATA(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW3 & CONNAC3X_TX_DESC_EXTEND_MORE_DATA)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_EXTEND_MORE_DATA(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 |= CONNAC3X_TX_DESC_EXTEND_MORE_DATA)
#define HAL_MAC_CONNAC3X_TXD_UNSET_EXTEND_MORE_DATA(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 &= ~CONNAC3X_TX_DESC_EXTEND_MORE_DATA)

#define HAL_MAC_CONNAC3X_TXD_IS_EXTEND_EOSP(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW3 & CONNAC3X_TX_DESC_EXTEND_EOSP)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_EXTEND_EOSP(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 |= CONNAC3X_TX_DESC_EXTEND_EOSP)
#define HAL_MAC_CONNAC3X_TXD_UNSET_EXTEND_EOSP(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 &= ~CONNAC3X_TX_DESC_EXTEND_EOSP)

#define HAL_MAC_CONNAC3X_TXD_IS_BMC(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW3 & CONNAC3X_TX_DESC_BROADCAST_MULTICAST)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_BMC(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 |= CONNAC3X_TX_DESC_BROADCAST_MULTICAST)
#define HAL_MAC_CONNAC3X_TXD_UNSET_BMC(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 &= ~CONNAC3X_TX_DESC_BROADCAST_MULTICAST)

#define HAL_MAC_CONNAC3X_TXD_IS_HW_AMSDU(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW3 & CONNAC3X_TX_DESC_HW_AMSDU)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_HW_AMSDU(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 |= CONNAC3X_TX_DESC_HW_AMSDU)
#define HAL_MAC_CONNAC3X_TXD_UNSET_HW_AMSDU(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 &= ~CONNAC3X_TX_DESC_HW_AMSDU)

#define HAL_MAC_CONNAC3X_TXD_GET_TX_COUNT(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW3, \
CONNAC3X_TX_DESC_TX_COUNT_MASK, CONNAC3X_TX_DESC_TX_COUNT_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_TX_COUNT(_prHwMacTxDesc, _ucTxCountLimit) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW3), ((uint8_t)_ucTxCountLimit), \
CONNAC3X_TX_DESC_TX_COUNT_MASK, CONNAC3X_TX_DESC_TX_COUNT_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_GET_REMAINING_TX_COUNT(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW3, \
CONNAC3X_TX_DESC_REMAINING_TX_COUNT_MASK, \
CONNAC3X_TX_DESC_REMAINING_TX_COUNT_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_REMAINING_TX_COUNT(_prHwTxD, _ucTxCntLimit) \
TX_DESC_SET_FIELD(((_prHwTxD)->u4DW3), ((uint8_t)_ucTxCntLimit), \
CONNAC3X_TX_DESC_REMAINING_TX_COUNT_MASK, \
CONNAC3X_TX_DESC_REMAINING_TX_COUNT_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_GET_SEQUENCE_NUMBER(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW3, \
CONNAC3X_TX_DESC_SEQUENCE_NUMBER_MASK, \
CONNAC3X_TX_DESC_SEQUENCE_NUMBER_MASK_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_IS_BA_DISABLE(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW3 & CONNAC3X_TX_DESC_BA_DISABLE)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_BA_DISABLE(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 |= CONNAC3X_TX_DESC_BA_DISABLE)
#define HAL_MAC_CONNAC3X_TXD_SET_BA_ENABLE(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 &= ~CONNAC3X_TX_DESC_BA_DISABLE)

#define HAL_MAC_CONNAC3X_TXD_IS_SW_PM_CONTROL(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW3 & CONNAC3X_TX_DESC_POWER_MANAGEMENT_CONTROL) ?\
	TRUE : FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_SW_PM_CONTROL(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 |= CONNAC3X_TX_DESC_POWER_MANAGEMENT_CONTROL)
#define HAL_MAC_CONNAC3X_TXD_SET_HW_PM_CONTROL(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 &= ~CONNAC3X_TX_DESC_POWER_MANAGEMENT_CONTROL)

#define HAL_MAC_CONNAC3X_TXD_SET_SEQUENCE_NUMBER(_prHwMacTxDesc, _u2SN) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW3), \
((uint16_t)_u2SN), CONNAC3X_TX_DESC_SEQUENCE_NUMBER_MASK, \
CONNAC3X_TX_DESC_SEQUENCE_NUMBER_MASK_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_IS_TXD_PN_VALID(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW3 & CONNAC3X_TX_DESC_PN_IS_VALID)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_TXD_PN_VALID(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 |= CONNAC3X_TX_DESC_PN_IS_VALID)
#define HAL_MAC_CONNAC3X_TXD_SET_TXD_PN_INVALID(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 &= ~CONNAC3X_TX_DESC_PN_IS_VALID)

#define HAL_MAC_CONNAC3X_TXD_IS_TXD_SN_VALID(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW3 & CONNAC3X_TX_DESC_SN_IS_VALID)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_TXD_SN_VALID(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 |= CONNAC3X_TX_DESC_SN_IS_VALID)
#define HAL_MAC_CONNAC3X_TXD_SET_TXD_SN_INVALID(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW3 &= ~CONNAC3X_TX_DESC_SN_IS_VALID)

#define HAL_MAC_CONNAC3X_TXD_ASSIGN_SN_BY_SW(_prHwMacTxDesc, _u2SN) \
{ \
	HAL_MAC_CONNAC3X_TXD_SET_SEQUENCE_NUMBER(_prHwMacTxDesc, _u2SN); \
	HAL_MAC_CONNAC3X_TXD_SET_TXD_SN_VALID(_prHwMacTxDesc); \
}
#define HAL_MAC_CONNAC3X_TXD_ASSIGN_SN_BY_HW(_prHwMacTxDesc) \
{ \
	HAL_MAC_CONNAC3X_TXD_SET_SEQUENCE_NUMBER(_prHwMacTxDesc, 0); \
	HAL_MAC_CONNAC3X_TXD_SET_TXD_SN_INVALID(_prHwMacTxDesc); \
}

#define HAL_MAC_CONNAC3X_TXD_ASSIGN_PN_BY_SW(_prHwTxD, _u4PN0_31, _u2PN32_47)\
{ \
	HAL_MAC_TX_DESC_SET_PN(_prHwTxD, _u4PN0_31, _u2PN32_47); \
	HAL_MAC_CONNAC3X_TXD_SET_TXD_PN_VALID(_prHwTxD); \
}
#define HAL_MAC_CONNAC3X_TXD_ASSIGN_PSN_BY_HW(_prHwMacTxDesc) \
{ \
	HAL_MAC_TX_DESC_SET_PN(_prHwMacTxDesc, 0, 0); \
	HAL_MAC_CONNAC3X_TXD_SET_TXD_PN_INVALID(_prHwMacTxDesc); \
}

/* DW 5 */
#define HAL_MAC_CONNAC3X_TXD_GET_PID(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u2DW5_0, \
CONNAC3X_TX_DESC_PACKET_ID_MASK, CONNAC3X_TX_DESC_PACKET_ID_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_PID(_prHwMacTxDesc, _ucPID) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u2DW5_0), ((uint8_t)_ucPID), \
CONNAC3X_TX_DESC_PACKET_ID_MASK, CONNAC3X_TX_DESC_PACKET_ID_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_GET_TXS_FORMAT(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u2DW5_0, \
CONNAC3X_TX_DESC_TX_STATUS_FORMAT, CONNAC3X_TX_DESC_TX_STATUS_FORMAT_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_TXS_FORMAT(_prHwMacTxDesc, _ucTXSFormat) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u2DW5_0), ((uint8_t)_ucTXSFormat), \
CONNAC3X_TX_DESC_TX_STATUS_FORMAT, CONNAC3X_TX_DESC_TX_STATUS_FORMAT_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_IS_TXS_TO_MCU(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u2DW5_0 & CONNAC3X_TX_DESC_TX_STATUS_TO_MCU)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_TXS_TO_MCU(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u2DW5_0 |= CONNAC3X_TX_DESC_TX_STATUS_TO_MCU)
#define HAL_MAC_CONNAC3X_TXD_UNSET_TXS_TO_MCU(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u2DW5_0 &= ~CONNAC3X_TX_DESC_TX_STATUS_TO_MCU)

#define HAL_MAC_CONNAC3X_TXD_IS_TXS_TO_HOST(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u2DW5_0 & CONNAC3X_TX_DESC_TX_STATUS_TO_HOST)?TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_TXS_TO_HOST(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u2DW5_0 |= CONNAC3X_TX_DESC_TX_STATUS_TO_HOST)
#define HAL_MAC_CONNAC3X_TXD_UNSET_TXS_TO_HOST(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u2DW5_0 &= ~CONNAC3X_TX_DESC_TX_STATUS_TO_HOST)

#define HAL_MAC_CONNAC3X_TXD_IS_FORCE_BSS_COLOR_TO_ZERO(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u2DW5_0 & CONNAC3X_TX_DESC_FORCE_BSS_COLOR_TO_ZERO) \
? TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_FORCE_BSS_COLOR_TO_ZERO(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u2DW5_0 |= CONNAC3X_TX_DESC_FORCE_BSS_COLOR_TO_ZERO)
#define HAL_MAC_CONNAC3X_TXD_UNSET_FORCE_BSS_COLOR_TO_ZERO(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u2DW5_0 &= ~CONNAC3X_TX_DESC_FORCE_BSS_COLOR_TO_ZERO)

#define HAL_MAC_CONNAC3X_TXD_IS_BYPASS_RX_BASED_TX_BLOCKING(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u2DW5_0 & CONNAC3X_TX_DESC_BYPASS_RX_BASED_TX_BLOCKING) \
? TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_BYPASS_RX_BASED_TX_BLOCKING(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u2DW5_0 |= CONNAC3X_TX_DESC_BYPASS_RX_BASED_TX_BLOCKING)
#define HAL_MAC_CONNAC3X_TXD_UNSET_BYPASS_RX_BASED_TX_BLOCKING(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u2DW5_0 &= ~CONNAC3X_TX_DESC_BYPASS_RX_BASED_TX_BLOCKING)

#define HAL_MAC_CONNAC3X_TXD_IS_BYPASS_TX_BASED_TX_BLOCKING(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u2DW5_0 & CONNAC3X_TX_DESC_BYPASS_TX_BASED_TX_BLOCKING) \
? TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_BYPASS_TX_BASED_TX_BLOCKING(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u2DW5_0 |= CONNAC3X_TX_DESC_BYPASS_TX_BASED_TX_BLOCKING)
#define HAL_MAC_CONNAC3X_TXD_UNSET_BYPASS_TX_BASED_TX_BLOCKING(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u2DW5_0 &= ~CONNAC3X_TX_DESC_BYPASS_TX_BASED_TX_BLOCKING)

#define HAL_MAC_CONNAC3X_TXD_IS_FORCE_ASSIGN_LINK(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u2DW5_0 & CONNAC3X_TX_DESC_FORCE_ASSIGN_LINK) ? TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_FORCE_ASSIGN_LINK(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u2DW5_0 |= CONNAC3X_TX_DESC_FORCE_ASSIGN_LINK)
#define HAL_MAC_CONNAC3X_TXD_UNSET_FORCE_ASSIGN_LINK(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u2DW5_0 &= ~CONNAC3X_TX_DESC_FORCE_ASSIGN_LINK)

/* DW 6 */
#define HAL_MAC_CONNAC3X_TXD_IS_AMSDU_CAP_UTXB(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW6 & CONNAC3X_TX_DESC_AMSDU_CAP_UTXB) ? TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_AMSDU_CAP_UTXB(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW6 |= CONNAC3X_TX_DESC_AMSDU_CAP_UTXB)
#define HAL_MAC_CONNAC3X_TXD_UNSET_AMSDU_CAP_UTXB(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW6 &= ~CONNAC3X_TX_DESC_AMSDU_CAP_UTXB)

#define HAL_MAC_CONNAC3X_TXD_IS_DA_SRC_SELECTION(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW6 & CONNAC3X_TX_DESC_DA_SOURCE_SELECTION) ? TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_DA_SRC_SELECTION(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW6 |= CONNAC3X_TX_DESC_DA_SOURCE_SELECTION)
#define HAL_MAC_CONNAC3X_TXD_UNSET_DA_SRC_SELECTION(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW6 &= ~CONNAC3X_TX_DESC_DA_SOURCE_SELECTION)

#define HAL_MAC_CONNAC3X_TXD_IS_DIS_MAT(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW6 & CONNAC3X_TX_DESC_DIS_MAT) ? TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_DIS_MAT(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW6 |= CONNAC3X_TX_DESC_DIS_MAT)
#define HAL_MAC_CONNAC3X_TXD_UNSET_DIS_MAT(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW6 &= ~CONNAC3X_TX_DESC_DIS_MAT)

#define HAL_MAC_CONNAC3X_TXD_GET_MSDU_COUNT(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW6, \
CONNAC3X_TX_DESC_MSDU_COUNT_MASK, CONNAC3X_TX_DESC_MSDU_COUNT_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_MSDU_COUNT(_prHwMacTxDesc, ucMsduCnt) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW6), ((uint8_t)ucMsduCnt), \
CONNAC3X_TX_DESC_MSDU_COUNT_MASK, CONNAC3X_TX_DESC_MSDU_COUNT_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_GET_TIMESTAMP_OFFSET_IDX(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW6, \
CONNAC3X_TX_DESC_TIMESTAMP_OFFSET_IDX_MASK, \
CONNAC3X_TX_DESC_TIMESTAMP_OFFSET_IDX_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_TIMESTAMP_OFFSET_IDX( \
_prHwMacTxDesc, ucTsOffestIdx) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW6), ((uint8_t)ucTsOffestIdx), \
CONNAC3X_TX_DESC_TIMESTAMP_OFFSET_IDX_MASK, \
CONNAC3X_TX_DESC_TIMESTAMP_OFFSET_IDX_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_IS_TIMESTAMP_OFFSET_ENABLE(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW6 & CONNAC3X_TX_DESC_TIMESTAMP_OFFSET_ENABLE) ? \
TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_TIMESTAMP_OFFSET_ENABLE(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW6 |= CONNAC3X_TX_DESC_TIMESTAMP_OFFSET_ENABLE)
#define HAL_MAC_CONNAC3X_TXD_UNSET_TIMESTAMP_OFFSET_ENABLE(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW6 &= ~CONNAC3X_TX_DESC_TIMESTAMP_OFFSET_ENABLE)

#define HAL_MAC_CONNAC3X_TXD_GET_FIXED_RATE_IDX(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW6, \
CONNAC3X_TX_DESC_FIXED_RATE_INDEX_MASK, \
CONNAC3X_TX_DESC_FIXED_RATE_INDEX_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_FIXED_RATE_IDX( \
_prHwMacTxDesc, ucFRIdx) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW6), ((uint8_t)ucFRIdx), \
CONNAC3X_TX_DESC_FIXED_RATE_INDEX_MASK, \
CONNAC3X_TX_DESC_FIXED_RATE_INDEX_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_GET_FR_BW(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW6, \
CONNAC3X_TX_DESC_BANDWIDTH_MASK, CONNAC3X_TX_DESC_BANDWIDTH_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_FR_BW(_prHwMacTxDesc, ucBw) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW6), ((uint8_t)ucBw), \
CONNAC3X_TX_DESC_BANDWIDTH_MASK, CONNAC3X_TX_DESC_BANDWIDTH_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_IS_VALID_TXD_ARRIVAL_TIME(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW6 & CONNAC3X_TX_DESC_VALID_TXD_ARRIVAL_TIME) ? \
TRUE:FALSE)
#define HAL_MAC_CONNAC3X_TXD_SET_VALID_TXD_ARRIVAL_TIME(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW6 |= CONNAC3X_TX_DESC_VALID_TXD_ARRIVAL_TIME)
#define HAL_MAC_CONNAC3X_TXD_UNSET_VALID_TXD_ARRIVAL_TIME(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW6 &= ~CONNAC3X_TX_DESC_VALID_TXD_ARRIVAL_TIME)

#define HAL_MAC_CONNAC3X_TXD_GET_PACKET_SOURCE(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW6, \
CONNAC3X_TX_DESC_TX_PACKET_SOURCE_MASK, \
CONNAC3X_TX_DESC_TX_PACKET_SOURCE_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_PACKET_SOURCE(_prHwMacTxDesc, ucSrc) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW6), ((uint8_t)ucSrc), \
CONNAC3X_TX_DESC_TX_PACKET_SOURCE_MASK, \
CONNAC3X_TX_DESC_TX_PACKET_SOURCE_OFFSET)

/* DW 7 */
#define HAL_MAC_CONNAC3X_TXD_GET_SW_PREDICT_TX_TIME(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW7, \
CONNAC3X_TX_DESC_SW_PREDICT_TX_TIME_MASK, \
CONNAC3X_TX_DESC_SW_PREDICT_TX_TIME_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_SW_PREDICT_TX_TIME( \
_prHwMacTxDesc, _ucTxTime) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW7), ((uint8_t)_ucTxTime), \
CONNAC3X_TX_DESC_SW_PREDICT_TX_TIME_MASK, \
CONNAC3X_TX_DESC_SW_PREDICT_TX_TIME_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_IS_TCP_UDP_CHKSUM_ENABLED(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW7 & CONNAC3X_TX_DESC_UDP_TCP_CHECKSUM_OFFLOAD) \
? FALSE : TRUE)
#define HAL_MAC_CONNAC3X_TXD_SET_TCP_UDP_CHKSUM(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW7 |= CONNAC3X_TX_DESC_UDP_TCP_CHECKSUM_OFFLOAD)
#define HAL_MAC_CONNAC3X_TXD_UNSET_TCP_UDP_CHKSUM(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW7 &= ~CONNAC3X_TX_DESC_UDP_TCP_CHECKSUM_OFFLOAD)

#define HAL_MAC_CONNAC3X_TXD_GET_AGG_TXD_COUNT(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW7, \
CONNAC3X_TX_DESC_AGGREGATED_TXD_COUNT_MASK, \
CONNAC3X_TX_DESC_AGGREGATED_TXD_COUNT_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_AGG_TXD_COUNT(_prHwMacTxDesc, _ucAggTxdCnt) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW7), ((uint8_t)_ucAggTxdCnt), \
CONNAC3X_TX_DESC_AGGREGATED_TXD_COUNT_MASK, \
CONNAC3X_TX_DESC_AGGREGATED_TXD_COUNT_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_IS_TXD_AGGREGATED(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW7 & CONNAC3X_TX_DESC_THIS_TXD_IS_AGGREGATED)?FALSE:TRUE)
#define HAL_MAC_CONNAC3X_TXD_SET_TXD_AGGREGATED(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW7 |= CONNAC3X_TX_DESC_THIS_TXD_IS_AGGREGATED)
#define HAL_MAC_CONNAC3X_TXD_UNSET_TXD_AGGREGATED(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW7 &= ~CONNAC3X_TX_DESC_THIS_TXD_IS_AGGREGATED)

#define HAL_MAC_CONNAC3X_TXD_IS_HIF_OR_MAC_TXD_SDO(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW7 & CONNAC3X_TX_DESC_HIF_OR_MAC_TXD_SDO)?FALSE:TRUE)
#define HAL_MAC_CONNAC3X_TXD_SET_HIF_OR_MAC_TXD_SDO(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW7 |= CONNAC3X_TX_DESC_HIF_OR_MAC_TXD_SDO)
#define HAL_MAC_CONNAC3X_TXD_UNSET_HIF_OR_MAC_TXD_SDO(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW7 &= ~CONNAC3X_TX_DESC_HIF_OR_MAC_TXD_SDO)

#define HAL_MAC_CONNAC3X_TXD_IS_DROP_BY_SDO(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW7 & CONNAC3X_TX_DESC_DROP_BY_SDO)?FALSE:TRUE)
#define HAL_MAC_CONNAC3X_TXD_SET_DROP_BY_SDO(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW7 |= CONNAC3X_TX_DESC_DROP_BY_SDO)
#define HAL_MAC_CONNAC3X_TXD_UNSET_DROP_BY_SDO(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW7 &= ~CONNAC3X_TX_DESC_DROP_BY_SDO)

#define HAL_MAC_CONNAC3X_TXD_IS_IP_CHKSUM_ENABLED(_prHwMacTxDesc) \
(((_prHwMacTxDesc)->u4DW7 & CONNAC3X_TX_DESC_IP_CHKSUM_OFFLOAD)?FALSE:TRUE)
#define HAL_MAC_CONNAC3X_TXD_SET_IP_CHKSUM(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW7 |= CONNAC3X_TX_DESC_IP_CHKSUM_OFFLOAD)
#define HAL_MAC_CONNAC3X_TXD_UNSET_IP_CHKSUM(_prHwMacTxDesc) \
((_prHwMacTxDesc)->u4DW7 &= ~CONNAC3X_TX_DESC_IP_CHKSUM_OFFLOAD)

#define HAL_MAC_CONNAC3X_TXD_GET_TXD_LENGTH(_prHwMacTxDesc) \
TX_DESC_GET_FIELD((_prHwMacTxDesc)->u4DW7, \
CONNAC3X_TX_DESC_TXD_LENGTH_MASK, CONNAC3X_TX_DESC_TXD_LENGTH_OFFSET)

#define HAL_MAC_CONNAC3X_TXD_SET_TXD_LENGTH(_prHwMacTxDesc, _ucHdrPadding) \
TX_DESC_SET_FIELD(((_prHwMacTxDesc)->u4DW7), ((uint8_t)_ucHdrPadding), \
CONNAC3X_TX_DESC_TXD_LENGTH_MASK, CONNAC3X_TX_DESC_TXD_LENGTH_OFFSET)

/*******************************************************************************
*                  F U N C T I O N   D E C L A R A T I O N S
********************************************************************************
*/


/*******************************************************************************
*                              F U N C T I O N S
********************************************************************************
*/

#endif /* CFG_SUPPORT_CONNAC3X == 1 */
#endif /* _NIC_CONNAC3X_TX_H */

