/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
/*
 * Copyright (c) 2024 MediaTek Inc.
 */

#define SCDISP_BKA4FA_V007 0x149F400

//Page SCDISP_BKA4FA_V007
#define REG_0008_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x008)
	#define REG_0008_SCDISP_BKA4FA_V007_REG_TEST_CTRL_0 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_000C_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x00C)
	#define REG_000C_SCDISP_BKA4FA_V007_REG_TEST_CTRL_1 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_0080_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x080)
	#define REG_0080_SCDISP_BKA4FA_V007_REG_SCDISP_ALL_AUTO_CLK_EN Fld(1, 0, AC_MSKB0)//[0:0]
#define REG_00A0_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0A0)
	#define REG_00A0_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_EN_0 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00A4_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0A4)
	#define REG_00A4_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_EN_1 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00A8_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0A8)
	#define REG_00A8_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_EN_2 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00AC_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0AC)
	#define REG_00AC_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_EN_3 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00B0_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0B0)
	#define REG_00B0_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_EN_4 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00B4_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0B4)
	#define REG_00B4_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_EN_5 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00B8_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0B8)
	#define REG_00B8_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_EN_6 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00BC_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0BC)
	#define REG_00BC_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_EN_7 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00C0_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0C0)
	#define REG_00C0_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_SW_MD_EN_0 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00C4_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0C4)
	#define REG_00C4_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_SW_MD_EN_1 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00C8_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0C8)
	#define REG_00C8_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_SW_MD_EN_2 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00CC_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0CC)
	#define REG_00CC_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_SW_MD_EN_3 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00D0_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0D0)
	#define REG_00D0_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_SW_MD_EN_4 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00D4_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0D4)
	#define REG_00D4_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_SW_MD_EN_5 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00D8_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0D8)
	#define REG_00D8_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_SW_MD_EN_6 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00DC_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0DC)
	#define REG_00DC_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_SW_MD_EN_7 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00E0_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0E0)
	#define REG_00E0_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_DB_EN_0 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00E4_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0E4)
	#define REG_00E4_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_DB_EN_1 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00E8_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0E8)
	#define REG_00E8_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_DB_EN_2 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00EC_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0EC)
	#define REG_00EC_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_DB_EN_3 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00F0_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0F0)
	#define REG_00F0_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_DB_EN_4 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00F4_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0F4)
	#define REG_00F4_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_DB_EN_5 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00F8_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0F8)
	#define REG_00F8_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_DB_EN_6 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_00FC_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x0FC)
	#define REG_00FC_SCDISP_BKA4FA_V007_REG_SCDISP_AUTO_CLK_DB_EN_7 Fld(16, 0, AC_FULLW10)//[15:0]
#define REG_0100_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x100)
	#define REG_0100_SCDISP_BKA4FA_V007_REG_SCDISP_PATH_SEL Fld(4, 0, AC_MSKB0)//[3:0]
	#define REG_0100_SCDISP_BKA4FA_V007_REG_PAT_DET_SRC_SEL Fld(1, 4, AC_MSKB0)//[4:4]
#define REG_0140_SCDISP_BKA4FA_V007 (SCDISP_BKA4FA_V007 + 0x140)
	#define REG_0140_SCDISP_BKA4FA_V007_REG_PATGEN_SEC_SWITCH Fld(1, 0, AC_MSKB0)//[0:0]
