//<MStar Software>
//******************************************************************************
// MStar Software
// Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
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//******************************************************************************
//<MStar Software>

//-------------------------------------------------------------------------------------------------
//  Include Files
//-------------------------------------------------------------------------------------------------
#include "MsCommon.h"
#include "regCHIP.h"
#include "regCPU.h"
#include "drvCPU.h"
#include "drvBDMA.h"
#include "drvMMIO.h"
#include "halCPU.h"
#include "ULog.h"


//-------------------------------------------------------------------------------------------------
//  Driver Compiler Options
//-------------------------------------------------------------------------------------------------


//-------------------------------------------------------------------------------------------------
//  Local Defines
//-------------------------------------------------------------------------------------------------
#define TAG_CPU "CPU"

#define COPRO_HAL_INFO(x, args...)          //{ULOGI(TAG_CPU, x, ##args);}
#define COPRO_HAL_ERR(x, args...)           //{ULOGE(TAG_CPU, x, ##args);}

//-------------------------------------------------------------------------------------------------
//  Local Structures
//-------------------------------------------------------------------------------------------------


//-------------------------------------------------------------------------------------------------
//  Global Variables
//-------------------------------------------------------------------------------------------------
extern MS_VIRT _virtPM;
extern MS_VIRT _virtNON_PM;
extern MS_VIRT _virtMM_AEON;
extern MS_VIRT _virtSEC_R2;
extern MS_VIRT _virtFRC_R2;
extern MS_VIRT _virtSC_R2;

//-------------------------------------------------------------------------------------------------
//  Local Variables
//-------------------------------------------------------------------------------------------------


//-------------------------------------------------------------------------------------------------
//  Debug Functions
//-------------------------------------------------------------------------------------------------


//-------------------------------------------------------------------------------------------------
//  Local Functions
//-------------------------------------------------------------------------------------------------


//-------------------------------------------------------------------------------------------------
//  Global Functions
//-------------------------------------------------------------------------------------------------
// Common
MS_U8 HAL_CPU_Read_Byte(MS_VIRT virtBase, MS_U32 u32Reg)
{
    return ((volatile MS_U8 *)(virtBase))[(u32Reg << 1) - (u32Reg & 1)];
}

MS_U16 HAL_CPU_Read_2Byte(MS_VIRT virtBase, MS_U32 u32Reg)
{
    return ((volatile MS_U16 *)(virtBase))[u32Reg];
}

MS_BOOL HAL_CPU_Write_Byte(MS_VIRT virtBase, MS_U32 u32Reg, MS_U8 u8Val)
{
    if (u32Reg == 0)
    {
        COPRO_HAL_ERR("[%s] base=0x%tX, but reg=0.\n", __func__, (size_t)virtBase);
        return FALSE;
    }
    else
    {
        ((volatile MS_U8 *)(virtBase))[(u32Reg << 1) - (u32Reg & 1)] = u8Val;
        return TRUE;
    }
}

MS_BOOL HAL_CPU_Write_2Byte(MS_VIRT virtBase, MS_U32 u32Reg, MS_U16 u16Val)
{
    if (u32Reg == 0)
    {
        COPRO_HAL_ERR("[%s] base=0x%tX, but reg=0.\n", __func__, (size_t)virtBase);
        return FALSE;
    }
    else
    {
        ((volatile MS_U16 *)(virtBase))[u32Reg] = u16Val;
        return TRUE;
    }
}

// MM-ARON
void HAL_MM_AEON_Disable(void)
{
    COPRO_HAL_INFO("[%s] not support\n", __FUNCTION__);
}

void HAL_MM_AEON_Enable(MS_PHY phyAddr)
{
    COPRO_HAL_INFO("[%s] not support\n", __FUNCTION__);
}

// SEC-R2
void HAL_SEC_R2_Disable(void)
{
    COPRO_HAL_INFO("[%s] not support\n", __FUNCTION__);
}

void HAL_SEC_R2_Enable(MS_PHY phyAddr)
{
    COPRO_HAL_INFO("[%s] not support\n", __FUNCTION__);
}

// FRC-R2
void HAL_FRC_R2_Disable(void)
{
    COPRO_HAL_INFO("[%s] not support\n", __FUNCTION__);
}

void HAL_FRC_R2_Enable(MS_PHY phyAddr)
{
    COPRO_HAL_INFO("[%s] not support\n", __FUNCTION__);
}

// SC-R2
void HAL_SC_R2_Disable(void)
{
    COPRO_HAL_INFO("[%s] not support\n", __FUNCTION__);
}

void HAL_SC_R2_Enable(MS_PHY phyAddr)
{
    COPRO_HAL_INFO("[%s] not support\n", __FUNCTION__);
}

////////////////////////////////////////////////////////////////////////////////
/// @brief \b Function \b Name: HAL_CPU_Cluster_QueryClock
/// @brief \b Function \b Description: Get CPU cluster clock
/// @param  <IN>     \b eCluster : choose one of cpu cluster
/// @param  <OUT>    \b None :
/// @param  <RET>    \b MS_U32 : return clock > 0(Hz) when function succeed
////////////////////////////////////////////////////////////////////////////////
MS_U32 HAL_CPU_Cluster_QueryClock(CPU_CLUSTER eCluster)
{
    MS_PHY phyAddr = NPM_REG_ARMCA53;
    MS_U32 u32Clock = 0;
    MS_U32 u32Retry = 100;
    MS_U8  u8Val = 0;

    /* Set reg_calc_en[0:0] => 1'b0 */
    u8Val = (HAL_CPU_Read_Byte(_virtNON_PM, phyAddr + REG_CALC_EN_DONE) & ~BIT0);
    HAL_CPU_Write_Byte(_virtNON_PM, (phyAddr + REG_CALC_EN_DONE), u8Val);
    MsOS_DelayTaskUs(1);

    /* Set reg_calc_en[0:0] => 1'b1 */
    u8Val = (HAL_CPU_Read_Byte(_virtNON_PM, phyAddr + REG_CALC_EN_DONE) | BIT0);
    HAL_CPU_Write_Byte(_virtNON_PM, (phyAddr + REG_CALC_EN_DONE), u8Val);
    MsOS_DelayTaskUs(1);

    /* Check calc_done[1:1] == 1'b1 */
    while ((HAL_CPU_Read_Byte(_virtNON_PM, phyAddr + REG_CALC_EN_DONE) & BIT1) == 0)
    {
        MsOS_DelayTaskUs(1);

        if (u32Retry--)
            continue;

        return u32Clock;
    }

    /* Calculate reg_calc_cnt_report[15:0] (DEC) * 24 * 8 / 1000 = ? MHz */
    u32Clock = HAL_CPU_Read_2Byte(_virtNON_PM, (phyAddr + REG_CALC_CNT_REPORT));
    u32Clock = (u32Clock * 1000 * 16 / 83333);

    return (u32Clock * 1000000UL);
}
