/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/

/*-----------------------------------------------------------------------------
 *
 * $Author: dtvbm11 $
 * $Date: 2015/11/10 $
 * $RCSfile: drv_auto.h,v $
 * $Revision: #1 $
 *
 *---------------------------------------------------------------------------*/


#ifndef _DRV_AUTO_H_
#define _DRV_AUTO_H_

/******************************************************************************
 * Header Files
 *****************************************************************************/
#include "typedef.h"

/******************************************************************************
 * Macro, Type Definition, and Variable Declaratoin
 *****************************************************************************/
#define wDrvVGAGetHStart()	IO32ReadFldAlign(HDTV_01, HDTV_AV_START)
#define vDrvVGASetHStart(wHStart) vIO32WriteFldAlign(HDTV_01, wHStart, HDTV_AV_START)
#define vDrvVGASetPhsMix(bMethod)	vIO32WriteFldAlign(ASYNC_17, bMethod, AS_C_PSNE_SRC_SEL)	
// hw auto macro define
#define bDrvHwAutoClkRdy()	IO32ReadFldAlign(STA_SYNC0_0E, AS_AUTO_CLK_RDY)
#define dDrvAutoGetPhsMaxMinDiff()	IO32ReadFldAlign(STA_SYNC0_0E, AS_PHS_MAXMIN_DIFF_S)
#define bDrvHwAutoPhsRdy() 	IO32ReadFldAlign(STA_SYNC0_0C, AS_AUTO_PHASE_RDY)
#define bDrvAutoGetPhsGood()	IO32ReadFldAlign(STA_SYNC0_0C, AS_PHASE_GOOD)

enum
{
	BD_RED,
	BD_GREEN,		
	BD_BLUE,
	BD_MAX
};

enum
{
	RED_BD_SEL = 0x1,
	GREEN_BD_SEL = 0x2,		
	BLUE_BD_SEL = 0x4,
	ALL_BD_SEL = 0x7
};


enum
{
	Amode,
	Bmode
};

#define TOP_THRE 0x50 // orig. 0x20 ,gbsh 060901 
#define PSNE_THRE1	0x70 //orig. 0x20,gbsh 060901
#define PSNE_THRE2	0x20 //orig. 5
#define SUPPORT_MIX_PHASE_STA	1

/** 
 * @brief exprot for vga auto 
 */
extern UINT8 bDrvVGAGetPhase(void);	
extern void vDrvVGASetPhase(UINT8 bVal)  ;
extern void vDrvVGASetBDDataTh(UINT8 bTh) ;
extern void vDrvVGASetBDCha(UINT8 bCha);
extern UINT16 wDrvVGAGetLeftBound(void);
extern UINT16 wDrvVGAGetTopBound(void);
extern UINT16 wDrvVGAGetRightBound(void);
extern UINT16 wDrvVGAGetBottomBound(void);
extern UINT32 dVGAGetAllDiffValue(void);
extern UINT32 dHDTVGetAllDiffValue(void); //YPbPr Auto Phase 2006/11/07
extern void vVGAPhaseModeSet(UINT8 bVal);
extern void vDrvVGASetTopThr(UINT8 bVal);
extern void vDrvVGASetPsneThr(UINT8 bThr1, UINT8 bThr2);
extern void vVgaHwAutoPhaseEnable(UINT8 bEnable);
extern void vVgaHwAutoPhaseReset(void);
extern void vVgaHwAutoClkEnable(UINT8 bEnable);
extern void vDrvVGASetPhase_Simple(UINT8 bVal);


/* for CLI or MW*/
UINT8 u1DrvVGAGetPhase(void);
UINT16 wDrvVGAGetClock(void); //127 offset
UINT16 wDrvVGAHPositionMax(void);
UINT16 wDrvVGAHPositionMin(void);
UINT16 wDrvVGAVPositionMax(void);
UINT16 wDrvVGAVPositionMin(void);
UINT16 wDrvVGAGetHPosition(void);
UINT16 wDrvVGAGetVPosition(void);
UINT8 wDrvVgaGetClockMax(void);

//---------------------------------------

/** 
 * @brief exprot for dvi auto 
 */
extern UINT32 dDVIGetAllDiffValue(void);
extern void vDVIPhaseModeSet(UINT8 bMode);
extern void vDVISetTopThr(UINT8 bVal);
extern void vDrvDVISetBDDataTh(UINT8 bTh);
extern void vDrvDVISetBDCha(UINT8 bCha);
extern UINT16 wDrvDVIGetLeftBound(void);
extern UINT16 wDrvDVIGetRightBound(void);
extern UINT16 wDrvDVIGetTopBound(void);
extern UINT16 wDrvDVIGetBottomBound(void);
//---------------------------------------

/** 
 * @brief exprot for drv_dvi.c 
 */
extern void vDrvDVIMeasureDELen(void) ;
extern UINT16 wDrvDVIGetWidth(void) ;
extern UINT16 wDrvDVIGetHeight(void) ;
//---------------------------------------

#endif
