/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/

/**
 * @file sv_const.h
 *
 * This file defines const value
 *
 * @author Mtk00728
 */

#ifndef _SV_CONST_H_
#define _SV_CONST_H_

//lint -e621 Identifier clash

/****************************************************************************
                      General Constants
 ****************************************************************************/

#define SV_TRUE            1
#define SV_FALSE           0

#define SV_SUCCESS         1
#define SV_FAIL            0
#define SV_NO_CHANGE       2

#define SV_BOTH            2
#define SV_ON              1
#define SV_OFF             0

#define SV_LEFT     1
#define SV_RIGHT    0

#define SV_LEVEL1             1
#define SV_LEVEL2          2
#define SV_LEVEL3             3
#define SV_LEVEL4          4

/* const for Mode detect status */
enum {
    SV_WAIT,
    SV_DONE,
    SV_NOSIGNAL,
    SV_IDLE
};

/****************************************************************************
                      Constants for Video API
 ****************************************************************************/
/* Video Path (VP) */
typedef enum 
{
    SV_VP_MAIN,
    SV_VP_PIP,
    SV_VP_NA,
    #ifdef  SUPPORT_AV_COMP_AUTO
	SV_VP_MON,
    #endif
    SV_VP_MAX
} SV_VP_T;

/* Color system */
// 12/25/03 Cindy: Change the order of color system defination to match hardware define
enum {
    SV_CS_PAL_N,
    SV_CS_PAL,
    SV_CS_PAL_M,
    SV_CS_NTSC358,
    SV_CS_SECAM,
    SV_CS_PAL_60,
    SV_CS_UNSTABLE,        // Add by cindy to represent video signal is not stable yet! In Hardware, it's reserved
    SV_CS_NTSC443,
    SV_CS_AUTO,
    SV_CS_NONE,
    SV_CS_MAX
};

/* wide size of picture */
enum {
    SV_WS_NORMAL,
    SV_WS_FULL,
    SV_WS_OPT_W1,
    SV_WS_OPT_W2,
    SV_WS_OPT_W3,
    SV_WS_4W_3H,
    SV_WS_16W_9H,
    SV_WS_NO_SCALE,
    SV_WS_PANORAMIC,
    SV_WS_LB_16W_9H,
    SV_WS_LB_15W_8H,
    SV_WS_LB_14W_6H,
    SV_WS_AUTO,
    SV_WS_MAX
};


/* Video color enhancement features: FBG(Flesh Tone, Blue Sky, Green Grass) */

/* Gamma correction coefficients */
enum {
    SV_RGB_R,
    SV_RGB_G,
    SV_RGB_B,
    SV_RGB_RGB,
    SV_RGB_MAX
};

/* Video Decoders */
enum
{
    SV_VD_NA,    /* SV_VD_NA must be 0 */
    SV_VD_TVD3D,
    SV_VD_YPBPR,
    SV_VD_VGA,
    SV_VD_DVI,
    SV_VD_MPEGHD, // Add for 5371
    SV_VD_MPEGSD,
    #ifdef CC_SUPPORT_PREPROC_TIMING
    SV_VD_PREPROC,
    #endif
    SV_VD_MAX
};


/* signal type */
enum
{
    SV_ST_TV,
    SV_ST_AV,
    SV_ST_SV,
    SV_ST_YP,
    SV_ST_VGA,
    SV_ST_DVI,
    SV_ST_MPEG, // add for 5371
    #ifdef CC_SUPPORT_PREPROC_TIMING
    SV_ST_PSEUDO,
    #endif
    SV_ST_MAX
};

/* EXT Decoders */
//For Digital Port
#define SV_DV_NONE 0x00
#define SV_DV_DVI 0x01 // [0]
#define SV_DV_HDMI 0x02 // [1]
#define SV_DV_AD_YPbPr 0x04 // [2]
#define SV_DV_AD_RGB 0x08 // [3]
#define SV_DV_CCIR 0x10 // [4]
#define SV_DV_FROM_CCIR 0x20 // [5]
#define SV_DV_DTV 0x40 //[6]


/*****************************************************************************/
/* Video gamma */
enum
{
    SV_V_GAMMA_OFF,
    SV_V_GAMMA_DARK,
    SV_V_GAMMA_MIDDLE,
    SV_V_GAMMA_BRIGHT
};

enum
{
    SV_V_SCE_OFF,
    SV_V_SCE_DEFAULT
};


/* Video Signal Status -- Add by Cindy */
enum VIDE_SIGNAL_STATUS_LIST
{
    SV_VDO_NOSIGNAL        = 0,
    SV_VDO_NOSUPPORT,
    SV_VDO_UNKNOWN,        // Still doing mode detect
    SV_VDO_STABLE
};

enum {
    SV_DCLK_48HZ,
    SV_DCLK_50HZ,
    SV_DCLK_60HZ,
    SV_DCLK_OTHERS,
    SV_DCLK_UNKNOW = 0xff
};

enum
{
    SV_COLOR_RGB_SD,
    SV_COLOR_RGB_HD,
    SV_COLOR_YCBCR_SD,
    SV_COLOR_YCBCR_HD,
    SV_COLOR_YUV_NTSC,
    SV_COLOR_YUV_NTSCJ,
    SV_COLOR_YUV_PAL
};

enum
{
    SV_COLOR_RGB,
    SV_COLOR_YCBCR,
    SV_COLOR_HDMI_RGB,
    SV_COLOR_HDMI_422_601,
    SV_COLOR_HDMI_422_709,
    SV_COLOR_HDMI_444_601,
    SV_COLOR_HDMI_444_709,
    SV_COLOR_HDMI_XVYCC_601,
    SV_COLOR_HDMI_XVYCC_709
};

enum
{
    SV_COLORTRANS_RGBF_2_RGBF = 0,        // 0    RGB(Full) -> RGB (Full)
    SV_COLORTRANS_RGBL_2_RGBF,            // 1    RGB(Limit) -> RGB (Full)
    SV_COLORTRANS_RGBF_2_YCBCR601L,       // 2    RGB(Full) -> YCbCr601(Limit)
    SV_COLORTRANS_RGBL_2_YCBCR601L,       // 3    RGB(Limit) -> YCbCr601(Limit)
    SV_COLORTRANS_RGBF_2_YCBCR709L,       // 4    RGB(Full) -> YCbCr709(Limit)
    SV_COLORTRANS_RGBL_2_YCBCR709L,       // 5    RGB(Limit) -> YCbCr709(Limit)
    SV_COLORTRANS_YCBCR601L_2_YCBCR601L,  // 6    YCbCr601(Limit) -> YCbCr601(Limit)
    SV_COLORTRANS_YCBCR601F_2_YCBCR601L,  // 7    YCbCr601(Full) -> YCbCr601(Limit)
    SV_COLORTRANS_YCBCR601L_2_YCBCR709L,  // 8    YCbCr601(Limit) -> YCbCr601(Limit)
    SV_COLORTRANS_YCBCR601F_2_YCBCR709L,  // 9    YCbCr601(Full) -> YCbCr601(Limit)
    SV_COLORTRANS_YCBCR601L_2_RGBF,       // 10   YCbCr601(Limit) -> RGB(Full)
    SV_COLORTRANS_YCBCR601F_2_RGBF,       // 11   YCbCr601(Full) -> RGB(Full)
    SV_COLORTRANS_YCBCR709L_2_YCBCR601L,  // 12    YCbCr709(Limit) -> YCbCr601(Limit)
    SV_COLORTRANS_YCBCR709F_2_YCBCR601L,  // 13    YCbCr709(Full) -> YCbCr601(Limit)
    SV_COLORTRANS_YCBCR709L_2_RGBF,       // 14   YCbCr709(Limit) -> RGB(Full)    
    SV_COLORTRANS_YCBCR709F_2_RGBF,       // 15   YCbCr709(Full) -> RGB(Full)
    SV_COLORTRANS_YUVNTSC_2_YCBCR601L,    // 16   TVD NTSC YUV -> YCbCr601(Limit)
    SV_COLORTRANS_YUVNTSCJ_2_YCBCR601L,   // 17   TVD NTSC_J YUV -> YCbCr601(Limit)
    SV_COLORTRANS_YUVPAL_2_YCBCR601L,     // 18   TVD PAL YUV -> YCbCr601(Limit)
    SV_COLORTRANS_MAX
};


/* HDMI Range Mode */
enum
{
    SV_HDMI_RANGE_DEFAULT,
    SV_HDMI_RANGE_LIMIT,
    SV_HDMI_RANGE_FULL,
    SV_HDMI_RANGE_RESERVED
};


/* video Film mode */
enum VIDEO_CINEMA_LIST
{
    SV_CN_AUTO,// Means On in defensive Mode
    SV_CN_OFF, // Maans Turn Off
    SV_CN_MOVIE,//Means Turn On in Aggresive Mode
    SV_CN_MAX
};

enum EDGE_MODE_LIST
{
    SV_V_EDGE_OFF, //Not this Mode implemented
    SV_V_EDGE_LOW, //Defensive Mode
    SV_V_EDGE_HIGH //Aggressive Mode
};

enum {
    SV_MUTE_BLACK,
    SV_MUTE_BLUE,
    SV_MUTE_RED,
    SV_MUTE_WHITE,
    SV_MUTE_GREEN
};

enum DI_MODE_LIST
{
    SV_MA_SLOW,// Tend 3D
    SV_MA_MOTION// Tend 2D
};

/* Video Timing */
enum {
    SV_VIDEO_TM_480I,
    SV_VIDEO_TM_576I,
    SV_VIDEO_TM_480P,
    SV_VIDEO_TM_576P,
    SV_VIDEO_TM_720P,
    SV_VIDEO_TM_1080I,
    SV_VIDEO_TM_1080P,
    SV_VIDEO_TM_MAX
};

// SCART function switch condition
#define FS_NO_CHANGE        0
#define FS_SCALE_CHANGE     1
#define FS_ON_TO_OFF        2
#define FS_OFF_TO_ON        3
#define FS_NO_SUPPORT       0xff

// SCART Input Type
#define SV_SCART_AUTO       0x00
#define SV_SCART_CVBS_RGB   0x01
#define SV_SCART_CVBS       0x02
#define SV_SCART_RGB        0x03
#define SV_SCART_SV         0x04

///////////////////////////////////////////////////////////////////////////////////
// The following is source type/timing setting.
// Also refer to vdo_misc.c, bDrvVideoGetSourceTypeTiming() function.
enum {
    SOURCE_TYPE_TIMING_RFTV_NTSC_358,
    SOURCE_TYPE_TIMING_RFTV_NTSC_443,
    SOURCE_TYPE_TIMING_RFTV_PAL,
    SOURCE_TYPE_TIMING_RFTV_PAL_M,
    SOURCE_TYPE_TIMING_RFTV_PAL_N,
    SOURCE_TYPE_TIMING_RFTV_PAL_60,

    SOURCE_TYPE_TIMING_CVBS_NTSC_358,
    SOURCE_TYPE_TIMING_CVBS_NTSC_443,
    SOURCE_TYPE_TIMING_CVBS_PAL_M,
    SOURCE_TYPE_TIMING_SV_NTSC_358,
    SOURCE_TYPE_TIMING_SV_NTSC_443,
    SOURCE_TYPE_TIMING_SV_PAL_M,
    SOURCE_TYPE_TIMING_CVBS_NTSC_358_OS,
    SOURCE_TYPE_TIMING_CVBS_NTSC_443_OS,
    SOURCE_TYPE_TIMING_CVBS_PAL_M_OS,
    SOURCE_TYPE_TIMING_SV_NTSC_358_OS,
    SOURCE_TYPE_TIMING_SV_NTSC_443_OS,
    SOURCE_TYPE_TIMING_SV_PAL_M_OS,
    
    SOURCE_TYPE_TIMING_CVBS_PAL,
    SOURCE_TYPE_TIMING_CVBS_PAL_N,
    SOURCE_TYPE_TIMING_CVBS_PAL_60,
    SOURCE_TYPE_TIMING_SV_PAL,
    SOURCE_TYPE_TIMING_SV_PAL_N,
    SOURCE_TYPE_TIMING_SV_PAL_60,
    SOURCE_TYPE_TIMING_CVBS_PAL_OS,
    SOURCE_TYPE_TIMING_CVBS_PAL_N_OS,
    SOURCE_TYPE_TIMING_CVBS_PAL_60_OS,
    SOURCE_TYPE_TIMING_SV_PAL_OS,
    SOURCE_TYPE_TIMING_SV_PAL_N_OS,
    SOURCE_TYPE_TIMING_SV_PAL_60_OS,

    SOURCE_TYPE_TIMING_SECAM_RFTV,
    SOURCE_TYPE_TIMING_SECAM_CVBS,
    SOURCE_TYPE_TIMING_SECAM_SV,

    SOURCE_TYPE_TIMING_SCART_RGB,
    SOURCE_TYPE_TIMING_SCART_AV_NTSC_358,
    SOURCE_TYPE_TIMING_SCART_AV_NTSC_443,
    SOURCE_TYPE_TIMING_SCART_AV_PAL,
    SOURCE_TYPE_TIMING_SCART_AV_PAL_M,
    SOURCE_TYPE_TIMING_SCART_AV_PAL_N,
    SOURCE_TYPE_TIMING_SCART_AV_PAL_60,
    SOURCE_TYPE_TIMING_SCART_AV_SECAM,

    SOURCE_TYPE_TIMING_SCART_SV_NTSC_358,
    SOURCE_TYPE_TIMING_SCART_SV_NTSC_443,
    SOURCE_TYPE_TIMING_SCART_SV_PAL,
    SOURCE_TYPE_TIMING_SCART_SV_PAL_M,
    SOURCE_TYPE_TIMING_SCART_SV_PAL_N,
    SOURCE_TYPE_TIMING_SCART_SV_PAL_60,
    SOURCE_TYPE_TIMING_SCART_SV_SECAM,

    SOURCE_TYPE_TIMING_YPBPR_SD_I_50,
    SOURCE_TYPE_TIMING_YPBPR_SD_I_60,
    SOURCE_TYPE_TIMING_YPBPR_SD_I_50_OS,
    SOURCE_TYPE_TIMING_YPBPR_SD_I_60_OS,

    SOURCE_TYPE_TIMING_YPBPR_SD_P_50,
    SOURCE_TYPE_TIMING_YPBPR_SD_P_60,
    SOURCE_TYPE_TIMING_YPBPR_SD_P_50_OS,
    SOURCE_TYPE_TIMING_YPBPR_SD_P_60_OS,

    SOURCE_TYPE_TIMING_YPBPR_720P_24,
    SOURCE_TYPE_TIMING_YPBPR_720P_25,
    SOURCE_TYPE_TIMING_YPBPR_720P_50,
    SOURCE_TYPE_TIMING_YPBPR_720P_60,

    SOURCE_TYPE_TIMING_YPBPR_1080I_50,
    SOURCE_TYPE_TIMING_YPBPR_1080I_60,

    SOURCE_TYPE_TIMING_YPBPR_1080P_24,
    SOURCE_TYPE_TIMING_YPBPR_1080P_25,   
    SOURCE_TYPE_TIMING_YPBPR_1080P_50,
    SOURCE_TYPE_TIMING_YPBPR_1080P_60,

    SOURCE_TYPE_TIMING_DIGI_SD_I_50,
    SOURCE_TYPE_TIMING_DIGI_SD_I_60,
    SOURCE_TYPE_TIMING_3D_480I_60_FP,
    SOURCE_TYPE_TIMING_3D_576I_60_FP, 

    SOURCE_TYPE_TIMING_DIGI_SD_P_50,
    SOURCE_TYPE_TIMING_DIGI_SD_P_60,
    SOURCE_TYPE_TIMING_3D_576p_50_FP,
    SOURCE_TYPE_TIMING_3D_480p_60_FP,    

    SOURCE_TYPE_TIMING_DIGI_720P_24,
    SOURCE_TYPE_TIMING_DIGI_720P_25,    
    SOURCE_TYPE_TIMING_DIGI_720P_50,
    SOURCE_TYPE_TIMING_DIGI_720P_60,
    SOURCE_TYPE_TIMING_3D_720p_24_FP,
    SOURCE_TYPE_TIMING_3D_720p_30_FP,
    SOURCE_TYPE_TIMING_3D_720p_50_FP, 
    SOURCE_TYPE_TIMING_3D_720p_60_FP,

    SOURCE_TYPE_TIMING_DIGI_1080I_50,
    SOURCE_TYPE_TIMING_DIGI_1080I_60,
    SOURCE_TYPE_TIMING_3D_1080I_50_FP,
    SOURCE_TYPE_TIMING_3D_1080I_60_FP, 

    SOURCE_TYPE_TIMING_DIGI_1080P_24,
    SOURCE_TYPE_TIMING_DIGI_1080P_25,
    SOURCE_TYPE_TIMING_3D_1080p_24_FP,
    SOURCE_TYPE_TIMING_3D_1080p_30_FP,    
    SOURCE_TYPE_TIMING_3D_1080p_50_FP,    
    SOURCE_TYPE_TIMING_3D_1080p_60_FP,
    SOURCE_TYPE_TIMING_3D_1650_750_60_FP,
    SOURCE_TYPE_TIMING_3D_1650_1500_30_FP,

    SOURCE_TYPE_TIMING_3D_640_480p_60_FP,
    SOURCE_TYPE_TIMING_3D_1440_240p_60_FP,
    SOURCE_TYPE_TIMING_3D_1440_288p_50_FP,
    SOURCE_TYPE_TIMING_3D_1440_576p_50_FP,
    SOURCE_TYPE_TIMING_3D_720p_25_FP,
    SOURCE_TYPE_TIMING_3D_1080p_25_FP,
    SOURCE_TYPE_TIMING_3D_1080I_1250TOTAL_50_FP,

    SOURCE_TYPE_TIMING_3D_1080p_24_SBS_FULL,
    SOURCE_TYPE_TIMING_3D_1080p_30_SBS_FULL,
    SOURCE_TYPE_TIMING_3D_1080I_50_SBS_FULL,
    SOURCE_TYPE_TIMING_3D_1080I_60_SBS_FULL,
    SOURCE_TYPE_TIMING_3D_720p_24_SBS_FULL,
    SOURCE_TYPE_TIMING_3D_720p_30_SBS_FULL,
    SOURCE_TYPE_TIMING_3D_720p_50_SBS_FULL,
    SOURCE_TYPE_TIMING_3D_720p_60_SBS_FULL,
    SOURCE_TYPE_TIMING_3D_480p_60_SBS_FULL,
    SOURCE_TYPE_TIMING_3D_576p_50_SBS_FULL,
    SOURCE_TYPE_TIMING_3D_480I_60_SBS_FULL,
    SOURCE_TYPE_TIMING_3D_576I_50_SBS_FULL,
    SOURCE_TYPE_TIMING_3D_640_480p_60_SBS_FULL,

    SOURCE_TYPE_TIMING_3D_640_480p_60_LA,
    SOURCE_TYPE_TIMING_3D_480p_60_LA,
    SOURCE_TYPE_TIMING_3D_576p_50_LA,
    SOURCE_TYPE_TIMING_3D_720p_60_LA,
    SOURCE_TYPE_TIMING_3D_720p_50_LA,
    SOURCE_TYPE_TIMING_3D_1080p_24_LA,

    SOURCE_TYPE_TIMING_3D_480I_60_FA,
    SOURCE_TYPE_TIMING_3D_1080I_60_FA,
    SOURCE_TYPE_TIMING_3D_1080I_50_FA,

    SOURCE_TYPE_TIMING_DIGI_1080P_50,
    SOURCE_TYPE_TIMING_DIGI_1080P_60,

    SOURCE_TYPE_TIMING_DTV_SD_I_50,
    SOURCE_TYPE_TIMING_DTV_SD_I_60,

    SOURCE_TYPE_TIMING_DTV_SD_P_50,
    SOURCE_TYPE_TIMING_DTV_SD_P_60,

    SOURCE_TYPE_TIMING_DTV_720P_24,
    SOURCE_TYPE_TIMING_DTV_720P_25,    
    SOURCE_TYPE_TIMING_DTV_720P_50,
    SOURCE_TYPE_TIMING_DTV_720P_60,

    SOURCE_TYPE_TIMING_DTV_1080I_50,
    SOURCE_TYPE_TIMING_DTV_1080I_60,
    SOURCE_TYPE_TIMING_DTV_1080P_24,
    SOURCE_TYPE_TIMING_DTV_1080P_25,    
    SOURCE_TYPE_TIMING_DTV_1080P_50,
    SOURCE_TYPE_TIMING_DTV_1080P_60,

    SOURCE_TYPE_TIMING_MM_SD_I,
    SOURCE_TYPE_TIMING_MM_SD_P,
    SOURCE_TYPE_TIMING_MM_720P_SD,
    SOURCE_TYPE_TIMING_MM_720P_HD,
    SOURCE_TYPE_TIMING_MM_1080IP_SD, 
    SOURCE_TYPE_TIMING_MM_1080IP_HD, 

	SOURCE_TYPE_TIMING_NET_SD_I,
    SOURCE_TYPE_TIMING_NET_SD_P,
    SOURCE_TYPE_TIMING_NET_720P,
    SOURCE_TYPE_TIMING_NET_1080IP, 

    SOURCE_TYPE_TIMING_PC_RGB,
    SOURCE_TYPE_TIMING_PC_YCBCR,
    SOURCE_TYPE_TIMING_DIGI_2160P_30,

    SOURCE_TYPE_TIMING_MAX
};
// End of SOURCE_TYPE_TIMING setting.
///////////////////////////////////////////////////////////////////////////////////


/* new API to get/set eaten porch decoder+nr+di+scpos
    accrording to current video timing.
    20070612 sv_porch_t*/
enum
{
    SV_HPORCH_CURRENT,
    SV_HPORCH_DEFAULT,
    SV_HPORCH_MIN,
    SV_HPORCH_MAX,
    SV_VPORCH_CURRENT,
    SV_VPORCH_DEFAULT,
    SV_VPORCH_MIN,
    SV_VPORCH_MAX
} ;

#define SV_PORCHTUNE_DEC    0x1    /* only get/set decoder porch */
#define SV_PORCHTUNE_SCPOS  0x2    /* only get/set scaler porch */
#define SV_PORCHTUNE_MIX    (SV_PORCHTUNE_DEC|SV_PORCHTUNE_SCPOS)    /* only get/set mix dec/scpos porch */

typedef enum
{
    SV_COLOR_MODE_AUTO,
    SV_COLOR_MODE_444,
    SV_COLOR_MODE_422,
    SV_COLOR_MODE_MAX
}SV_VDP_COLOR_MODE_T;

enum
{
    SV_HDMI_MODE_AUTO,
    SV_HDMI_MODE_GRAPHIC,
    SV_HDMI_MODE_VIDEO,
    SV_HDMI_MODE_MAX
};

enum
{
    SV_VGA_MODE_GRAPHIC,
    SV_VGA_MODE_VIDEO,
    SV_VGA_MODE_MAX
};

enum
{
    SV_CHANGE_CHANNEL_MODE,
    SV_SCAN_MODE,
    SV_FINE_TUNE_MODE
};

enum
{
    SV_HDMI_RANGE_FORCE_AUTO = 0,
    SV_HDMI_RANGE_FORCE_LIMIT,
    SV_HDMI_RANGE_FORCE_FULL
};

enum
{
    SV_ANG_SCE_SAT,
    SV_ANG_SCE_HUE,
    SV_ANG_SCE_BRI
};

enum
{
    SV_FORCE_UNMUTE_TYPE_ON_NO_SIG,
    SV_FORCE_UNMUTE_TYPE_ON_NO_SIG2,
    SV_FORCE_UNMUTE_TYPE_ATV_CHG_CH,
    SV_FORCE_UNMUTE_TYPE_ALL
};


/* new API to force color space */
#if 0
#define FIXCOLORSPACE_ATTRMASK 0xF0
#define FIXCOLORSPACE_ONCEMASK 0x10
#define FIXCOLORSPACE_WAITMASK 0x80

#define FIXCOLORSPACE_MODEMASK 0x0f
enum
{
    SV_FIXCOLORSPACE_OFF=0,        /* no force, means auto */
    /* color mode part */
    SV_FIXCOLORSPACE_RGB_444=1,        /* always RGB */
    SV_FIXCOLORSPACE_RGB_422=2,        /* always RGB */
    SV_FIXCOLORSPACE_YCBCR=3,        /* always YPBPR */
    SV_FIXCOLORSPACE_YCBCR_TO_RGB=4,        /* always YPBPR */
    SV_FIXCOLORSPACE_RGB_TO_YCBCR=5,
    /*  color mode once part*/
    SV_FIXCOLORSPACE_RBG444_ONCE=SV_FIXCOLORSPACE_RGB_444|FIXCOLORSPACE_ONCEMASK,    /* only force RGB for this mode detect,*/
    SV_FIXCOLORSPACE_RBG422_ONCE=SV_FIXCOLORSPACE_RGB_422|FIXCOLORSPACE_ONCEMASK,    /* only force RGB for this mode detect,*/
    SV_FIXCOLORSPACE_YCBCR_ONCE=SV_FIXCOLORSPACE_YCBCR|FIXCOLORSPACE_ONCEMASK,    /* only force YPBPR for this mode detect,*/
    SV_FIXCOLORSPACE_YCBCR_TO_RGB_ONCE=SV_FIXCOLORSPACE_YCBCR_TO_RGB|FIXCOLORSPACE_ONCEMASK,    /* only force YPBPR for this mode detect,*/
    SV_FIXCOLORSPACE_RGB_TO_YCBCR_ONCE=SV_FIXCOLORSPACE_RGB_TO_YCBCR|FIXCOLORSPACE_ONCEMASK
};
#endif

typedef enum
{
    SV_FIXCOLORSPACE_OFF=0,             /* no force, means auto */
    SV_FIXCOLORSPACE_RGB_444=1,         /* RGB TO RGB */
    SV_FIXCOLORSPACE_RGB_422=2,         /* RGB to YCBCR */    
    SV_FIXCOLORSPACE_YCBCR=3,           /* YCBCR TO YCBCR */
    SV_FIXCOLORSPACE_YCBCR_TO_RGB=4,    /* YCBCR TO RGB */
    SV_FIXCOLORSPACE_RGB_TO_YCBCR=5,    /* RGB to YCBCR */    
}SV_FIXCOLORSPACE_MODE;

enum {
    SV_DDDS_FRAMETRACK_FAST1=0,
	SV_DDDS_FRAMETRACK_FAST2,
	SV_DDDS_FRAMETRACK_SLOW1,
	SV_DDDS_FRAMETRACK_SLOW2
};

enum {
        SV_DISABLE_DEC_STABLE_CHK=0,
	SV_ENABLE_DEC_STABLE_CHK,
	SV_CHECK_DEC_HV
};

#define SV_BOOT_DEBUG_MAGIC 0xAE

#endif                /* _SV_CONST_H_ */

