/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/

/*-----------------------------------------------------------------------------
  *
  * $Author: jiewen.zhou $
  * $Date  $
  * $RCSfile: hw_vfe.h,v $
  * $Revision: #2 $
  *
  *---------------------------------------------------------------------------*/
  
#ifndef _HW_DDDS_
#define _HW_DDDS_

// Mustang
#define DDDS_00 (IO_VIRT + 0xe000)
    #define DDDS_00_DISP_EN Fld(1,31,AC_MSKB3)//[31:31]
    #define DDDS_00_H_PRE_LOCK Fld(1,30,AC_MSKB3)//[30:30]
    #define DDDS_00_FIX_FS_DDDS_SEL Fld(1,29,AC_MSKB3)//[29:29]
    #define DDDS_00_DDDS_FREQ_CW Fld(29,0,AC_MSKDW)//[28:0]
#define DDDS_01 (IO_VIRT + 0xe004)
    #define DDDS_01_INIT_SEL Fld(4,28,AC_MSKB3)//[31:28]
    #define DDDS_01_HLEN_NUM Fld(12,16,AC_MSKW32)//[27:16]
    #define DDDS_01_HLEN_INT Fld(16,0,AC_FULLW10)//[15:0]
#define DDDS_02 (IO_VIRT + 0xe008)
    #define DDDS_02_SCPOS_H_SEL Fld(4,28,AC_MSKB3)//[31:28]
    #define DDDS_02_HLEN_DEN Fld(12,16,AC_MSKW32)//[27:16]
    #define DDDS_02_DDDS_KI_1 Fld(2,10,AC_MSKB1)//[11:10]
    #define DDDS_02_DDDS_KP_1 Fld(2,8,AC_MSKB1)//[9:8]
    #define DDDS_02_DDDS_KI_0 Fld(4,4,AC_MSKB0)//[7:4]
    #define DDDS_02_DDDS_KP_0 Fld(4,0,AC_MSKB0)//[3:0]
      #define DDDS_02_DDDS_KPKI Fld(12, 0, AC_MSKW10) //11:0    
#define DDDS_03 (IO_VIRT + 0xe00C)
    #define DDDS_03_MUTE_FUNC_OFF Fld(1,31,AC_MSKB3)//[31:31]
    #define DDDS_03_MUTE_DDDS_ERR_LIM Fld(9,16,AC_MSKW32)//[24:16]
    #define DDDS_03_SC_MJC_TRACK_SEL Fld(1,15,AC_MSKB1)//[15:15]
    #define DDDS_03_DDDS_FIFO_CKINV Fld(1,12,AC_MSKB1)//[12:12]
    #define DDDS_03_DATA_SYNC_AUTO Fld(1,10,AC_MSKB1)//[10:10]
    #define DDDS_03_SPREAD_INIT Fld(1,9,AC_MSKB1)//[9:9]
    #define DDDS_03_DDDS_ERR_LIM_RES Fld(1,8,AC_MSKB1)//[8:8]
    #define DDDS_03_DDDS_ERR_LIM Fld(8,0,AC_FULLB0)//[7:0]     
#define DDDS_04 (IO_VIRT + 0xe010)
    #define DDDS_04_STEP_FREQ_SEL Fld(1,29,AC_MSKB3)//[29:29]
    #define DDDS_04_OFLOW_STATUS_CLR Fld(1,28,AC_MSKB3)//[28:28]
    #define DDDS_04_GWL_LATCH Fld(1,27,AC_MSKB3)//[27:27]
    #define DDDS_04_SPREAD_CENBAL_EN Fld(1,26,AC_MSKB3)//[26:26]
    #define DDDS_04_SPREAD_CONT_EN Fld(1,25,AC_MSKB3)//[25:25]
    #define DDDS_04_SPREAD_FR_EN Fld(1,24,AC_MSKB3)//[24:24]
    #define DDDS_04_SPREAD_STEP Fld(24,0,AC_MSKDW)//[23:0]
#define DDDS_05 (IO_VIRT + 0xe014)
    #define DDDS_05_DDDS_RESETB Fld(1,30,AC_MSKB3)//[30:30]
    #define DDDS_05_SPREAD_DIR Fld(2,28,AC_MSKB3)//[29:28]
    #define DDDS_05_SPREAD_PERIOD Fld(12,16,AC_MSKW32)//[27:16]
    #define DDDS_05_FIX_STEP Fld(12,0,AC_MSKW10)//[11:0]
#define DDDS_06 (IO_VIRT + 0xe018)
    #define DDDS_06_MUTE_DISP_EN Fld(1,31,AC_MSKB3)//[31:31]
    #define DDDS_06_MUTE_H_PRE_LOCK Fld(1,30,AC_MSKB3)//[30:30]
    #define DDDS_06_MUTE_DDDS_FREQ_CW Fld(29,0,AC_MSKDW)//[28:0]
#define DDDS_07 (IO_VIRT + 0xe01C)
    #define DDDS_07_MUTE_INIT_SEL Fld(4,28,AC_MSKB3)//[31:28]
    #define DDDS_07_MUTE_HLEN_NUM Fld(12,16,AC_MSKW32)//[27:16]
    #define DDDS_07_MUTE_HLEN_INT Fld(16,0,AC_FULLW10)//[15:0]
#define DDDS_08 (IO_VIRT + 0xe020)
    #define DDDS_08_MUTE_HLEN_DEN Fld(12,16,AC_MSKW32)//[27:16]
    #define DDDS_08_MUTE_DDDS_KI_1 Fld(2,10,AC_MSKB1)//[11:10]
    #define DDDS_08_MUTE_DDDS_KP_1 Fld(2,8,AC_MSKB1)//[9:8]
    #define DDDS_08_MUTE_DDDS_KI_0 Fld(4,4,AC_MSKB0)//[7:4]
    #define DDDS_08_MUTE_DDDS_KP_0 Fld(4,0,AC_MSKB0)//[3:0]
    #define FLAG_TCON_TCH_INT_INITIAL Fld(1,17,AC_MSKB2)//[17:17]
    #define FLAG_TCON_ONOFF Fld(1,12,AC_MSKB1)//[12:12]	  
    #define FLAG_EPI_INITIAL Fld(1,11,AC_MSKB1)//[11:11]
    #define FLAG_MLVDS_INITIAL Fld(1,10,AC_MSKB1)//[10:10]
    #define FLAG_TCON_INITIAL Fld(1,9,AC_MSKB1)//[9:9]
    #define FLAG_VB1_INITIAL Fld(1,8,AC_MSKB1)//[8:8]
    #define FLAG_PANEL_TYPE Fld(3, 5, AC_MSKB0) //7:5
    #define FLAG_DDDS_INIT Fld(1,4,AC_MSKB0)//[4:4]
	#define FLAG_LVDS_ONOFF Fld(1,3,AC_MSKB0)//[3:3]	   
	#define FLAG_LVDS_INITIAL Fld(1,2,AC_MSKB0)//[2:2]	  
	#define FLAG_VOPLL_INITIAL Fld(1,1,AC_MSKB0)//[1:1]
	#define FLAG_VOPLL_POWERON Fld(1,0,AC_MSKB0)//[0:0] 	       
#define DDDS_09 (IO_VIRT + 0xe024)
	#define DDDS_09_SC_FAST_DEBUG Fld(2,30,AC_MSKB3)//[31:30]
	#define DDDS_09_SC_SLOW_DEBUG Fld(2,28,AC_MSKB3)//[29:28]
	#define DDDS_09_MJC_FAST_DEBUG Fld(2,26,AC_MSKB3)//[27:26]
	#define DDDS_09_MJC_SLOW_DEBUG Fld(2,24,AC_MSKB3)//[25:24]
    #define DDDS_09_MUTE_SPREAD_STEP Fld(24,0,AC_MSKDW)//[23:0]
#define DDDS_0A (IO_VIRT + 0xe028)
	#define DDDS_0A_SC_DEBUG_MODE Fld(1,31,AC_MSKB3)//[31:31]
    #define DDDS_0A_MJC_DEBUG_MODE Fld(1,30,AC_MSKB3)//[30:30]
    #define DDDS_0A_MUTE_SPREAD_DIR Fld(2,28,AC_MSKB3)//[29:28]
    #define DDDS_0A_MUTE_SPREAD_PERIOD Fld(12,16,AC_MSKW32)//[27:16]
    #define DDDS_0A_MUTE_FIX_STEP Fld(12,0,AC_MSKW10)//[11:0]
#define DDDS_0B (IO_VIRT + 0xe02C)
    #define DDDS_0B_FREQCW_STEP_EN Fld(1,31,AC_MSKB3)//[31:31]
    #define DDDS_0B_CW_OLD_INIT_SEL Fld(1,30,AC_MSKB3)//[30:30]
    #define DDDS_0B_FREQCW_DIFF_THR Fld(29,0,AC_MSKDW)//[28:0]
#define DDDS_0C (IO_VIRT + 0xe030)
    #define DDDS_0C_BYPASS_VSYN_EN Fld(1,31,AC_MSKB3)//[31:31]
    #define DDDS_0C_VSYNC_TRACK_EN Fld(1,30,AC_MSKB3)//[30:30]
    #define DDDS_0C_HLEN_DEN_E1 Fld(12,16,AC_MSKW32)//[27:16]
    #define DDDS_0C_HLEN_INT_E1 Fld(16,0,AC_FULLW10)//[15:0]
#define DDDS_0D (IO_VIRT + 0xe034)
    #define DDDS_0D_HLEN_INT_E2 Fld(16,16,AC_FULLW32)//[31:16]
    #define DDDS_0D_HLEN_NUM_E1 Fld(12,0,AC_MSKW10)//[11:0]
#define DDDS_0E (IO_VIRT + 0xe038)
    #define DDDS_0E_HLEN_NUM_E2 Fld(12,16,AC_MSKW32)//[27:16]
    #define DDDS_0E_HLEN_DEN_E2 Fld(12,0,AC_MSKW10)//[11:0]
#define DDDS_0F (IO_VIRT + 0xe03C)
    #define DDDS_0F_HLEN_DEN_L1 Fld(12,16,AC_MSKW32)//[27:16]
    #define DDDS_0F_HLEN_INT_L1 Fld(16,0,AC_FULLW10)//[15:0]
#define DDDS_10 (IO_VIRT + 0xe040)
    #define DDDS_10_HLEN_INT_L2 Fld(16,16,AC_FULLW32)//[31:16]
    #define DDDS_10_HLEN_NUM_L1 Fld(12,0,AC_MSKW10)//[11:0]
#define DDDS_11 (IO_VIRT + 0xe044)
    #define DDDS_11_HLEN_NUM_L2 Fld(12,16,AC_MSKW32)//[27:16]
    #define DDDS_11_HLEN_DEN_L2 Fld(12,0,AC_MSKW10)//[11:0]
#define DDDS_12 (IO_VIRT + 0xe048)
    #define DDDS_12_UPDATE_WHOLE_FUNC_EN Fld(1,31,AC_MSKB3)//[31:31]
    #define DDDS_12_UPDATE_DDDS Fld(1,30,AC_MSKB3)//[30:30]
    #define DDDS_12_FRAC_B_SEL_INV Fld(1,27,AC_MSKB3)//[27:27]
    #define DDDS_12_DDDS_CW_VLD_SEL Fld(1,26,AC_MSKB3)//[26:26]
    #define DDDS_12_DDDS_FREQ_CW_SEL Fld(1,25,AC_MSKB3)//[25:25]
    #define DDDS_12_DDDS_BWC_AUTO Fld(1,24,AC_MSKB3)//[24:24]
    #define DDDS_12_MUTE_CNT_RESET Fld(1,16,AC_MSKB2)//[16:16]
    #define DDDS_12_MUTE_CNT_LIMIT Fld(16,0,AC_FULLW10)//[15:0]
#define DDDS_16 (IO_VIRT + 0xe058)
    #define DDDS_16_DDDS_LOCK_TH Fld(2,30,AC_MSKB3)//[31:30]
    #define DDDS_16_LIMIT_PCLK_CNT_RST Fld(1,16,AC_MSKB2)//[16:16]
    #define DDDS_16_LIMIT_PCLK_CNT Fld(16,0,AC_FULLW10)//[15:0]
#define DDDS_17 (IO_VIRT + 0xe05C)
    #define DDDS_17_ADJUST_INI_TIME Fld(8,24,AC_FULLB3)//[31:24]
    #define DDDS_17_ADJUST_PCW_FRAC Fld(24,0,AC_MSKDW)//[23:0]
#define DDDS_18 (IO_VIRT + 0xe060)
    #define DDDS_18_ADJUST_NUM Fld(16,16,AC_FULLW32)//[31:16]
    #define DDDS_18_ADJUST_PERIOD Fld(16,0,AC_FULLW10)//[15:0]
#define DDDS_19 (IO_VIRT + 0xe064)
    #define DDDS_19_ADJUST_EN Fld(1,31,AC_MSKB3)//[31:31]
    #define DDDS_19_ADJUST_GET_FIRST Fld(1,6,AC_MSKB0)//[6:6]
    #define DDDS_19_V_IN_UD_EN Fld(1,5,AC_MSKB0)//[5:5]
    #define DDDS_19_V_IN_L2H_INCLUDE Fld(1,4,AC_MSKB0)//[4:4]
    #define DDDS_19_V_IN_L2H_EN Fld(1,3,AC_MSKB0)//[3:3]
    #define DDDS_19_ADJUST_ALIGN_TO_V_IN Fld(1,2,AC_MSKB0)//[2:2]
    #define DDDS_19_ADJUST_SOL Fld(1,1,AC_MSKB0)//[1:1]
    #define DDDS_19_ADJUST_INI_KEEP Fld(1,0,AC_MSKB0)//[0:0]
#define DDDS_1A (IO_VIRT + 0xe068)
    #define DDDS_1A_RG_PFD_SEL_SYNC Fld(1,29,AC_MSKB3)//[29:29]
    #define DDDS_1A_RG_FR_HS_SEL_SYNC Fld(1,28,AC_MSKB3)//[28:28]
    #define DDDS_1A_MUTE_FIX_STEP_DOWN Fld(12,16,AC_MSKW32)//[27:16]
    #define DDDS_1A_NOR_FIX_STEP_DOWN Fld(12,0,AC_MSKW10)//[11:0]
#define DDDS_1B (IO_VIRT + 0xe06C)
    #define DDDS_1B_FIX_HIGH_EN Fld(1,17,AC_MSKB2)//[17:17]
    #define DDDS_1B_FIX_LOW_EN Fld(1,16,AC_MSKB2)//[16:16]
    #define DDDS_1B_FIFO_DET_HIGH Fld(4,12,AC_MSKB1)//[15:12]
    #define DDDS_1B_FIFO_DET_LOW Fld(4,8,AC_MSKB1)//[11:8]
    #define DDDS_1B_FIX_HIGH Fld(4,4,AC_MSKB0)//[7:4]
    #define DDDS_1B_FIX_LOW Fld(4,0,AC_MSKB0)//[3:0]
#define DDDS_1C (IO_VIRT + 0xe070)
	#define DDDS_1C_R2R_HSYNC_SEL Fld(1,31,AC_MSKB3)//[31:31]
	#define DDDS_1C_DDDS2_SEL Fld(1,30,AC_MSKB3)//[30:30]
	#define DDDS_1C_DDDS1_SEL Fld(1,29,AC_MSKB3)//[29:29]
	#define DDDS_1C_NOR_DDDS_ERR_LIM_SHIFT Fld(3,16,AC_MSKB2)//[18:16]
	#define DDDS_1C_NOR_DDDS_LIM_LOW Fld(16,0,AC_FULLW10)//[15:0]
#define STA_DDDS_00 (IO_VIRT + 0xe04C)
    #define STA_DDDS_00_FIFO_OFLOW Fld(1,31,AC_MSKB3)//[31:31]
    #define STA_DDDS_00_DDDS_LOCK Fld(1,30,AC_MSKB3)//[30:30]
    #define STA_DDDS_00_DDDS_FREQ_CW Fld(29,0,AC_MSKDW)//[28:0]
#define STA_DDDS_01 (IO_VIRT + 0xe050)
    #define STA_DDDS_01_ERR_STATUS Fld(29,0,AC_MSKDW)//[28:0]
#define STA_DDDS_02 (IO_VIRT + 0xe054)
    #define STA_DDDS_02_DDDS1_FREQ_CW Fld(29,0,AC_MSKDW)//[28:0]
#define STA_DDDS_03 (IO_VIRT + 0xe074)
	#define STA_DDDS_03_SC_DDDS_FAST Fld(2,30,AC_MSKB3)//[31:30]
	#define STA_DDDS_03_SC_DDDS_SLOW Fld(2,28,AC_MSKB3)//[29:28]
	#define STA_DDDS_03_SC_DDDS_FAST_SEL Fld(2,26,AC_MSKB3)//[27:26]
	#define STA_DDDS_03_SC_DDDS_SLOW_SEL Fld(2,24,AC_MSKB3)//[25:24]
	#define STA_DDDS_03_SC_DDDS_FAST_SYNC Fld(2,22,AC_MSKB2)//[23:22]
	#define STA_DDDS_03_SC_DDDS_SLOW_SYNC Fld(2,20,AC_MSKB2)//[21:20]
	#define STA_DDDS_03_MJC_DDDS_FAST Fld(2,18,AC_MSKB2)//[19:18]
	#define STA_DDDS_03_MJC_DDDS_SLOW Fld(2,16,AC_MSKB2)//[17:16]
	#define STA_DDDS_03_MJC_DDDS_FAST_SEL Fld(2,14,AC_MSKB1)//[15:14]
	#define STA_DDDS_03_MJC_DDDS_SLOW_SEL Fld(2,12,AC_MSKB1)//[13:12]
	#define STA_DDDS_03_MJC_DDDS_FAST_SYNC Fld(2,10,AC_MSKB1)//[11:10]
	#define STA_DDDS_03_MJC_DDDS_SLOW_SYNC Fld(2,8,AC_MSKB1)//[9:8]
#define DDDS_1E (IO_VIRT + 0xe078)
	#define DDDS_1E_DDDS_NEW_ERR_LIMIT_SEL Fld(1,25,AC_MSKB3)//[25:25]
	#define DDDS_1E_DDDS_NEW_ERR_LIMIT_DISP_TRACK Fld(9,16,AC_MSKW32)//[24:16]
	#define DDDS_1E_DDDS_NEW_ERR_LIMIT_LOW_PART Fld(16,0,AC_FULLW10)//[15:0]
#endif
