/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
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 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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 *****************************************************************************/

/*-----------------------------------------------------------------------------
 *
 * $Author: brianpc.huang $
 * $Date  $
 * $RCSfile: hw_scart.h,v $
 * $Revision: #1 $
 *
 *---------------------------------------------------------------------------*/

#ifndef _HW_SCART_H_
#define _HW_SCART_H_

#include "x_hal_5381.h"

#ifndef CC_UP8032_ATV
#define IO_SCART_BASE (IO_VIRT + 0x22000)
#else
#define IO_SCART_BASE (IO_VIRT + 0x24000)
#endif

#define SCART_00 (IO_SCART_BASE+0x0620)
    #define FLD_HOLD_SCART_STATUS Fld(1, 31, AC_MSKB3) //31
    #define FLD_FB_TST Fld(1, 30, AC_MSKB3) //30
    #define FLD_FB_DBG Fld(1, 29, AC_MSKB3) //29
    #define FLD_RGB_DBG Fld(1, 28, AC_MSKB3) //28
    #define FLD_RGB_8BIT Fld(1, 24, AC_MSKB3) //24
    #define FLD_H_DELAY Fld(2, 22, AC_MSKB2) //23:22
    #define FLD_SCART_DOWNSAMPLE Fld(1, 21, AC_MSKB2) //21
    #define FLD_RGBOFFSET Fld(5, 16, AC_MSKB2) //20:16
    #define FLD_YOFFSET Fld(6, 10, AC_MSKB1) //15:10
    #define FLD_MIX_ORDER Fld(1, 9, AC_MSKB1) //9
    #define FLD_MIX_MODE Fld(1, 8, AC_MSKB1) //8
    #define FLD_MON_V_POL Fld(1, 7, AC_MSKB0) //7
    #define FLD_MON_H_POL Fld(1, 6, AC_MSKB0) //6
    #define FLD_HDTV_V_POL Fld(1, 5, AC_MSKB0) //5
    #define FLD_HDTV_H_POL Fld(1, 4, AC_MSKB0) //4
    #define FLD_TVD_V_POL Fld(1, 3, AC_MSKB0) //3
    #define FLD_TVD_H_POL Fld(1, 2, AC_MSKB0) //2
    #define FLD_FIFO_MODE Fld(1, 1, AC_MSKB0) //1
    #define FLD_OUTPUT_EN Fld(1, 0, AC_MSKB0) //0
#define SCART_01 (IO_SCART_BASE+0x0624)
    #define FLD_FIFO_DEPTH Fld(7, 24, AC_MSKB3) //30:24
    #define FLD_FB_DELAY Fld(5, 16, AC_MSKB2) //20:16
    #define FLD_FB_HIGH_TH Fld(3, 12, AC_MSKB1) //14:12
    #define FLD_FB_LOW_TH Fld(3, 8, AC_MSKB1) //10:8
    #define FLD_FB_DEGLITCH Fld(2, 4, AC_MSKB0) //5:4
    #define FLD_FB_CLAMP_EN Fld(1, 3, AC_MSKB0) //3
    #define FLD_FB_POL Fld(1, 2, AC_MSKB0) //2
    #define FLD_FB_FORCE_OFF Fld(1, 1, AC_MSKB0) //1
    #define FLD_FB_FORCE_ON Fld(1, 0, AC_MSKB0) //0
#define SCART_02 (IO_SCART_BASE+0x0628)
    #define FLD_UPDATE_SEL Fld(2, 29, AC_MSKB3) //30:29
    #define FLD_TV_MUTE Fld(1, 28, AC_MSKB3) //28
    #define FLD_MUTE_Y Fld(4, 24, AC_MSKB3) //27:24
    #define FLD_MUTE_CB Fld(4, 20, AC_MSKB2) //23:20
    #define FLD_MUTE_CR Fld(4, 16, AC_MSKB2) //19:16
    #define FLD_RGB_IMUX Fld(3, 4, AC_MSKB0) //6:4
    #define FLD_SCART_CVBS_H_SEL Fld(1, 2, AC_MSKB0) //2
    #define FLD_ERR_DIFF Fld(1, 1, AC_MSKB0) //1
    #define FLD_RGB2YCBCR Fld(1, 0, AC_MSKB0) //0
#define SCART_STA_00 (IO_SCART_BASE+0x0070)
#define SCART_STA_00_0 (IO_SCART_BASE+0x0070)
#define SCART_STA_00_1 (IO_SCART_BASE+0x0071)
#define SCART_STA_00_2 (IO_SCART_BASE+0x0072)
#define SCART_STA_00_3 (IO_SCART_BASE+0x0073)
    #define FLD_FB_ON_FLAG Fld(4,28,AC_MSKB3)//[31:28]
    #define FLD_FB_OFF_FLAG Fld(4,24,AC_MSKB3)//[27:24]
    #define FLD_FB_ON_CNT Fld(12,12,AC_MSKW21)//[23:12]
    #define FLD_FB_OFF_CNT Fld(12,0,AC_MSKW10)//[11:0]
#endif

