/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/


#ifndef CONFIG_DEFAULT_H
#define CONFIG_DEFAULT_H

#include "x_pinmux.h"

//----------------------------------------------------------------------------
// Initial dram settings
//----------------------------------------------------------------------------
#define DEFAULT_DRAM_TYPE                   DDR_III_x5
#define DEFAULT_DDR_CLOCK                   (1800000000)
//for MTK turnkey PCB only (in bootp.c)
#define DEFAULT_DRAM_PCB_CHK                (1)

//#ifndef DRAM_PRIORITY_LIST
// Audio/0 > B2R/5 > NR/PSCAN/4 > Scpip/7 > OSD/3 > Mjc_in/13 > Mjc_out/14 > VLD1/9 > Vdec_mc/8 > CPU/6 > Gfx/11 > Demux/PVR/1 > VBI/3D/TVE/2 >VENC/12 > Test/15 > Unused/10
//#define DRAM_PRIORITY_LIST                  ((UINT8*)"0c9421a387fbd56e")
//#endif

//----------------------------------------------------------------------------
// FBM setup
//----------------------------------------------------------------------------
#ifdef ANDROID
    #ifdef CC_FORCE_DRAM768M
        #ifdef CC_SUPPORT_MULTI_DRAM_COMBINATION
            #define TOTAL_MEM_SIZE                      (512 * 1024 * 1024) /* size of Channel A bank */
            #define DEFAULT_CHANNEL_A_SIZE              (512 * 1024 * 1024)
            #define DEFAULT_CHANNEL_B_SIZE              (256 * 1024 * 1024)
        #else /* CC_SUPPORT_MULTI_DRAM_COMBINATION */
            #define TOTAL_MEM_SIZE                      (768 * 1024 * 1024) /* size of Channel A bank */
        #endif /* CC_SUPPORT_MULTI_DRAM_COMBINATION */
    #elif defined (CC_FORCE_DRAM1G)
        #ifdef CC_SUPPORT_MULTI_DRAM_COMBINATION
            #define TOTAL_MEM_SIZE                      (512 * 1024 * 1024) /* size of Channel A bank */
            #define DEFAULT_CHANNEL_A_SIZE              (512 * 1024 * 1024)
            #define DEFAULT_CHANNEL_B_SIZE              (512 * 1024 * 1024)
        #else /* CC_SUPPORT_MULTI_DRAM_COMBINATION */
            #define TOTAL_MEM_SIZE                      (1024 * 1024 * 1024) /* size of Channel A bank */
        #endif /* CC_SUPPORT_MULTI_DRAM_COMBINATION */
	
    #elif defined (CC_FORCE_DRAM1_25G)
            #define TOTAL_MEM_SIZE                      (512 * 1024 * 1024) /* size of Channel A bank */
            #define DEFAULT_CHANNEL_A_SIZE              (512 * 1024 * 1024)
            #define DEFAULT_CHANNEL_B_SIZE              (512 * 1024 * 1024) 
			#define DEFAULT_CHANNEL_C_SIZE              (256 * 1024 * 1024) 

    #else /* use all memory from 2 banks, 1GB + 1GB */
        #define TOTAL_MEM_SIZE                          (1024 * 1024 * 1024) /* size of Channel A bank */
        #define DEFAULT_CHANNEL_A_SIZE                  (1024 * 1024 * 1024)
        #define DEFAULT_CHANNEL_B_SIZE                  (1024 * 1024 * 1024)
    #endif

	
#else
    #ifdef CC_LITE
        #define TOTAL_MEM_SIZE                      (256 * 1024 * 1024)
    #elif defined (CC_FORCE_DRAM1_25G)
        #define TOTAL_MEM_SIZE                      (512 * 1024 * 1024) 	/* size of Channel A bank */
        #define DEFAULT_CHANNEL_A_SIZE              (512 * 1024 * 1024)
        #define DEFAULT_CHANNEL_B_SIZE              (512 * 1024 * 1024) 
	    #define DEFAULT_CHANNEL_C_SIZE              (256 * 1024 * 1024) 
    #else
        #define TOTAL_MEM_SIZE                      (1024 * 1024 * 1024)
    #endif

	
#endif

#ifdef CC_FORCE_DRAM1_25G
    #define TOTAL_CHB_MEM_SIZE                 	(512 * 1024 * 1024)
#else   
    #define TOTAL_CHB_MEM_SIZE                  (1024 * 1024 * 1024)
#endif

#if 1
#define CC_CONFIG_OSD_CM_SIZE               (4) // 4:argb 8888 ;2:argb 4444
#define CC_CONFIG_OSD_BUF_MODE              (2) // 2:double  buffer ;1:sngle buffer

#ifndef CC_CONFIG_OSD_PLANE1_MAX_W
#define CC_CONFIG_OSD_PLANE1_MAX_W          (0)
#endif
#ifndef CC_CONFIG_OSD_PLANE1_MAX_H
#define CC_CONFIG_OSD_PLANE1_MAX_H          (0)
#endif
#define CC_CONFIG_OSD_PLANE1_MEM_SIZE       (((CC_CONFIG_OSD_PLANE1_MAX_W*     \
                                        CC_CONFIG_OSD_PLANE1_MAX_H*        \
                                        CC_CONFIG_OSD_CM_SIZE*             \
                                        CC_CONFIG_OSD_BUF_MODE)+0x1000)&(0xFFFFF000))

        // osd 3d buffer size
#if (defined(CC_CONFIG_OSD_SBS_PLANE1)||defined(CC_CONFIG_OSD_TB_PLANE1))
#define CC_CONFIG_OSD_3D_PLANE1_MEM_SIZE    (CC_CONFIG_OSD_PLANE1_MEM_SIZE)
#else
#define CC_CONFIG_OSD_3D_PLANE1_MEM_SIZE    (0)
#endif

        // osd decompress  buffer size
#ifdef CONFIG_OSD_PLANE1_COMPRESSION
#define CC_CONFIG_OSD_DEC_PLANE1_MEM_SIZE   (CC_CONFIG_OSD_PLANE1_MEM_SIZE)
#else
#define CC_CONFIG_OSD_DEC_PLANE1_MEM_SIZE   (0)
#endif

#ifndef CC_CONFIG_OSD_PLANE2_MAX_W
#define CC_CONFIG_OSD_PLANE2_MAX_W          (960)
#endif
#ifndef CC_CONFIG_OSD_PLANE2_MAX_H
#define CC_CONFIG_OSD_PLANE2_MAX_H          (540)
#endif
#define CC_CONFIG_OSD_PLANE2_MEM_SIZE       (((CC_CONFIG_OSD_PLANE2_MAX_W*     \
                                            CC_CONFIG_OSD_PLANE2_MAX_H*        \
                                            CC_CONFIG_OSD_CM_SIZE*             \
                                            CC_CONFIG_OSD_BUF_MODE)+0x1000)&(0xFFFFF000))

#if (defined(CC_CONFIG_OSD_SBS_PLANE2)||defined(CC_CONFIG_OSD_TB_PLANE2))
#define CC_CONFIG_OSD_3D_PLANE2_MEM_SIZE    (CC_CONFIG_OSD_PLANE2_MEM_SIZE)
#else
#define CC_CONFIG_OSD_3D_PLANE2_MEM_SIZE    (0)
#endif

#ifndef CONFIG_OSD_PLANE2_COMPRESSION
        //#define  CONFIG_OSD_PLANE2_COMPRESSION
#endif

        // osd decompress  buffer size
#ifdef CONFIG_OSD_PLANE2_COMPRESSION
#define CC_CONFIG_OSD_DEC_PLANE2_MEM_SIZE   (CC_CONFIG_OSD_PLANE2_MEM_SIZE)
#else
#define CC_CONFIG_OSD_DEC_PLANE2_MEM_SIZE   (0)
#endif

#ifndef CC_CONFIG_OSD_PLANE3_MAX_W
#define CC_CONFIG_OSD_PLANE3_MAX_W          (1920)
#endif
#ifndef CC_CONFIG_OSD_PLANE3_MAX_H
#define CC_CONFIG_OSD_PLANE3_MAX_H          (1080)
#endif
#define CC_CONFIG_OSD_PLANE3_MEM_SIZE       (((CC_CONFIG_OSD_PLANE3_MAX_W*     \
                                            CC_CONFIG_OSD_PLANE3_MAX_H*        \
                                            CC_CONFIG_OSD_CM_SIZE*             \
                                            CC_CONFIG_OSD_BUF_MODE)+0x1000)&(0xFFFFF000))

#if (defined(CC_CONFIG_OSD_SBS_PLANE3)||defined(CC_CONFIG_OSD_TB_PLANE3))
#define CC_CONFIG_OSD_3D_PLANE3_MEM_SIZE    (CC_CONFIG_OSD_PLANE3_MEM_SIZE)
#else
#define CC_CONFIG_OSD_3D_PLANE3_MEM_SIZE    (0)
#endif

        // osd decompress  buffer size
#ifndef CONFIG_OSD_PLANE3_COMPRESSION
        // #define  CONFIG_OSD_PLANE3_COMPRESSION
#endif

#ifdef CONFIG_OSD_PLANE3_COMPRESSION
#define CC_CONFIG_OSD_DEC_PLANE3_MEM_SIZE   (CC_CONFIG_OSD_PLANE3_MEM_SIZE)
#else
#define CC_CONFIG_OSD_DEC_PLANE3_MEM_SIZE   (0)
#endif

#ifndef CC_CONFIG_OSD_PLANE4_MAX_W
#define CC_CONFIG_OSD_PLANE4_MAX_W          (0)
#endif
#ifndef CC_CONFIG_OSD_PLANE4_MAX_H
#define CC_CONFIG_OSD_PLANE4_MAX_H          (0)
#endif
#define CC_CONFIG_OSD_PLANE4_MEM_SIZE       (((CC_CONFIG_OSD_PLANE4_MAX_W*     \
                                            CC_CONFIG_OSD_PLANE4_MAX_H*        \
                                            CC_CONFIG_OSD_CM_SIZE*             \
                                            CC_CONFIG_OSD_BUF_MODE)+0x1000)&(0xFFFFF000))

#if (defined(CC_CONFIG_OSD_SBS_PLANE4)||defined(CC_CONFIG_OSD_TB_PLANE4))
#define CC_CONFIG_OSD_3D_PLANE4_MEM_SIZE    (CC_CONFIG_OSD_PLANE4_MEM_SIZE)
#else
#define CC_CONFIG_OSD_3D_PLANE4_MEM_SIZE    (0)
#endif

        // osd decompress  buffer size
#ifdef CONFIG_OSD_PLANE4_COMPRESSION
#define CC_CONFIG_OSD_DEC_PLANE4_MEM_SIZE   (CC_CONFIG_OSD_PLANE4_MEM_SIZE)
#else
#define CC_CONFIG_OSD_DEC_PLANE4_MEM_SIZE   (0)
#endif

#ifndef CC_CONFIG_OSD_PLANE5_MAX_W
#define CC_CONFIG_OSD_PLANE5_MAX_W          (100)
#endif
#ifndef CC_CONFIG_OSD_PLANE5_MAX_H
#define CC_CONFIG_OSD_PLANE5_MAX_H          (100)
#endif

#define CC_CONFIG_OSD_PLANE5_MEM_SIZE       (((CC_CONFIG_OSD_PLANE5_MAX_W*     \
                                    CC_CONFIG_OSD_PLANE5_MAX_H*        \
                                    CC_CONFIG_OSD_CM_SIZE)+0x1000)&(0xFFFFF000))

        // osd 3d buffer size
#if (defined(CC_CONFIG_OSD_SBS_PLANE5)||defined(CC_CONFIG_OSD_TB_PLANE5))
#define CC_CONFIG_OSD_3D_PLANE5_MEM_SIZE    (CC_CONFIG_OSD_PLANE5_MEM_SIZE)
#else
#define CC_CONFIG_OSD_3D_PLANE5_MEM_SIZE    (0)
#endif

        // osd decompress  buffer size
#ifdef CONFIG_OSD_PLANE5_COMPRESSION
#define CC_CONFIG_OSD_DEC_PLANE5_MEM_SIZE   (CC_CONFIG_OSD_PLANE5_MEM_SIZE)
#else
#define CC_CONFIG_OSD_DEC_PLANE5_MEM_SIZE   (0)
#endif

#define CC_CONFIG_OSD_PLANE_BASIC_MEM_SIZE  (CC_CONFIG_OSD_PLANE1_MEM_SIZE+ \
                                        CC_CONFIG_OSD_PLANE2_MEM_SIZE+  \
                                        CC_CONFIG_OSD_PLANE3_MEM_SIZE+  \
                                        CC_CONFIG_OSD_PLANE4_MEM_SIZE+  \
                                        CC_CONFIG_OSD_PLANE5_MEM_SIZE)

#define CC_CONFIG_OSD_3D_PLANE_MEM_SIZE     (CC_CONFIG_OSD_3D_PLANE1_MEM_SIZE+  \
                                            CC_CONFIG_OSD_3D_PLANE2_MEM_SIZE+   \
                                            CC_CONFIG_OSD_3D_PLANE3_MEM_SIZE+   \
                                            CC_CONFIG_OSD_3D_PLANE4_MEM_SIZE+   \
                                            CC_CONFIG_OSD_3D_PLANE5_MEM_SIZE)

#define CC_CONFIG_OSD_DEC_PLANE_MEM_SIZE    (CC_CONFIG_OSD_DEC_PLANE1_MEM_SIZE+ \
                                            CC_CONFIG_OSD_DEC_PLANE2_MEM_SIZE+  \
                                            CC_CONFIG_OSD_DEC_PLANE3_MEM_SIZE+  \
                                            CC_CONFIG_OSD_DEC_PLANE4_MEM_SIZE+  \
                                            CC_CONFIG_OSD_DEC_PLANE5_MEM_SIZE)

#define CC_CONFIG_GFX_TEMP_MEM_SIZE         (CC_CONFIG_OSD_PLANE3_MAX_W*    \
                                            CC_CONFIG_OSD_PLANE3_MAX_H*     \
                                            CC_CONFIG_OSD_CM_SIZE)


#define LINUX_GPU_BUFFER_SIZE            (0)

#define DFB_SUM_MEM_SIZE                    (CC_CONFIG_OSD_PLANE_BASIC_MEM_SIZE+\
                                            CC_CONFIG_OSD_3D_PLANE_MEM_SIZE+    \
                                            CC_CONFIG_OSD_DEC_PLANE_MEM_SIZE+   \
											CC_CONFIG_GFX_TEMP_MEM_SIZE+		\
											LINUX_GPU_BUFFER_SIZE)
#endif

#ifdef ANDROID
    #ifdef CC_GFX_MMU
        #define DIRECT_FB_MEM_SIZE                  ((DFB_SUM_MEM_SIZE+4*1024)&(0xFFFFF000))
    #else
        #define DIRECT_FB_MEM_SIZE                  (96 * 1024 * 1024)
    #endif

    #ifdef OSD_RESOLUTION_1080p
		#ifdef CC_SUPPORT_4K2K_UI
		#define FB_MEM_SIZE                         (96 * 1024 * 1024)
		#else
        #define FB_MEM_SIZE                         (40 * 1024 * 1024)
		#endif
    #else
        #define FB_MEM_SIZE                         (24 * 1024 * 1024)
    #endif
#else
    #ifdef CC_GFX_MMU
        #define DIRECT_FB_MEM_SIZE                  ((DFB_SUM_MEM_SIZE+4*1024)&(0xFFFFF000))
    #else
        #define DIRECT_FB_MEM_SIZE                  (76 * 1024 * 1024)
    #endif

    #define FB_MEM_SIZE                         (0)

#endif

#ifndef FBM_MEM_CFG_SIZE
#ifdef  CC_FBM_CONFIG_WITH_3DTV_4K_SUPPORT
#define FBM_MEM_CFG_SIZE                        	(FBM_MEM_CFG_MT5891_3DTV_4K)
#else
#define FBM_MEM_CFG_SIZE                            (FBM_MEM_CFG_MT5891_3DTV)
#endif 
#endif /* FBM_MEM_CFG_SIZE */

#ifndef FBM_MEM_CHB_CFG_SIZE
#ifdef  CC_FBM_CONFIG_WITH_3DTV_4K_SUPPORT
#define FBM_MEM_CHB_CFG_SIZE                        (FBM_MEM_CFG_MT5891_3DTV_4K_CHB)
#else
#define FBM_MEM_CHB_CFG_SIZE                        (FBM_MEM_CFG_MT5891_3DTV_CHB)
#endif 
#endif /* FBM_MEM_CHB_CFG_SIZE */

#ifndef FBM_MEM_CHC_CFG_SIZE
#ifdef  CC_FBM_CONFIG_WITH_3DTV_4K_SUPPORT
#define FBM_MEM_CHC_CFG_SIZE                        (FBM_MEM_CFG_MT5891_3DTV_4K_CHC)
#else
#define FBM_MEM_CHC_CFG_SIZE                        (FBM_MEM_CFG_MT5891_3DTV_CHC)
#endif 
#endif /* FBM_MEM_CHC_CFG_SIZE */

#ifdef CC_TRUSTZONE_SUPPORT
#define TRUSTZONE_CODE_BASE                 (0x5000)
#if defined(CC_SVP_SUPPORT) && defined(CC_SUPPORT_4K2K)
        #define TRUSTZONE_MEM_SIZE                  ((8 * 1024 * 1024) + (40*1024*1024))
#else 
    #ifdef ANDROID
        #define TRUSTZONE_MEM_SIZE                  (18 * 1024 * 1024)
    #else
        #define TRUSTZONE_MEM_SIZE                  (18 * 1024 * 1024)
    #endif
#endif
#elif defined(CC_TRUSTZONE_64_SUPPORT)
    #define TRUSTZONE_CODE_BASE                 (0xFE0000)
    #define TRUSTZONE_MEM_SIZE                  (16 * 1024 * 1024)
#else
    #define TRUSTZONE_MEM_SIZE                  (0)
#endif

#if defined(CC_TRUSTZONE_IN_CHB)
#define TRUSTZONE_MEM_SIZE_CHA (0)
#else
#define TRUSTZONE_MEM_SIZE_CHA TRUSTZONE_MEM_SIZE
#endif

#ifdef CC_SUPPORT_MULTI_DRAM_COMBINATION
    #define DEFAULT_LINUX_KERNEL_MEM_SIZE       ((TOTAL_MEM_SIZE > (FBM_MEM_CFG_SIZE + DIRECT_FB_MEM_SIZE + FB_MEM_SIZE + TRUSTZONE_MEM_SIZE_CHA)) ?\
                                                (TOTAL_MEM_SIZE - FBM_MEM_CFG_SIZE - DIRECT_FB_MEM_SIZE - FB_MEM_SIZE - TRUSTZONE_MEM_SIZE_CHA) : (54 * 1024 * 1024))
#else
    #ifndef CONFIG_TV_DRV_VFY
        #define LINUX_KERNEL_MEM_SIZE           ((TOTAL_MEM_SIZE > (FBM_MEM_CFG_SIZE + DIRECT_FB_MEM_SIZE + FB_MEM_SIZE + TRUSTZONE_MEM_SIZE_CHA)) ?\
                                                (TOTAL_MEM_SIZE - FBM_MEM_CFG_SIZE - DIRECT_FB_MEM_SIZE - FB_MEM_SIZE - TRUSTZONE_MEM_SIZE_CHA) : (54 * 1024 * 1024))
    #else
        #define LINUX_MM_VFY_RESERVE_SIZE       (512*1024*1024)
        #define LINUX_KERNEL_MEM_SIZE           (TOTAL_MEM_SIZE - LINUX_MM_VFY_RESERVE_SIZE)
    #endif
#endif

#define DEFAULT_TARGET_COUNTRY              (COUNTRY_US)

//----------------------------------------------------------------------------
// Default Panel setting
//----------------------------------------------------------------------------
#ifndef DEFAULT_PANEL_SELECT
#define DEFAULT_PANEL_SELECT                (PANEL_DEFAULT)
#endif
#define BACKLIGHT_GPIO                      (OPCTRL(4))
#define BACKLIGHT_ON_VAL                    (0)
#define PANELPOWER_GPIO                     (OPCTRL(9))
#define PANELPOWER_ON_VAL                   (1)

// disable spread spectrum for vga output
#define SPREAD_SPECTRUM_PERMILLAGE          (0)

// pwm backlight adjustment setting
#define PANEL_BACKLIGHT_PWM_PORT            (1)

//3D Enable & LR GPIO
//#define EXT_3D_ENABLE_PORT                  (GPIO(52))
//#define EXT_3D_LR_PIN                       (PIN_GPIO53)
//#define EXT_3D_LR_PIN_FUNC                    (1)

// VB1 lockn & htpdn [Wukong BI]
#define PANEL_VB1_LOCKN_PIN          (PIN_GPIO50)
#define PANEL_VB1_LOCKN_PIN_FUNC     (2)
#define PANEL_VB1_HTPDN_PIN          (PIN_GPIO49)
#define PANEL_VB1_HTPDN_PIN_FUNC     (2)
#define PANEL_VB1_OSD_LOCKN_PIN      (PIN_GPIO54)
#define PANEL_VB1_OSD_LOCKN_PIN_FUNC (2)
#define PANEL_VB1_OSD_HTPDN_PIN      (PIN_GPIO53)
#define PANEL_VB1_OSD_HTPDN_PIN_FUNC (5)

#define PDWNC_POLARITY                      (0)
//----------------------------------------------------------------------------
// Suspend power control GPIO Number, it must be PDWNC GPIO
//----------------------------------------------------------------------------
#define  SUSPEND_GPIO_NUMBER   	(203) //DDR power control.
#define  SUSPEND_GPIO_POL   	(0) //0:active low,1:active high.

//----------------------------------------------------------------------------
// Loader logo
//----------------------------------------------------------------------------
#ifdef CC_LOADER_LOGO_SUPPORT
#define LOADER_LOGO_NUMBER                  (1)
#define LOADER_LOGO_H_FILE                  "mtk/MediaTek_600x100x5.h"
#endif

//----------------------------------------------------------------------------
// Audio Customization
//----------------------------------------------------------------------------
#define AUDIO_INCLUDE_FILE                  "mtk/Mustang_aud.h"
#define AUDIO_Mute_Gpio_Num                 (OPCTRL(11))
#define AUDIO_Amp_Gpio_Num                  (OPCTRL(5))
#define AUDIO_HP_PLUG_IN_GPIO               (OPCTRL(6))
#define AUDIO_MUTE_GPIO_POLARITY            AUD_MUTE_GPIO_LOW_ENALBE
#define AUDIO_AMP_GPIO_POLARITY             AUD_AMP_GPIO_LOW_ENALBE
#define AUDIO_HP_PLUG_IN_POLARITY           (AUD_GPIO_LOW_ENALBE)
#define AUDIO_INPUT_MUX_SEL_TABLE           (&_rMustangAudInputMuxTable)
#define AUDIO_APROC_ENABLE                  (TRUE)

//----------------------------------------------------------------------------
// Other GPIO customization
#define DEFAULT_TUNER_RFAGC_SWITCH_GPIO     (88)//d120203_Haibo:OPWM2 is for RFAGC switch
//----------------------------------------------------------------------------
#define FLAG_EXT_STATUS                     (0)

#define DEFAULT_DEMOD_RESET_GPIO            (GPIO(65))
//----------------------------------------------------------------------------
// EEPROM customization
//----------------------------------------------------------------------------
#if (defined(REPLACE_EEPROM_WITH_EMMC)||defined(REPLACE_EEPROM_WITH_FLASH))
#define SYSTEM_EEPROM_SIZE              (307200)
#else
#define SYSTEM_EEPROM_SIZE                  (4096)
#endif
#define SYSTEM_EEPROM_WP_GPIO               (OPCTRL(7)) // OPCTRL9.
#define SYSTEM_EEPROM_WP_ENABLE_POLARITY    (1)
//#define EDID_EEPROM_WP_GPIO               (GPIO(4))   // GPIO14.
//#define EDID_EEPROM_WP_ENABLE_POLARITY    (1)
#ifdef CC_HOTKEY_WAKEUP_SUPPORT
#define SUPPORT_HOTKEY_WAKEUP                (1)
#endif



//----------------------------------------------------------------------------
// USB Customization
//----------------------------------------------------------------------------
// "USBx_PORT_USING_LOADER & USBx_PORT_USING" related define is only for USB2.0 port
// 1. Loader, USB port using define (1)=used (0)=not used
#define USB0_PORT_USING_LOADER              (1)
#define USB1_PORT_USING_LOADER              (1)
#define USB2_PORT_USING_LOADER              (0)
#define USB3_PORT_USING_LOADER              (1)

// 2. Nuclues/Linux/Android System USB port using define (1)=used (0)=not used
#define USB0_PORT_USING                     (1)
#define USB1_PORT_USING                     (1)
#define USB2_PORT_USING                     (0)
#define USB3_PORT_USING                     (1)

// 3. USB +5V power switch Vbus GPIO control, if vbus not control by GPIO, mark off it.
#define USB0_VBUS_GPIO                      GPIO(42)    // GPIO42.
#define USB0_VBUS_GPIO_POLARITY		        (1)
#define USB1_VBUS_GPIO                      GPIO(43)    // GPIO43
#define USB1_VBUS_GPIO_POLARITY		        (1)
#define USB2_VBUS_GPIO                      GPIO(48)    // GPIO48
#define USB2_VBUS_GPIO_POLARITY		        (1)
#define USB3_VBUS_GPIO                      OPCTRL(10)  // OPCTRL10.
#define USB3_VBUS_GPIO_POLARITY		        (1)

// 4. USB power switch overcurrent GPIO control, if have not ic to control by GPIO, mark off it.
#define USB0_OC_GPIO                        ADIN(4)     // ADIN 4.
#define USB0_OC_GPIO_POLARITY		        (0)
#define USB1_OC_GPIO                        ADIN(4)     // ADIN 4.
#define USB1_OC_GPIO_POLARITY		        (0)
#define USB2_OC_GPIO                        ADIN(5)     // ADIN 5.
#define USB2_OC_GPIO_POLARITY		        (0)
#define USB3_OC_GPIO                        ADIN(5)     // ADIN 5.
#define USB3_OC_GPIO_POLARITY		        (0)

// 5. Detect USB upgrade time, default is 0, but some device maybe can't detect when upgrade.
// If possible, set it to (300)ms when in customer's module.
#define USB_LOADER_WAIT_TIME                (1000)

//#define USB_DISABLE_SUSPEND_MODE /* Disable USB suspend, share 240 Mhz with H.264.*/

//----------------------------------------------------------------------------
// sdcard gpio define
//----------------------------------------------------------------------------
#define MSDC_DETECT_GPIO  GPIO(76)
#define MSDC_VOLTAGE_GPIO GPIO(176)
//----------------------------------------------------------------------------
// Button Customization
//----------------------------------------------------------------------------
#define FLAG_BUTTON_SUPPORT                 (0)

#ifndef T8032UP_INCLUDE_FILE
#define T8032UP_INCLUDE_FILE                "mtk/mtk_t8032fw.h"
#define T8032UP_OFFSET                      au1T8032FW
#define T8032UP_SIZE                        T8032FW_SIZE
#endif

//----------------------------------------------------------------------------
// MTK IR only setting
//----------------------------------------------------------------------------
#define IR_INCLUDE_FILE                     "mtk/mtk_ir.h"

#ifndef NPTV_SOURCE_TABLE
#define NPTV_SOURCE_TABLE                   "mtk/source_table.c"
#endif

//----------------------------------------------------------------------------
// default HDMI GPIO control
//----------------------------------------------------------------------------
#ifndef HDMI_GPIO_CONF
#define HDMI_GPIO_CONF                      "mtk/hdmi_conf.c"
#endif

/*
 * default VGA table
*/
#ifndef VGA_INCLUDE_FILE
#define VGA_INCLUDE_FILE                    "mtk/mtk_vga.h"
#endif

//----------------------------------------------------------------------------
// Tcon Customization
//----------------------------------------------------------------------------
// support LVDS and MLVDS both
#define PANEL_DISPLAY_TYPE_ALLOWED_MASK ((1<<PANEL_DISPLAY_TYPE_LVDS) | (1 << PANEL_DISPLAY_TYPE_MLVDS) | (1 << PANEL_DISPLAY_TYPE_EPI) | (1 << PANEL_DISPLAY_TYPE_VB1))

#ifndef TCON_CUST_FILE
#define TCON_CUST_FILE                      "mtk/Oryx_tcon_cust.c"
#endif
#define SUPPORT_LOCK_FROM_SRVAD

//----------------------------------------------------------------------------
// SCART out configuration
//----------------------------------------------------------------------------
#ifndef TVE_INCLUDE_FILE
#define TVE_INCLUDE_FILE                    "mtk/mtk_tve.c"
#endif

//----------------------------------------------------------------------------
// DMX configuration
//----------------------------------------------------------------------------
#ifndef DMX_INCLUDE_FILE
#define DMX_INCLUDE_FILE                    "mtk/mtk_dmx.h"
#endif

//----------------------------------------------------------------------------
// Loader configuration
//----------------------------------------------------------------------------
#if defined (CC_USE_2TB_EMMC)
    #define MAX_UPGRADE_IMAGE_FILE_SIZE         ((UINT64)8*1024*1024*1024) /* 8G */
#elif defined (CC_USE_256MB_NAND)
#define MAX_UPGRADE_IMAGE_FILE_SIZE         (256*1024*1024)     /* 256 MB */
#else
    #ifdef SYS_EMMC_SUPPORT
        #define MAX_UPGRADE_IMAGE_FILE_SIZE         (1024*1024*1024) //1GB
    #else
        #define MAX_UPGRADE_IMAGE_FILE_SIZE         (512*1024*1024)     /* 512 MB */
    #endif
#endif

#if defined(LINUX_TURNKEY_SOLUTION) || defined(__KERNEL__)
//----------------------------------------------------------------------------
// NAND customization
//----------------------------------------------------------------------------

#if defined (CC_USE_2TB_EMMC)
    #define NAND_FLASH_TOTAL_SIZE               ((UINT64)8*1024*1024*1024) /* 8G */
#elif defined (CC_USE_256MB_NAND)
    #define NAND_FLASH_TOTAL_SIZE               ((UINT64)256*1024*1024)     /* 256 MB */
#else
    #define NAND_FLASH_TOTAL_SIZE               ((UINT64)512*1024*1024)     /* 512 MB */
#endif



#ifdef ANDROID
    #define PART_RESERV_SIZE                ((UINT32)1*1024*1024)
    #ifdef REPLACE_EEPROM_WITH_EMMC
    #define PART_RESERV1_SIZE               ((UINT32)256*1024)
    #else
    #define PART_RESERV1_SIZE               (0)
    #endif

    #define PART_SDM_BAD_SECTOR_SIZE        ((UINT32)5*1024*1024)

    #ifdef CC_FAST_INIT
        #define FAST_INIT_SUSP_SIZE         ((UINT32)60*1024*1024)
    #else
        #define FAST_INIT_SUSP_SIZE         (PART_RESERV_SIZE)
    #endif

    #define PART_LOADER_SIZE                ((UINT32)2*1024*1024)
    #define PART_UBOOT_ENV_SIZE             ((UINT32)2*1024*1024)

    #ifdef CC_DISABLE_BASIC_PART
        #define PART_ROOTFS_SIZE            ((UINT32)40*1024*1024)
        #define PART_BASIC_SIZE             (PART_RESERV_SIZE)
    #else
        #define PART_ROOTFS_SIZE            ((UINT32)20*1024*1024)
        #define PART_BASIC_SIZE             ((UINT32)50*1024*1024)
    #endif
    
    #define PART_PERM_SIZE                  ((UINT32)7*1024*1024)
    #define PART_CHANNEL_SIZE               ((UINT32)1*1024*1024)
    #define PART_PQ_SIZE                    ((UINT32)1*1024*1024)
    #define PART_AQ_SIZE                    ((UINT32)1*1024*1024)

    #define PART_MISC_SIZE                  ((UINT32)1*1024*1024)
    #define PART_RECV_SIZE                  ((UINT32)20*1024*1024)
    #define PART_BOOT_SIZE                  ((UINT32)20*1024*1024)
    #define PART_SYSM_SIZE                  ((UINT32)762*1024*1024)
    #define PART_USRD_SIZE                  ((UINT64)5*1024*1024*1024)
    #define PART_CACH_SIZE                  ((UINT32)120*1024*1024)
    #define PART_CAPTURE_LOGO_SIZE          ((UINT32)4*1024*1024)       /*   4 MB */
    #define PART_LOADER_LOGO_SIZE           ((UINT32)4*1024*1024)       /*   4 MB */
    #define PART_TRUSTZONE_SIZE             ((UINT32)1*1024*1024)       /*   1 MB */
    #ifdef ADSP_BIN_SUPPORT
        #define PART_ADSP_SIZE              ((UINT32)0x00300000)        /* audio dsp size */
    #else
        #define PART_ADSP_SIZE              (PART_RESERV_SIZE)
    #endif
    
    #ifdef REPLACE_EEPROM_WITH_EMMC
    #define PART_EEPROM_SIZE	((UINT64)(1*1024*1024))
    #else 
    #define PART_EEPROM_SIZE	((UINT64)(0*1024*1024))   
    #endif
  
    #ifdef CC_HDMI_2_0_HDCP_BIN
        #ifdef CC_EMMC_ERASE_SIZE_ALIGNMENT_1M
            #define PART_FLASH_HDCP_BIN_SIZE		((UINT32)1*1024*1024)		  /* HDMI 2.0 hdcp partition size 1M */
            #define PART_FLASH_EDID_BIN_SIZE		((UINT32)1*1024*1024)		  /* HDMI 2.0 edid partition size 1M */
        #else		
            #define PART_FLASH_HDCP_BIN_SIZE		((UINT32)256*1024)		      /* HDMI 2.0 hdcp partition size 256K */
            #define PART_FLASH_EDID_BIN_SIZE		((UINT32)256*1024)		      /* HDMI 2.0 edid partition size 256K */
        #endif
    #else
        #define PART_FLASH_HDCP_BIN_SIZE		(PART_RESERV_SIZE)
        #define PART_FLASH_EDID_BIN_SIZE		(PART_RESERV_SIZE)
    #endif
	
    #define PART_UPGRADE_SIZE               ((UINT32)600*1024*1024)    /* 600 MB */
    #define BDM_NON_3RD_SIZE  \
                            ((UINT32)(PART_LOADER_SIZE + PART_UBOOT_ENV_SIZE + \
                             PART_MISC_SIZE + PART_RECV_SIZE + \
                             PART_BOOT_SIZE + PART_SYSM_SIZE + \
                             PART_USRD_SIZE + PART_CACH_SIZE + PART_RESERV_SIZE + \
                             PART_ROOTFS_SIZE + PART_BASIC_SIZE + \
                             PART_PERM_SIZE + \
                             FAST_INIT_SUSP_SIZE + PART_EEPROM_SIZE + PART_RESERV1_SIZE + PART_RESERV1_SIZE))

    #define SDM_TOTAL_SIZE \
                           ((UINT32)(PART_CHANNEL_SIZE + PART_CHANNEL_SIZE + \
                            PART_PQ_SIZE + PART_AQ_SIZE + \
                            PART_CAPTURE_LOGO_SIZE + PART_LOADER_LOGO_SIZE + \
                            PART_TRUSTZONE_SIZE + PART_ADSP_SIZE + \
                            PART_FLASH_HDCP_BIN_SIZE + PART_FLASH_EDID_BIN_SIZE + \
                            PART_UPGRADE_SIZE + PART_SDM_BAD_SECTOR_SIZE))

    #ifdef CC_3RD_RO
        #define PART_3RD_RO_SIZE            ((UINT32)215*1024*1024)                 /* 215MB */
    #else
        #define PART_3RD_RO_SIZE            (PART_RESERV_SIZE)
    #endif

    #define PART_3RD_RW_SIZE                ((UINT32)256*1024*1024)                 /* 256MB */

    #define NAND_PART_SIZE_0                (PART_LOADER_SIZE)
    #define NAND_PART_SIZE_1                (PART_UBOOT_ENV_SIZE)
    #define NAND_PART_SIZE_2                (PART_MISC_SIZE)
    #define NAND_PART_SIZE_3                (PART_RECV_SIZE)
    #define NAND_PART_SIZE_4                (PART_BOOT_SIZE)
    #define NAND_PART_SIZE_5                (PART_SYSM_SIZE)
    #define NAND_PART_SIZE_6                (PART_USRD_SIZE)
    #define NAND_PART_SIZE_7                (PART_CACH_SIZE)
    #define NAND_PART_SIZE_8                (PART_RESERV_SIZE)
    #define NAND_PART_SIZE_9                (PART_ROOTFS_SIZE)
    #define NAND_PART_SIZE_10               (PART_BASIC_SIZE)
    #define NAND_PART_SIZE_11               (PART_PERM_SIZE)
    #define NAND_PART_SIZE_12               (PART_3RD_RO_SIZE)
    #define NAND_PART_SIZE_13               (PART_3RD_RW_SIZE)
    #define NAND_PART_SIZE_14               (FAST_INIT_SUSP_SIZE)
    #define NAND_PART_SIZE_15               (PART_CHANNEL_SIZE)
    #define NAND_PART_SIZE_16               (PART_CHANNEL_SIZE)
    #define NAND_PART_SIZE_17               (PART_PQ_SIZE)
    #define NAND_PART_SIZE_18               (PART_AQ_SIZE)
    #define NAND_PART_SIZE_19               (PART_CAPTURE_LOGO_SIZE)
    #define NAND_PART_SIZE_20               (PART_LOADER_LOGO_SIZE)
    #define NAND_PART_SIZE_21               (PART_TRUSTZONE_SIZE)
    #define NAND_PART_SIZE_22               (PART_ADSP_SIZE)
    #define NAND_PART_SIZE_23               (PART_FLASH_HDCP_BIN_SIZE)
	#define NAND_PART_SIZE_24               (PART_UPGRADE_SIZE)
    #define NAND_PART_SIZE_25               (PART_FLASH_EDID_BIN_SIZE)
    #define NAND_FLASH_STATIC_LAST_PART_ID  (14)
#ifdef REPLACE_EEPROM_WITH_EMMC
    #define NAND_PART_SIZE_26               (PART_RESERV1_SIZE)
    #define NAND_PART_SIZE_27               (PART_RESERV1_SIZE)
    #define NAND_PART_SIZE_28				(PART_EEPROM_SIZE)
    #define NAND_PART_ID_EEPROM_A			(28)
#endif

    #define NAND_FLASH_STATIC_PART_SIZE \
            ((UINT32)((NAND_PART_SIZE_0) + \
            (NAND_PART_SIZE_1) + (NAND_PART_SIZE_2) + (NAND_PART_SIZE_3) + \
            (NAND_PART_SIZE_4) + (NAND_PART_SIZE_5) + (NAND_PART_SIZE_6) + \
            (NAND_PART_SIZE_7) + (NAND_PART_SIZE_8) + (NAND_PART_SIZE_9) + \
            (NAND_PART_SIZE_10) + (NAND_PART_SIZE_11) + (NAND_PART_SIZE_12) + \
            (NAND_PART_SIZE_13) + (NAND_PART_SIZE_14)))

    #define NAND_PART_NAME_0                "uboot"
    #define NAND_PART_ENCRYPT_0             (0)
    #define NAND_PART_NAME_1                "uboot_env"
    #define NAND_PART_ENCRYPT_1             (1)
    #define NAND_PART_NAME_2                "misc"
    #define NAND_PART_ENCRYPT_2             (1)
    #define NAND_PART_NAME_3                "recovery"
    #define NAND_PART_ENCRYPT_3             (1)
    #define NAND_PART_NAME_4                "boot"
    #define NAND_PART_ENCRYPT_4             (1)
    #define NAND_PART_NAME_5                "system"
    #define NAND_PART_ENCRYPT_5             (0)
    #define NAND_PART_NAME_6                "userdata"
    #define NAND_PART_ENCRYPT_6             (0)
    #define NAND_PART_NAME_7                "cache"
    #define NAND_PART_ENCRYPT_7             (0)
    #define NAND_PART_NAME_8                "reserved"
    #define NAND_PART_ENCRYPT_8             (0)
    #define NAND_PART_NAME_9                "linux_rootfs"
    #define NAND_PART_ENCRYPT_9             (0)
    #define NAND_PART_NAME_10               "basic"
    #define NAND_PART_ENCRYPT_10            (0)
    #define NAND_PART_NAME_11               "perm"
    #define NAND_PART_ENCRYPT_11            (1)
    #define NAND_PART_NAME_12               "3rd_ro"
    #define NAND_PART_ENCRYPT_12            (1)
    #define NAND_PART_NAME_13               "3rd_rw"
    #define NAND_PART_ENCRYPT_13            (0)
    #define NAND_PART_NAME_14               "reserved"
    #define NAND_PART_ENCRYPT_14            (0)
    #define NAND_PART_NAME_15               "channelA"
    #define NAND_PART_ENCRYPT_15            (0)
    #define NAND_PART_NAME_16               "channelB"
    #define NAND_PART_ENCRYPT_16            (0)
    #define NAND_PART_NAME_17               "pq"
    #define NAND_PART_ENCRYPT_17            (0)
    #define NAND_PART_NAME_18               "aq"
    #define NAND_PART_ENCRYPT_18            (0)
    #define NAND_PART_NAME_19               "logo"
    #define NAND_PART_ENCRYPT_19            (0)
    #define NAND_PART_NAME_20               "bootlogo"
    #define NAND_PART_ENCRYPT_20            (0)
    #ifdef CC_TZBIN_INDIVIDUAL_PARTITION
        #define NAND_PART_NAME_21           "tzbp"
        #define TRUSTZONE_FLASH_PARTITION   (21)
        #define NAND_PART_ENCRYPT_21        (1)
    #endif /* endif CC_TZBIN_INDIVIDUAL_PARTITION */
    #ifdef ADSP_BIN_SUPPORT
        #define NAND_PART_NAME_22           "adsp"
    #endif
    #ifdef CC_HDMI_2_0_HDCP_BIN
        #define NAND_PART_NAME_23           "hdcp"
        #define FLASH_HDCP_BIN_PARTITION    (23)
		#define NAND_PART_NAME_25           "edid"
        #define FLASH_EDID_BIN_PARTITION    (25)
    #endif
    #define NAND_PART_NAME_24               "upgrade"
	#ifdef REPLACE_EEPROM_WITH_EMMC
        #define NAND_PART_NAME_26           "reserved1"
        #define NAND_PART_ENCRYPT_26        (0)
        #define NAND_PART_NAME_27           "reserved2"
        #define NAND_PART_ENCRYPT_27        (0)
        #define NAND_PART_NAME_28           "eeprom_A"
        #define NAND_PART_ENCRYPT_28         (0)
	#endif
#else 
    #define PART_RESERV_SIZE                (256*1024)
    #define PART_SDM_BAD_SECTOR_SIZE        (5*1024*1024)

    #ifdef CC_FAST_INIT
        #define FAST_INIT_SUSP_SIZE         (60*1024*1024)
    #else
        #define FAST_INIT_SUSP_SIZE         (PART_RESERV_SIZE)
    #endif  /* 2nd */

    #define PART_LOADER_SIZE                (2*1024*1024)
    #define PART_UBOOT_ENV_SIZE             (2*1024*1024)
    #define PART_SIG_KERNEL_SIZE            (256*1024)
#ifdef LARGER_KERNEL
    #define PART_KERNEL_SIZE                (6*1024*1024)
#else
    #define PART_KERNEL_SIZE                (4*1024*1024)
#endif
    
    #ifdef CC_DISABLE_BASIC_PART
        #define PART_ROOTFS_SIZE            (40*1024*1024)
        #define PART_BASIC_SIZE             (PART_RESERV_SIZE)
    #else
        #define PART_ROOTFS_SIZE            (20*1024*1024)
        #define PART_BASIC_SIZE             (30*1024*1024)
    #endif  /* 1st */
    
    #define PART_PERM_SIZE                  (8*1024*1024)
    #define PART_CHANNEL_SIZE               (256*1024)
    #define PART_PQ_SIZE                    (256*1024)
    #define PART_AQ_SIZE                    (256*1024)
    #define PART_CAPTURE_LOGO_SIZE          (1*1024*1024)
    #define PART_ACFG_DESC_SIZE             (256*1024)
    #define PART_SCHED_PVR_SIZE             (256*1024)         /* Schedule PVR size 256K */
#ifdef ADSP_BIN_SUPPORT
    #define PART_ADSP_SIZE                  (3*1024*1024)        /* audio dsp size */
#else
    #define PART_ADSP_SIZE                  (PART_RESERV_SIZE)
#endif  /* 1st */

#ifdef CC_HDMI_2_0_HDCP_BIN
    #define PART_FLASH_HDCP_BIN_SIZE         (256*1024)         /* HDMI 2.0 hdcp partition size 256K */ 
	#define PART_EDID_BIN_SIZE          	 (256*1024)         /* HDMI 2.0 edid partition size 256K*/
#else
    #define PART_FLASH_HDCP_BIN_SIZE         (PART_RESERV_SIZE)
	#define PART_EDID_BIN_SIZE         		 (PART_RESERV_SIZE) 
#endif

    
    #define BDM_NON_3RD_SIZE  \
                            (PART_LOADER_SIZE + PART_UBOOT_ENV_SIZE + \
                             PART_SIG_KERNEL_SIZE + PART_SIG_KERNEL_SIZE + \
                             PART_KERNEL_SIZE + PART_KERNEL_SIZE + \
                             PART_ROOTFS_SIZE + PART_ROOTFS_SIZE + \
                             PART_BASIC_SIZE + \
                             PART_PERM_SIZE + \
                             FAST_INIT_SUSP_SIZE)
    #define SDM_TOTAL_SIZE \
                           (PART_CHANNEL_SIZE + PART_CHANNEL_SIZE + \
                            PART_PQ_SIZE + PART_AQ_SIZE + \
                            PART_CAPTURE_LOGO_SIZE + \
                            PART_SCHED_PVR_SIZE + \
                            PART_FLASH_HDCP_BIN_SIZE + \
                            PART_EDID_BIN_SIZE + \
                            PART_SDM_BAD_SECTOR_SIZE + \
                            PART_RESERV_SIZE + PART_RESERV_SIZE + \
                            PART_ADSP_SIZE + PART_ACFG_DESC_SIZE)
                            
    
    #ifdef CC_3RD_RO
        #define PART_3RD_RO_SIZE            (200*1024*1024)                 /* 200MB */
    #else
        #define PART_3RD_RO_SIZE            (PART_RESERV_SIZE)
    #endif   /* 1st */ 

#ifndef CC_MSDC_ENABLE
    #define PART_3RD_RW_SIZE            (NAND_FLASH_TOTAL_SIZE - BDM_NON_3RD_SIZE - SDM_TOTAL_SIZE - PART_3RD_RO_SIZE)
#else
    #define PART_3RD_RW_SIZE            (200*1024*1024)      /* 200MB */
#endif /* 2nd */

    #define NAND_PART_SIZE_0                (PART_LOADER_SIZE)              /* loader image              */
    #define NAND_PART_SIZE_1                (PART_UBOOT_ENV_SIZE)           /* nand_1 - uboot env        */
    #define NAND_PART_SIZE_2                (PART_SIG_KERNEL_SIZE)          /* nand_2 - sig A            */
    #define NAND_PART_SIZE_3                (PART_SIG_KERNEL_SIZE)          /* nand_3 - sig B            */
    #define NAND_PART_SIZE_4                (PART_KERNEL_SIZE)              /* nand_4 - kernel A         */
    #define NAND_PART_SIZE_5                (PART_KERNEL_SIZE)              /* nand_5 - kernel B         */
    #define NAND_PART_SIZE_6                (PART_ROOTFS_SIZE)              /* nand_6 - rootfs A         */
    #define NAND_PART_SIZE_7                (PART_ROOTFS_SIZE)              /* nand_7 - rootfs B         */
    #define NAND_PART_SIZE_8                (PART_BASIC_SIZE)               /* nand_8 - basic            */

    #define NAND_PART_SIZE_9                (PART_PERM_SIZE)                /* nand_9 - perm            */
    #define NAND_PART_SIZE_10               (PART_3RD_RO_SIZE)              /* nand_10 - 3rd ro   */
    #define NAND_PART_SIZE_11               (PART_3RD_RW_SIZE )             /* nand_11 - 3rd_rw           */
    #define NAND_PART_SIZE_12               (FAST_INIT_SUSP_SIZE)           /* nand_11 - reserved        */
    
    #define NAND_PART_SIZE_13               (PART_CHANNEL_SIZE)             /* nand_13 - channel list A  */
    #define NAND_PART_SIZE_14               (PART_CHANNEL_SIZE)             /* nand_14 - channel list B  */
    #define NAND_PART_SIZE_15               (PART_PQ_SIZE)                  /* nand_15 - Flash PQ         */
    #define NAND_PART_SIZE_16               (PART_AQ_SIZE)                  /* nand_16 - Flash AQ         */
    #define NAND_PART_SIZE_17               (PART_CAPTURE_LOGO_SIZE)        /* nand_17- Capture Logo     */
    #define NAND_PART_SIZE_18               (PART_ACFG_DESC_SIZE)           /* nand_18- Acfg description     */
    #define NAND_PART_SIZE_19               (PART_SCHED_PVR_SIZE)           /* nand_19 - Schedule PVR     */
    #define NAND_PART_SIZE_20               (PART_ADSP_SIZE)                /* nand_20 - audio dsp */
    #define NAND_PART_SIZE_21               (PART_FLASH_HDCP_BIN_SIZE)      /* nand_21 - HDMI 2.0 hdcp */
	#define NAND_PART_SIZE_22               (PART_EDID_BIN_SIZE)            /* nand_22 - HDMI 2.0 edid  */
    #define NAND_PART_SIZE_23               (PART_RESERV_SIZE)              /* nand_23 - reserved     */

#ifdef CC_HDMI_2_0_HDCP_BIN
    #define FLASH_HDCP_BIN_PARTITION        (21)
	#define FLASH_EDID_BIN_PARTITION        (22)
#endif    

    #define NAND_FLASH_STATIC_LAST_PART_ID    (12)

    #define NAND_FLASH_STATIC_PART_SIZE \
            ((NAND_PART_SIZE_0) + \
            (NAND_PART_SIZE_1) + (NAND_PART_SIZE_2) + (NAND_PART_SIZE_3) + \
            (NAND_PART_SIZE_4) + (NAND_PART_SIZE_5) + (NAND_PART_SIZE_6) + \
            (NAND_PART_SIZE_7) + (NAND_PART_SIZE_8) + (NAND_PART_SIZE_9) + \
            (NAND_PART_SIZE_10) + (NAND_PART_SIZE_11) + (NAND_PART_SIZE_12))

#endif /* ANDROID */

#ifdef CC_HDMI_2_0_HDCP_BIN
    #define FLASH_HDMI_2_0_HDCP2_2_KEY_OFFSET                     (0)
    #define FLASH_HDMI_1_4_HDCP1_4_KEY_OFFSET                     (FLASH_HDMI_2_0_HDCP2_2_KEY_SIZE)
	#define FLASH_HDMI_2_0_PROM_OFFSET                            (0)
    #define FLASH_HDMI_2_0_PRAM_OFFSET                            (FLASH_HDMI_2_0_PROM_SIZE)
	#define FLASH_HDMI_2_0_EDID_OFFSET                            (FLASH_HDMI_2_0_PRAM_OFFSET + FLASH_HDMI_2_0_PRAM_SIZE)
    #define FLASH_MHL_2_0_EDID_OFFSET                             (FLASH_HDMI_2_0_EDID_OFFSET + FLASH_HDMI_2_0_EDID_SIZE)
#endif

#endif //defined(LINUX_TURNKEY_SOLUTION) || defined(__KERNEL__)

#if defined(LINUX_TURNKEY_SOLUTION) || defined(__KERNEL__)
#ifdef CC_FBM_MAPPING_ONE_BY_ONE
#ifndef FBM_BOOT_MMAP_INCLUDE_FILE
#define FBM_BOOT_MMAP_INCLUDE_FILE           "mtk/mtk_fbm_mmap.h"
#endif
#endif
#endif
//----------------------------------------------------------------------------
// Capture Logo Customization
//----------------------------------------------------------------------------

// driver logo setting
#ifdef CC_BOOT_VDEC_LOGO
#define DRV_LOGO_ENABLE                     (1)
#define BOOT_VDEC_LOGO_PART_SIZE            (0x100000)          /* Partitino Size: 1MB */

#define DRV_LOGO_VDEC_FLASH_ADDR            NAND_PART_OFFSET_16
#define DRV_LOGO_VDEC_FLASH_SIZE            BOOT_VDEC_LOGO_PART_SIZE
#define DRV_LOGO_VDEC_FLASH_SLOT_NUM        (2)
#define DRV_LOGO_VDEC_DEVICE_ID             (16)
#define NAND_PART_SIZE_15                   (3*1024*1024)       /*should shrink to 1MB when SDM is ready*/

#define DRV_LOGO_H_FILE                     "mtk/MediaTek_Mpeg2Logo.h"
#define DRV_POWER_MUSIC_H_FILE              "mtk/mtk_PowerMusic.h"      /* power on music. */
#endif /* CC_BOOT_VDEC_LOGO */

        
#ifdef SUPPORT_FLASH_PQ
    #ifdef ANDROID
        #define FLASH_PQ_BASE_PARTITION         (17)
    #elif defined (LINUX_TURNKEY_SOLUTION)
        #define FLASH_PQ_BASE_PARTITION         (15) 
    #endif
#endif

#ifdef SUPPORT_FLASH_AQ
    #ifdef ANDROID
        #define FLASH_AQ_BASE_PARTITION         (18)
    #elif defined (LINUX_TURNKEY_SOLUTION)
        #define FLASH_AQ_BASE_PARTITION         (16)
    #endif
#endif

#ifdef ADSP_BIN_SUPPORT
    #ifdef ANDROID
        #define FLASH_ADSP_BIN_PARTITION                (22)
    #elif defined (LINUX_TURNKEY_SOLUTION)
        #define FLASH_ADSP_BIN_PARTITION                (20)
    #endif
#endif

#if defined(LINUX_TURNKEY_SOLUTION) || defined(__KERNEL__)
#ifdef CC_FBM_MAPPING_ONE_BY_ONE
#ifndef FBM_BOOT_MMAP_INCLUDE_FILE
#define FBM_BOOT_MMAP_INCLUDE_FILE           "mtk/mtk_fbm_mmap.h"
#endif
#endif
#endif

/*
 * default quality table
*/
#ifndef QTYTBL_INCLUDE_FILE
//#define QTYTBL_INCLUDE_FILE                   "mtk/QTY_DEFAULT/mtk_QtyTbl.h"
#endif

/*
 * default color parameter
*/
#ifndef COLOR_PARAM_INCLUDE_FILE
//#define COLOR_PARAM_INCLUDE_FILE              "mtk/PANEL_DEFAULT/color_param.h"
#endif

/*
 * dynamic backlight parameter
*/

/*
 * OD setting
*/

#define SUPPORT_OD  (0)

/*
 *  ENABLE WOW for WiFi
*/
#ifdef CC_WIFI_WOWLAN_SUPPORT
#define WAKEUP_ON_WLAN_GPIO 	(202)
#define RESET_ON_WLAN_GPIO 	(231)
    #ifdef CC_WIFI_WOWLAN_LOW_ACTIVE
        #define WAKEUP_ON_WLAN_POL 		(0)
    #else
        #define WAKEUP_ON_WLAN_POL 		(1)
    #endif
#endif

/*
 *  ENABLE WoBT for BT
*/
#define WAKEUP_ON_BT_GPIO (212)
#define WAKEUP_ON_BT_POL (0)

#else /* CONFIG_DEFAULT_H */
#error "Cannot include multi-config files"
#endif /* CONFIG_DEFAULT_H */

