/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/


/** @file pinmux.h
 *  pinmux.h declare all pinmux/gpio private related function and parameters.
 */


#ifndef X_PINMUX_H
#define X_PINMUX_H

//-----------------------------------------------------------------------------
// Include files
//-----------------------------------------------------------------------------

#include "x_lint.h"
#include "hw_ckgen.h"
#include "x_ckgen.h"
#include "x_gpio.h"

//=====================================================================
// IC information
#define TOTAL_PIN_REG           (15)
#define CKGEN_PIN_REG			(9)
 
//=====================================================================
// Register definitions

#define MX0		((1U << 5) | BASIC_MASK) //MX0
#define MX1		((2U << 5) | BASIC_MASK) //MX1
#define MX2		((3U << 5) | BASIC_MASK) //MX2
#define MX3		((4U << 5) | BASIC_MASK) //MX3
#define MX4		((5U << 5) | BASIC_MASK) //MX4
#define MX5		((6U << 5) | BASIC_MASK) //MX5
#define MX6		((7U << 5) | BASIC_MASK) //MX6
#define MX7		((8U << 5) | BASIC_MASK) //MX7
#define MX8		((9U << 5) | BASIC_MASK) //MX8
#define PDMX0	((10U << 5) | BASIC_MASK) //PDMX0
#define PDMX1	((11U << 5) | BASIC_MASK) //PDMX1
#define PDMX2	((12U << 5) | BASIC_MASK) //PDMX2
#define PDMX3	((13U << 5) | BASIC_MASK) //PDMX3
#define PDMX4	((14U << 5) | BASIC_MASK) //PDMX4
#define PDMX5	((15U << 5) | BASIC_MASK) //PDMX4

#define PMISC 	MX8

#define PIN_USB_DP_P3   (MX3|OFFSETMASK(5,3))
#define PIN_USB_DM_P3   (MX3|OFFSETMASK(5,3))
#define PIN_ADIN9   (PDMX4|31)
#define PIN_ADIN8   (PDMX4|30)
#define PIN_ADIN7   (PDMX4|29)
#define PIN_ADIN6   (PDMX4|28)
#define PIN_ADIN5   (PDMX4|27)
#define PIN_ADIN4   (PDMX4|26)
#define PIN_ADIN3   (PDMX4|25)
#define PIN_ADIN2   (PDMX4|24)
#define PIN_ADIN1   (PDMX4|23)
#define PIN_USB_DM_P2   (MX8|OFFSETMASK(25,23))
#define PIN_USB_DP_P2   (MX8|OFFSETMASK(25,23))
#define PIN_HDMI_0_HPD_CBUS   (PDMX4|OFFSETMASK(14,12))
#define PIN_USB_DM_P0   (MX2|OFFSETMASK(8,6))
#define PIN_USB_DP_P0   (MX2|OFFSETMASK(8,6))
#define PIN_USB_DM_P1   (MX2|OFFSETMASK(11,9))
#define PIN_USB_DP_P1   (MX2|OFFSETMASK(11,9))
#define PIN_SD_CMD   (MX1|OFFSETMASK(28,26)| MULTI_GPIO_FLAG)
#define PIN_SD_CLK   (MX1|OFFSETMASK(28,26))
#define PIN_SD_D0   (MX1|OFFSETMASK(28,26))
#define PIN_SD_D1   (MX1|OFFSETMASK(28,26))
#define PIN_SD_D2   (MX1|OFFSETMASK(28,26))
#define PIN_SD_D3   (MX1|OFFSETMASK(28,26))
#define PIN_POCE0_   (MX0|OFFSETMASK(23,22))
#define PIN_POOE_   (MX0|OFFSETMASK(23,22))
#define PIN_PDD0   (MX0|OFFSETMASK(23,22)| MULTI_GPIO_FLAG)
#define PIN_PDD1   (MX0|OFFSETMASK(23,22)| MULTI_GPIO_FLAG)
#define PIN_POCE1_   (MX3|27)
#define PIN_PARB_   (MX1|19)
#define PIN_POWE_   (MX0|OFFSETMASK(5,4))
#define PIN_PAALE   (MX0|OFFSETMASK(5,4))
#define PIN_PACLE   (MX0|OFFSETMASK(5,4))
#define PIN_PDD2   (MX0|OFFSETMASK(5,4))
#define PIN_PDD3   (MX0|OFFSETMASK(5,4))
#define PIN_PDD4   (MX0|OFFSETMASK(7,6))
#define PIN_PDD5   (MX0|OFFSETMASK(7,6))
#define PIN_PDD6   (MX0|OFFSETMASK(7,6))
#define PIN_PDD7   (MX0|OFFSETMASK(7,6))
#define PIN_EMMC_CLK   (MX0|20)
#define PIN_EMMC_RST   (MX0|20)
#define PIN_EMMC_DS   (MX0|21)
#define PIN_HDMI_CEC_1   (PDMX4|OFFSETMASK(8,6))
#define PIN_HDMI_CEC_2   (PDMX4|OFFSETMASK(11,9))
#define PIN_HDMI_0_SDA   (PDMX5|OFFSETMASK(2,0))
#define PIN_HDMI_0_SCL   (PDMX5|OFFSETMASK(5,3))
#define PIN_HDMI_1_SDA   (PDMX5|OFFSETMASK(8,6))
#define PIN_HDMI_1_SCL   (PDMX5|OFFSETMASK(11,9))
#define PIN_HDMI_2_SDA   (PDMX5|OFFSETMASK(14,12))
#define PIN_HDMI_2_SCL   (PDMX5|OFFSETMASK(17,15))
#define PIN_HDMI_3_SDA   (PDMX5|OFFSETMASK(20,18))
#define PIN_HDMI_3_SCL   (PDMX5|OFFSETMASK(23,21))
#define PIN_HDMI_1_HPD   (PDMX5|OFFSETMASK(26,24))
#define PIN_HDMI_2_HPD   (PDMX5|OFFSETMASK(29,27)| MULTI_GPIO_FLAG)
#define PIN_HDMI_3_HPD   (PDMX4|OFFSETMASK(2,0)| MULTI_GPIO_FLAG)
#define PIN_MHL_SENSE   (PDMX4|OFFSETMASK(5,3))
#define PIN_OIRI   (PDMX0|OFFSETMASK(31,30))
#define PIN_VGA_SDA   (PDMX3|OFFSETMASK(14,12))
#define PIN_VGA_SCL   (PDMX3|OFFSETMASK(17,15))
#define PIN_U0TX   (PDMX3|OFFSETMASK(20,18))
#define PIN_U0RX   (PDMX3|OFFSETMASK(23,21))
#define PIN_LED_PWM0   (PDMX3|OFFSETMASK(8,6))
#define PIN_LED_PWM1   (PDMX3|OFFSETMASK(11,9))
#define PIN_OPCTRL0   (PDMX0|OFFSETMASK(2,0))
#define PIN_OPCTRL1   (PDMX0|OFFSETMASK(5,3))
#define PIN_OPCTRL2   (PDMX0|OFFSETMASK(8,6))
#define PIN_OPCTRL3   (PDMX0|OFFSETMASK(11,9))
#define PIN_OPCTRL4   (PDMX0|OFFSETMASK(14,12))
#define PIN_OPCTRL5   (PDMX0|OFFSETMASK(17,15))
#define PIN_OPCTRL6   (PDMX0|OFFSETMASK(20,18))
#define PIN_OPCTRL7   (PDMX0|OFFSETMASK(23,21))
#define PIN_OPCTRL8   (PDMX0|OFFSETMASK(26,24))
#define PIN_OPCTRL9   (PDMX0|OFFSETMASK(29,27))
#define PIN_OPCTRL10   (PDMX1|OFFSETMASK(2,0))
#define PIN_OPCTRL11   (PDMX1|OFFSETMASK(5,3))
#define PIN_OPCTRL12   (PDMX1|OFFSETMASK(8,6))
#define PIN_OPCTRL13   (PDMX1|OFFSETMASK(11,9))
#define PIN_OPCTRL14   (PDMX1|OFFSETMASK(14,12))
#define PIN_OPCTRL15   (PDMX1|OFFSETMASK(17,15))
#define PIN_OPCTRL16   (PDMX1|OFFSETMASK(20,18))
#define PIN_OPCTRL17   (PDMX1|OFFSETMASK(23,21))
#define PIN_OPCTRL18   (PDMX1|OFFSETMASK(26,24))
#define PIN_OPCTRL19   (PDMX1|OFFSETMASK(29,27))
#define PIN_OPCTRL20   (PDMX2|OFFSETMASK(2,0))
#define PIN_OPCTRL21   (PDMX2|OFFSETMASK(5,3))
#define PIN_OPCTRL22   (PDMX2|OFFSETMASK(8,6))
#define PIN_OPCTRL23   (PDMX2|OFFSETMASK(11,9))
#define PIN_OPCTRL24   (PDMX2|OFFSETMASK(14,12))
#define PIN_STB_SDA   (PDMX2|OFFSETMASK(17,15))
#define PIN_STB_SCL   (PDMX2|OFFSETMASK(20,18))
#define PIN_OPWRSB   (PDMX2|OFFSETMASK(23,21))
#define PIN_PHYLED0   (PDMX2|OFFSETMASK(26,24))
#define PIN_PHYLED1   (PDMX2|OFFSETMASK(29,27))
#define PIN_LED_PWM2   (PDMX3|OFFSETMASK(2,0))
#define PIN_LED_PWM3   (PDMX3|OFFSETMASK(5,3))
#define PIN_GPIO56   (MX0|OFFSETMASK(3,0))
#define PIN_GPIO57   (MX4|OFFSETMASK(19,16))
#define PIN_GPIO58   (MX4|OFFSETMASK(23,20))
#define PIN_GPIO59   (MX4|OFFSETMASK(27,24))
#define PIN_GPIO60   (MX4|OFFSETMASK(31,28)| MULTI_GPIO_FLAG)
#define PIN_OPWM0   (MX0|OFFSETMASK(12,10)| MULTI_GPIO_FLAG)
#define PIN_OPWM1   (MX0|OFFSETMASK(15,13))
#define PIN_OPWM2   (MX2|OFFSETMASK(14,12))
#define PIN_GPIO67   (MX7|OFFSETMASK(10,8)| MULTI_GPIO_FLAG)
#define PIN_GPIO68   (MX7|OFFSETMASK(13,11)| MULTI_GPIO_FLAG)
#define PIN_GPIO69   (MX7|OFFSETMASK(16,14)| MULTI_GPIO_FLAG)
#define PIN_GPIO70   (MX7|OFFSETMASK(19,17)| MULTI_GPIO_FLAG)
#define PIN_GPIO71   (MX7|OFFSETMASK(22,20))
#define PIN_GPIO72   (MX5|OFFSETMASK(26,24))
#define PIN_U1RX   (MX0|OFFSETMASK(17,16))
#define PIN_U1TX   (MX0|OFFSETMASK(17,16))
#define PIN_OSDA0   (MX0|OFFSETMASK(19,18))
#define PIN_OSCL0   (MX0|OFFSETMASK(19,18))
#define PIN_OSDA1   (MX2|OFFSETMASK(5,3))
#define PIN_OSCL1   (MX2|OFFSETMASK(5,3))
#define PIN_ALIN   (MX2|OFFSETMASK(17,15))
#define PIN_ASPDIF0   (MX1|OFFSETMASK(31,29))
#define PIN_ASPDIF1   (MX0|OFFSETMASK(27,25))
#define PIN_AOMCLK   (MX6|OFFSETMASK(5,3))
#define PIN_AOLRCK   (MX0|OFFSETMASK(29,28))
#define PIN_AOBCK   (MX0|OFFSETMASK(29,28))
#define PIN_AOSDATA0   (MX0|OFFSETMASK(29,28))
#define PIN_AOSDATA1   (MX6|OFFSETMASK(2,0))
#define PIN_AOSDATA2   (MX3|OFFSETMASK(22,20))
#define PIN_AOSDATA3   (MX3|OFFSETMASK(22,20))
#define PIN_AOSDATA4   (MX8|OFFSETMASK(4,2))
#define PIN_IF_AGC   (MX1|OFFSETMASK(7,6))
#define PIN_RF_AGC   (MX1|OFFSETMASK(12,11))
#define PIN_OSDA2   (MX1|OFFSETMASK(2,0))
#define PIN_OSCL2   (MX1|OFFSETMASK(2,0))
#define PIN_DEMOD_TSCLK   (MX2|OFFSETMASK(20,18)| MULTI_GPIO_FLAG)
#define PIN_DEMOD_TSVAL   (MX2|OFFSETMASK(20,18)| MULTI_GPIO_FLAG)
#define PIN_DEMOD_TSSYNC   (MX0|OFFSETMASK(9,8)| MULTI_GPIO_FLAG)
#define PIN_DEMOD_TSDATA0   (MX0|OFFSETMASK(9,8)| MULTI_GPIO_FLAG)
#define PIN_DEMOD_TSDATA1   (MX1|OFFSETMASK(5,3)| MULTI_GPIO_FLAG)
#define PIN_DEMOD_TSDATA2   (MX1|OFFSETMASK(5,3)| MULTI_GPIO_FLAG)
#define PIN_DEMOD_TSDATA3   (MX1|OFFSETMASK(5,3)| MULTI_GPIO_FLAG)
#define PIN_DEMOD_TSDATA4   (MX1|OFFSETMASK(5,3)| MULTI_GPIO_FLAG)
#define PIN_DEMOD_TSDATA5   (MX7|OFFSETMASK(7,6))
#define PIN_DEMOD_TSDATA6   (MX7|OFFSETMASK(7,6))
#define PIN_DEMOD_TSDATA7   (MX7|OFFSETMASK(7,6))
#define PIN_CI_TSCLK   (MX1|OFFSETMASK(10,8)| MULTI_GPIO_FLAG)
#define PIN_CI_TSVAL   (MX1|OFFSETMASK(10,8)| MULTI_GPIO_FLAG)
#define PIN_CI_TSSYNC   (MX1|OFFSETMASK(10,8)| MULTI_GPIO_FLAG)
#define PIN_CI_TSDATA0   (MX1|OFFSETMASK(15,13)| MULTI_GPIO_FLAG)
#define PIN_PVR_TSCLK   (MX1|OFFSETMASK(18,16))
#define PIN_PVR_TSVAL   (MX1|OFFSETMASK(18,16))
#define PIN_PVR_TSSYNC   (MX1|OFFSETMASK(18,16))
#define PIN_PVR_TSDATA0   (MX1|OFFSETMASK(18,16)| MULTI_GPIO_FLAG)
#define PIN_PVR_TSDATA1   (MX8|OFFSETMASK(7,5)| MULTI_GPIO_FLAG)
#define PIN_SPI_CLK   (MX1|OFFSETMASK(21,20))
#define PIN_SPI_CLK1   (MX1|OFFSETMASK(21,20))
#define PIN_SPI_DATA   (MX1|OFFSETMASK(23,22))
#define PIN_SPI_CLE   (MX1|OFFSETMASK(23,22))
#define PIN_DEMOD_RST   (MX5|OFFSETMASK(22,20)| MULTI_GPIO_FLAG)
#define PIN_CI_INT   (MX1|OFFSETMASK(25,24)| MULTI_GPIO_FLAG)
#define PIN_GPIO0   (MX2|OFFSETMASK(23,22)| MULTI_GPIO_FLAG)
#define PIN_GPIO1   (MX2|OFFSETMASK(23,22))
#define PIN_GPIO2   (MX8|OFFSETMASK(31,29))
#define PIN_GPIO3   (MX2|OFFSETMASK(25,24))
#define PIN_GPIO4   (MX2|OFFSETMASK(25,24))
#define PIN_GPIO5   (MX2|OFFSETMASK(25,24))
#define PIN_GPIO6   (MX2|OFFSETMASK(27,26))
#define PIN_GPIO7   (MX2|OFFSETMASK(27,26))
#define PIN_GPIO8   (MX2|OFFSETMASK(29,28))
#define PIN_GPIO9   (MX2|OFFSETMASK(29,28))
#define PIN_GPIO10   (MX2|OFFSETMASK(29,28))
#define PIN_GPIO11   (MX2|OFFSETMASK(29,28))
#define PIN_GPIO12   (MX2|OFFSETMASK(31,30))
#define PIN_GPIO13   (MX2|OFFSETMASK(31,30))
#define PIN_GPIO14   (MX2|OFFSETMASK(31,30))
#define PIN_GPIO15   (MX3|OFFSETMASK(2,0))
#define PIN_GPIO16   (MX3|OFFSETMASK(2,0))
#define PIN_GPIO17   (MX3|OFFSETMASK(2,0))
#define PIN_GPIO18   (MX7|OFFSETMASK(25,23))
#define PIN_GPIO19   (MX8|OFFSETMASK(19,17))
#define PIN_GPIO20   (MX7|OFFSETMASK(28,26))
#define PIN_GPIO21   (MX8|OFFSETMASK(22,20))
#define PIN_GPIO22   (MX4|OFFSETMASK(14,12)| MULTI_GPIO_FLAG)
#define PIN_GPIO23   (MX4|OFFSETMASK(14,12)| MULTI_GPIO_FLAG)
#define PIN_GPIO24   (MX4|OFFSETMASK(14,12)| MULTI_GPIO_FLAG)
#define PIN_GPIO25   (MX4|OFFSETMASK(14,12)| MULTI_GPIO_FLAG)
#define PIN_GPIO26   (MX7|OFFSETMASK(31,29))
#define PIN_GPIO27   (MX7|OFFSETMASK(31,29))
#define PIN_GPIO28   (MX7|OFFSETMASK(31,29))
#define PIN_GPIO29   (MX7|OFFSETMASK(31,29))
#define PIN_GPIO30   (MX7|OFFSETMASK(31,29))
#define PIN_GPIO31   (MX7|OFFSETMASK(31,29))
#define PIN_GPIO32   (MX8|OFFSETMASK(10,8)| MULTI_GPIO_FLAG)
#define PIN_GPIO33   (MX8|OFFSETMASK(10,8)| MULTI_GPIO_FLAG)
#define PIN_GPIO34   (MX8|OFFSETMASK(13,11)| MULTI_GPIO_FLAG)
#define PIN_GPIO35   (MX8|OFFSETMASK(13,11)| MULTI_GPIO_FLAG)
#define PIN_GPIO36   (MX8|OFFSETMASK(13,11)| MULTI_GPIO_FLAG)
#define PIN_GPIO37   (MX8|OFFSETMASK(13,11)| MULTI_GPIO_FLAG)
#define PIN_GPIO38   (MX8|OFFSETMASK(16,14)| MULTI_GPIO_FLAG)
#define PIN_GPIO39   (MX8|OFFSETMASK(16,14)| MULTI_GPIO_FLAG)
#define PIN_GPIO40   (MX8|OFFSETMASK(16,14)| MULTI_GPIO_FLAG)
#define PIN_GPIO41   (MX8|OFFSETMASK(16,14)| MULTI_GPIO_FLAG)
#define PIN_GPIO42   (MX3|OFFSETMASK(8,6))
#define PIN_GPIO43   (MX3|OFFSETMASK(11,9)| MULTI_GPIO_FLAG)
#define PIN_GPIO44   (MX3|OFFSETMASK(14,12))
#define PIN_GPIO45   (MX3|OFFSETMASK(18,16)| MULTI_GPIO_FLAG)
#define PIN_GPIO46   (MX3|OFFSETMASK(18,16)| MULTI_GPIO_FLAG)
#define PIN_GPIO47   (MX7|OFFSETMASK(2,0)| MULTI_GPIO_FLAG)
#define PIN_GPIO48   (MX7|OFFSETMASK(5,3))
#define PIN_GPIO49   (MX3|OFFSETMASK(25,23))
#define PIN_GPIO50   (MX3|OFFSETMASK(30,28))
#define PIN_GPIO51   (MX4|OFFSETMASK(2,0)| MULTI_GPIO_FLAG)
#define PIN_GPIO52   (MX4|OFFSETMASK(6,4))
#define PIN_GPIO53   (MX4|OFFSETMASK(10,8))
#define PIN_GPIO54   (MX2|OFFSETMASK(2,0))
#define PIN_GPIO55   (MX8|OFFSETMASK(28,26))
#define PIN_GPIO61   (MX5|OFFSETMASK(4,2))
#define PIN_GPIO62   (MX5|OFFSETMASK(7,5))
#define PIN_GPIO63   (MX5|OFFSETMASK(10,8))
#define PIN_GPIO64   (MX5|OFFSETMASK(13,11))
#define PIN_GPIO65   (MX5|OFFSETMASK(16,14)| MULTI_GPIO_FLAG)
#define PIN_GPIO66   (MX5|OFFSETMASK(19,17)| MULTI_GPIO_FLAG)
#define PIN_EEPROM_SDA   (MX5|23)
#define PIN_EEPROM_SCL   (MX5|23)
#define PIN_EEPROM_WP   (MX5|23| MULTI_GPIO_FLAG)
#define PIN_DTMB_CLK   (MX5|1)
#define PIN_DTMB_RST   (MX5|1| MULTI_GPIO_FLAG)
#define PIN_DTMB_PWM   (MX5|1| MULTI_GPIO_FLAG)
#define PIN_DTMB_SDA   (MX5|OFFSETMASK(31,30))
#define PIN_DTMB_SCL   (MX5|OFFSETMASK(31,30))
#define PIN_DTMB_TSCLK   (MX5|OFFSETMASK(29,27))
#define PIN_DTMB_TSVAL   (MX5|OFFSETMASK(29,27))
#define PIN_DTMB_TSSYNC   (MX5|OFFSETMASK(29,27))
#define PIN_DTMB_TSDATA0   (MX5|OFFSETMASK(29,27))

// gpio pin without pinmux
#define PIN_NO_PINMUX       (PMISC | 31)
#define PIN_LAST_PINMUX     (0xffffffff)

#define PIN_HDMI_0_PWR5V 	PIN_NO_PINMUX
#define PIN_HDMI_1_PWR5V 	PIN_NO_PINMUX
#define PIN_HDMI_2_PWR5V 	PIN_NO_PINMUX
#define PIN_HDMI_3_PWR5V 	PIN_NO_PINMUX




//-----------------------------------------------------------------------------
// Macro definitions (IC independant)
//-----------------------------------------------------------------------------
#define PINMUX_FUNCTION0        0
#define PINMUX_FUNCTION1        1
#define PINMUX_FUNCTION2        2
#define PINMUX_FUNCTION3        3
#define PINMUX_FUNCTION4        4
#define PINMUX_FUNCTION5        5
#define PINMUX_FUNCTION6        6
#define PINMUX_FUNCTION7        7


#define IS_VALID_MUX_REG(pin)   (((pin) & (0x0fU << 5)) != 0)
#define OFFSETMASK(ebit, sbit)  ((BITNUM_TO_MASK((ebit) - (sbit)) << 12) | (sbit))
#define MUXHIB(x)               ((x) << 16)
#define MAX_FUNC(pin)           (LO_MAX_FUNC(pin) | (HI_MAX_FUNC(pin) << (MASK_TO_BITNUM(LO_MAX_FUNC(pin))+1)))
#define BITNUM_TO_MASK(m)       (((m) > 1) ? (((m)==2) ? 7 : 15) : (((m)==1) ? 3 : 1))
#define MASK_TO_BITNUM(m)       (((m) > 3) ? (((m)==7) ? 2 : 3) : (((m)==1) ? 0 : 1))
#define MULTI_GPIO_FLAG         (1U << 10)
#define BASIC_MASK              (1U << 12)
 
#define LO_BIT_OFFSET(pin)      ((pin >> 0) & 0x1fU)
#define LO_MUX_REG(pin)         (((pin) >> 5) & 0x0fU)
#define LO_MAX_FUNC(pin)        (((pin) >> 12) & 0x0fU)
#define LO_MASK(pin)            (LO_MAX_FUNC(pin))
#define HI_BIT_OFFSET(pin)      (((pin) >> 16) & 0x1fU)
#define HI_MUX_REG(pin)         (((pin) >> 21) & 0x0fU)
#define HI_MAX_FUNC(pin)        (((pin) >> 28) & 0x0fU)
#define HI_MASK(pin)            (HI_MAX_FUNC(pin))


//-----------------------------------------------------------------------------
// Public function declaration
//-----------------------------------------------------------------------------

/* Pinmux function. */
extern INT32 BSP_PinSet(UINT32 u4PinSel, INT32 i4Func);
extern INT32 BSP_PinGet(UINT32 u4PinSel);
extern INT32 BSP_PinGpioSel(INT32 i4Gpio);
extern INT32 BSP_PinGpioGet(INT32 i4Gpio, UINT32 *pu4PinSel);

#endif // X_PINMUX_H
