/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/

/*-----------------------------------------------------------------------------
 *
 * $Author$
 * $Date  $
 * $RCSfile: drv_hdmi.h,v $
 * $Revision$
 *
 *---------------------------------------------------------------------------*/
#ifndef _DRV_MHL_H_
#define _DRV_MHL_H_

#include "drv_mhlcom.h"
#include "hw_pdwnc.h"
#include "mhl_if.h"

#define BLK_STD_HEADER_LENGHT 2
#define MHL_RCP_KEYCODE_NUM 0x80
#define MHL_RBP_KEYCODE_NUM 0x80

#define BURST_ID_LENGTH 2

#define MHL3_TIMER_PERIOD  10     // ms
#define MHL_MSC_MAX_REPLY_DELAY 500/10 //ms
#define MHL_MSC_ABORT_WAIT 2200/10 //ms

#define MHL_DEV_STATE        0x00
#define MHL_MHL_VERSION      0x22
#define MHL_DEV_CAT          0x31//why?
#define MHL_ADOPTER_ID_H     0x01
#define MHL_ADOPTER_ID_L     0x43
#define MHL_VID_LINK_MODE    0x3F
#define MHL_AUD_LINK_MODE    0x03
#define MHL_VIDEO_TYPE       0x8F
#define MHL_LOG_DEV_MAP      0x41
#define MHL_BANDWIDTH        0x0f
#define MHL_FEATURE_FLAG     0x1f
#define MHL_DEVICE_ID_H      0x00
#define MHL_DEVICE_ID_L      0x01
#define MHL_SCRATCH_PAD_SIZE 0x10
#define MHL_INT_STAT_SIZE    0x33
#define MHL_RESEVED          0x00

//RCPE
#define MHL_RCPE_NO_ERROR 0x00
#define MHL_RCPE_INEFFECTIVE_KEY_CODE 0x01
#define MHL_RCPE_BUSY 0x02

//RAP
#define MHL_RAP_CMD_POLL          0x00  // Poll
#define MHL_RAP_CMD_CONTENTON     0x10    // change to content-on state
#define MHL_RAP_CMD_CONTENTOFF    0x11     // change to content-off state
#define MHL_RAP_CMD_MODE_DOWN     0x20
#define MHL_RAP_CMD_MODE_UP       0x21

#define MHL_RAPK_NOERROR            0x00 // Poll
#define MHL_RAPK_UNRECOGNIZED_CODE  0x01    // unrecognized action code RAP action code
#define MHL_RAPK_UNSUPPORTED        0x02     // unsupport RAP Action code
#define MHL_RAPK_BUSY               0x03     // responder is busy

#define LOG_DEV_MAPX      0
#define ACRFS_DIV_SUPPORT 0

//1st interrupt
#define RX_CBUS_EMSC_INTR_INT (1<<7)
#define RX_CBUS_TDM_INTR_INT  (1<<0)
#define RX_CBUS_CBUS_INTR_INT (1<<1)

//2st interrupt
#define RX_CBUS_INT_0_STAT_CBUS_CONNECTION           (1<<0)
#define RX_CBUS_INT_0_STAT_CBUS_MSC_CMD_DONE         (1<<1)
#define RX_CBUS_INT_0_STAT_CBUS_HPD_CHANGE            (1<<2)
#define RX_CBUS_INT_0_STAT_CBUS_WRITE_STATE_RECV     (1<<3)
#define RX_CBUS_INT_0_STAT_CBUS_MSC_MSG_RECV         (1<<4)
#define RX_CBUS_INT_0_STAT_CBUS_WRITE_BURST_RECV     (1<<5)
#define RX_CBUS_INT_0_STAT_CBUS_SET_INT_RECV         (1<<6)
#define RX_CBUS_INT_0_STAT_CBUS_MSC_MSG_NACK_DONE     (1<<7)

#define RX_CBUS_INT_1_STAT_CBUS_MSC_HEARTBEAT_MAX_FAIL  (1<<0x10)
#define RX_CBUS_INT_1_STAT_CBUS_DDC_ABORT               (1<<0x12)
#define RX_CBUS_INT_1_STAT_CBUS_MSC_RECV_ERROR_RES       (1<<0x13)
#define RX_CBUS_INT_1_STAT_CBUS_CBUS_PACKET_RECV        (1<<0x15)
#define RX_CBUS_INT_1_STAT_CBUS_MSC_RECV_ERROR_REQ      (1<<0x16)
#define RX_CBUS_INT_1_STAT_CBUS_MHL_CABLE_CONNECT       (1<<0x17)

//MSC_MSGE
#define MSC_MSGE_NOERROR              0x00
#define MSC_MSGE_INVALID_SUB_COMMAND  0x01

#define MHL3_SUPPORT 0

enum
{
    CONNECTED_RDY = 0x00,
    LINK_MODE =0x01,
    VERSION_STAT = 0x02,
    NUM_STAT_REGS
};

enum DEV_CAP_T
{
    DEV_STATE_IDX,
    MHL_VER_IDX,
    DEV_CAT_IDX,
    ADOPTER_ID_H_IDX,
    ADOPTER_ID_L_IDX,
    VID_LINK_MODE_IDX,
    AUD_LINK_MODE_IDX,
    VIDEO_TYPE_IDX,
    LOG_DEV_MAP_IDX,
    TMDS_BW_IDX,
    FEAT_FLAG_IDX,
    DEV_ID_H,
    DEV_ID_L,
    SCRATPAD_SIZE_IDX,
    INT_STAT_SIZE
};
enum
{
    MHL_MSC_MSGE                = 0x02,
    MHL_MSC_MSG_RCP             = 0x10,     // RCP sub-command
    MHL_MSC_MSG_RCPK            = 0x11,     // RCP Acknowledge sub-command
    MHL_MSC_MSG_RCPE            = 0x12,     // RCP Error sub-command

    MHL_MSC_MSG_RAP             = 0x20,     // RAP sub-command
    MHL_MSC_MSG_RAPK            = 0x21,     // RAP Acknowledge sub-command

    MHL_MSC_MSG_UCP             = 0x30,
    MHL_MSC_MSG_UCPK            = 0x31,
    MHL_MSC_MSG_UCPE            = 0x32,
};

typedef enum
{
    BURST_3D_VIC = 0x0010,
    BURST_3D_DTD = 0x0011,
}MhlRxBurstId_t;

typedef struct
{
    UINT8 u1Index;
    UINT8 u1VicDtd;
    UINT8 u13dTB: 1;
    UINT8 u13dLR: 1;
    UINT8 u13dFS: 1;
}MhlRx3dDescription_t;

typedef struct
{
    UINT8 u1High;
    UINT8 u1Low;
}MhlRxVideoDescripter_t;

typedef struct
{
    UINT8 burstIdH;
    UINT8 burstIdL;
    UINT8 u1CheckSum;
    UINT8 u1TotEnt;
    UINT8 u1Seq;
    UINT8 u1NumEnt;
    MhlRxVideoDescripter_t videoDescripter[5];
}MhlRxVideoBurstDescripter_t;

typedef struct
{
    BOOL bMhlCableConnected;
    BOOL bCbusConnected;
    BOOL bHpdSent;
    BOOL bPathEnSent;
    BOOL bMhlVerStatSent;
    BOOL bDcapRdySent;
    BOOL bDcapChgSent;
    BOOL bIsEdidReady;
}MhlRxCbus_t;

typedef struct
{
    MhlRxCbusMode_t eCbusMode;
    BOOL bMhlLastPpMode;
}MhlBridgeHdmiCtx_t;

typedef struct
{
    INT32 i4VbusCtrlGpio;
    INT32 i4OcpDetGpio;

    UINT8 u1LocalDevCaps[MHL_MAX_BUFFER_SIZE];
    UINT8 u1PeerDevCap[MHL_MAX_BUFFER_SIZE];
    UINT8 u1LastWriteBurstOut[MHL_SCRATCHPAD_SIZE];
    UINT8 u1DevStatus[NUM_STAT_REGS];

    pWRTIEBURSTCALLBACK pLastWriteBurstCallBack;

    UINT32 u4PendingEvent;

    BOOL bReadDevCap;//if peer device capability register has been read out
    BOOL bReadingPeerDevCap;

    BOOL bAbortWait;
    BOOL bDcapRdy;
    BOOL bScratchPadBusy;
    BOOL bNeedWriteBurst;

    BOOL bPathEnRecv;
    BOOL bPpModeRecv;
    BOOL bContentOff;
    BOOL bRcpSupp;
    BOOL bRapSupp;
    BOOL bSpSupp;
    BOOL bUcpSendSupp;
    BOOL bUcpRecvSupp;
    BOOL bXvYccSupp;
    BOOL bRbpSupp;

    UINT8 u1CbusTimerCnt;
    UINT8 u1DcapRdyMoniterCnt;
    UINT8 u1Mhl3VersionCnt;
    UINT16 u2Mhl3AbortWaitCnt;
    BOOL bMhl3VersionTimeOut;
    MhlRxCbusMode_t eCbusMode;
    MHL_RX_CBUS_OUT_QUEUE_t outCommand;
    MHL_RX_CBUS_IN_QUEUE_t inCommand;
    MhlRxCbus_t rxCbusSta;
    MHL_RX_CBUS_CALLBACK_PARAMETERS_t cbusCallbackParameter;

    MHL_RX_CBUS_WRITE_BURST_BUFFER_t writeBurstOutQueue;
    MHL_RX_CBUS_WRITE_BURST_BUFFER_t writeBurstInQueue;
}MhlRxCbusObj_t;

#define FLD_HDMI_2_HPD_CBUS Fld(3,12,AC_MSKB1)//[14:12]
#define ENABLE_PINMUX_TO_CBUS() ((void)vIO32WriteFldAlign(PDWNC_PINMUX4,1,FLD_HDMI_2_HPD_CBUS))
#define DISABLE_PINMUX_TO_CBUS() ((void)vIO32WriteFldAlign(PDWNC_PINMUX4,0,FLD_HDMI_2_HPD_CBUS))

#ifndef AD_ECBUS_0_MON_CK
#define AD_ECBUS_0_MON_CK (0x66)
#endif

#ifndef AD_HDMI_0_DEEP680M_CK
#define AD_HDMI_0_DEEP680M_CK (0x6b)
#endif

#ifndef AD_HDMI_0_MON_CK
#define AD_HDMI_0_MON_CK (0x7d)
#endif

extern UINT8 u1MHL3CbusGetPeerMhlVersion(void);
extern BOOL fgCBUSGetDiscoveryOK(void);
extern UINT8 u1CbusGetOcpStatus(void);
extern MhlRxCbusMode_t mMHL3GetCbusMode(void);
extern void vMHL3SetVbusOutput(UINT8 u1En);
extern UINT8 bIsMhlSource(UINT8 bPath);
extern BOOL fgMHL3GetAbortWait(void);
extern void vMHL3SetAbortWait(BOOL bEn);
extern BOOL fgMHL3GetMhlCableStatus(void);
extern void vMHL3Init(void);
extern void vMHL3CbusRequestSendSratchPad(CBUS_MSG_DESCRIPTION_T *msg);
extern void vMHL3CbusSendCommand(MHL_RX_CBUS_MSC_CMD_t CbusMscCommand,UINT8* pArgument,UINT8 u1Length,pMHL3CommandReport pCommandReport);
extern UINT8 bMHL3GetPeerDevCap(UINT8 index);
extern UINT8 u1MHL3CbusGetLocalMhlVersion(void);
extern void vMHL3EnCbusSchedComm(BOOL fgEn);
extern void vMHL3CbusMscMsgRapK(UINT8 u1StatusCode,pMHL3CommandReport pCommandReport);
#endif
