/******************************************************************************
 *
 * Copyright 2010, Silicon Image, Inc.  All rights reserved.
 * No part of this work may be reproduced, modified, distributed, transmitted,
 * transcribed, or translated into any language or computer format, in any form
 * or by any means without written permission of: Silicon Image, Inc., 1060
 * East Arques Avenue, Sunnyvale, California 94085
 *
 *****************************************************************************/

/**
 * @file si_apiCbus.c
 *
 * Cbus function of SiI1292, including Cbus driver and Cbus Req Queue operation
 *
 * $Author: Silicon Image, firmware team
 * $Rev: 0.3
 * $Date: Apr. 2010
 *
 *****************************************************************************/

/***** #include statements ***************************************************/

#include "si_RegioCbus.h"
#include "si_regio.h"
#include "si_hal.h"
#include "si_datatypes.h"
#include "si_cp1292.h"
#include "si_cbusDefs.h"
#include "si_cbus_regs.h"
#include "si_cbus.h"
#include "si_apiRCP.h"
#include "si_apiRAP.h"
#include "si_apiMSC.h"
#include "si_apiConfigure.h"
#include "si_apiCbus.h"
#include "si_api1292.h"
#include "si_1292regs.h"
#include "drv_sil_if.h"

uint8_t g_u3DstateMachine = STEP_0_3D_IDLE;
_3D_SUPPORT_DTD_VIC_LIST_T g_3D_SUPPORT_DTD_VIC_LIST;

/***** local variable declarations *******************************************/

uint8_t ScratchpadAreaIn[SCRATCHPAD_SIZE];
uint8_t ScratchpadAreaOut[SCRATCHPAD_SIZE];

static cbusChannelState_t l_cbus[1];

static uint8_t l_PortToChannel[1]            = { CBUS_NOCHANNEL} ;
static uint8_t l_ChannelToPort[1]        = { CBUS_NOPORT };

static bool_t rcp_reserved_list[RCP_KEYCODE_NUM] =
{
    /*  00    01    02   03    04    05    06    07   08     09    0A    0B    0C    0D    0E   0F */
   false,  false,  false,  false,  false,  false,  false,  false,  false,  false,  false,  false,  false,  false,  true,  true,		// 00
   true,  true,  true,  true,  true,  true,  true,  true,  true,  true,  true,  true,  true,  true,  true,  true,		// 01
   false,  false,  false,  false,  false,  false,  false,  false,  false,  false,  false,  false,  false,  true,  true,  true,		// 02
   false,  false,  false,  false,  false,  false,  false,  false,  false,  true,  true,  true,  true,  true,  true,  true,		// 03
   true,  false,  false,  false,  false,  false,  false,  false,  false,  false,  false,  false,  false,  true,  true,  true,		// 04
   false,  false,  true,  true,  true,  true,  true,  true,  true,  true,  true,  true,  true,  true,  true,  true,		// 05
   false,  false,  false,  false,  false,  false,  false,  false,  false,  true,  true,  true,  true,  true,  true,  true,		// 06
   true,  false,  false,  false,  false,  false,  true,  true,  true,  true,  true,  true,  true,  true,  false,  true,		// 07
};


/***** local function prototypes *********************************************/
//void           SI_3D_EDID_Configuration_VIC_DTD(void); //Temporary function.
uint8_t CbusWriteCommand ( int channel, cbus_out_queue_t *pReq  );

/***** public functions *******************************************************/

/*****************************************************************************/

/**
 *  Cbus Queue operation: Get In-queue's active Req's Status
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             Return reqStatus
 *  @retval             0, CBUS_REQ_IDLE
 *  @retval             1, CBUS_REQ_PENDING
 *  @retval             2, CBUS_REQ_WAITING
 *
 *****************************************************************************/
uint8_t SI_CbusIQReqStatus ( uint8_t channel )
{
    return (l_cbus[ channel].i_queue[ l_cbus[ channel].i_activeIndex].reqStatus);
}

#if 0 //not used

/*****************************************************************************/

/**
 *  Cbus Queue operation: Set In-queue's active Req's Status
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          reqStatus		The value will be set in active Req's Status
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusIQSetReqStatus( uint8_t channel, uint8_t reqStatus )
{
    l_cbus[ channel].i_queue[ l_cbus[ channel].i_activeIndex].reqStatus = reqStatus;
}

#endif

/*****************************************************************************/

/**
 *  Cbus Queue operation: Get Out-queue's active Req's Status
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             Return reqStatus
 *  @retval             0, CBUS_REQ_IDLE
 *  @retval             1, CBUS_REQ_PENDING
 *  @retval             2, CBUS_REQ_WAITING
 *
 *****************************************************************************/
uint8_t SI_CbusOQReqStatus ( uint8_t channel )
{
    return (l_cbus[ channel].o_queue[ l_cbus[ channel].o_activeIndex].reqStatus);
}

/*****************************************************************************/

/**
 *  Cbus Queue operation: Set Out-queue's active Req's Status
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          reqStatus		The value will be set in active Req's Status
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusOQSetReqStatus( uint8_t channel, uint8_t reqStatus )
{
    l_cbus[ channel].o_queue[ l_cbus[ channel].o_activeIndex].reqStatus = reqStatus;
}

/*****************************************************************************/

/**
 *  Cbus Queue operation: Get In-queue's active Req's command
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             Return the opcode in MSC_MSG
 *  @retval             0x10, MHL_MSC_MSG_RCP
 *  @retval             0x11, MHL_MSC_MSG_RCPK
 *  @retval             0x12, MHL_MSC_MSG_RCPE
 *  @retval             0x20, MHL_MSC_MSG_RAP
 *  @retval             0x21, MHL_MSC_MSG_RAPK
 *
 *****************************************************************************/
uint8_t SI_CbusIQReqCmd ( uint8_t channel )
{
    return (l_cbus[ channel].i_queue[ l_cbus[ channel].i_activeIndex].command);
}

/*****************************************************************************/

/**
 *  Cbus Queue operation: Get Out-queue's active Req's command
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             Return the MSC command
 *  @retval             0x60, MSC_WRITE_STAT / MSC_SET_INT
 *  @retval             0x61, MSC_READ_DEVCAP
 *  @retval             0x62, MSC_GET_STATE
 *  @retval             0x63, MSC_GET_VENDOR_ID
 *  @retval             0x64, MSC_SET_HPD
 *  @retval             0x65, MSC_CLR_HPD
 *  @retval             0x66, MSC_SET_CEC_CAP_ID
 *  @retval             0x67, MSC_GET_CEC_CAP_ID
 *  @retval             0x68, MSC_MSG
 *  @retval             0x69, MSC_GET_VS_ABORT
 *  @retval             0x6A, MSC_GET_DDC_ABORT
 *  @retval             0x6B, MSC_GET_MSC_ABORT
 *  @retval             0x6C, MSC_WRITE_BURST
 *
 *****************************************************************************/
uint8_t SI_CbusOQReqCmd( uint8_t channel )
{
    return (l_cbus[ channel].o_queue[ l_cbus[ channel].o_activeIndex].command);
}

/*****************************************************************************/

/**
 *  Cbus Queue operation: Get In-queue's active Req's data
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             Return the KeyID in MSC_MSG
 *
 *****************************************************************************/
uint8_t SI_CbusIQReqData ( uint8_t channel )
{
    return (l_cbus[ channel].i_queue[ l_cbus[ channel].i_activeIndex].msgData);
}

/*****************************************************************************/

/**
 *  Cbus Queue operation: Get Out-queue's active Req's msgData[0]
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             Return the data of MSC command
 *
 *****************************************************************************/
uint8_t SI_CbusOQReqData0( uint8_t channel )
{
    return (l_cbus[ channel].o_queue[ l_cbus[ channel].o_activeIndex].msgData[0]);
}

/*****************************************************************************/

/**
 *  Cbus Queue operation: Get Out-queue's active Req's msgData[1]
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             Return the data of MSC command
 *
 *****************************************************************************/
uint8_t SI_CbusOQReqData1( uint8_t channel )
{
    return (l_cbus[ channel].o_queue[ l_cbus[ channel].o_activeIndex].msgData[1]);
}

#if 0 //not used

/*****************************************************************************/

/**
 *  Cbus Queue operation: Get Out-queue's active Req's msgData[2]
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             Return the data of MSC command
 *
 *****************************************************************************/
uint8_t SI_CbusOQReqData2( uint8_t channel )
{
    return (l_cbus[ channel].o_queue[ l_cbus[ channel].o_activeIndex].msgData[2]);
}

#endif

/*****************************************************************************/

/**
 *  Cbus Queue operation: Get In-queue's active Req
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             Return the pointer to the req structure
 *
 *****************************************************************************/
cbus_in_queue_t *SI_CbusIQActiveReq ( uint8_t channel )
{
    return (&l_cbus[ channel].i_queue[ l_cbus[ channel].i_activeIndex]);
}

/*****************************************************************************/

/**
 *  Cbus Queue operation: Get Out-queue's active Req
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             Return the pointer to the req structure
 *
 *****************************************************************************/
cbus_out_queue_t *SI_CbusOQActiveReq( uint8_t channel )
{
    return (&l_cbus[ channel].o_queue[ l_cbus[ channel].o_activeIndex]);
}

#if 0 //not used

/*****************************************************************************/

/**
 *  Cbus Queue operation: Get In-queue's active Req's timeout value
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             Return the value of timeout
 *
 *****************************************************************************/
uint32_t SI_CbusIQReqTimeout ( uint8_t channel )
{
    return (l_cbus[ channel].i_queue[ l_cbus[ channel].i_activeIndex].timeout);
}

/*****************************************************************************/

/**
 *  Cbus Queue operation: Get Out-queue's active Req's timeout value
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             Return the value of timeout
 *
 *****************************************************************************/
uint32_t SI_CbusOQReqTimeout( uint8_t channel )
{
    return (l_cbus[ channel].o_queue[ l_cbus[ channel].o_activeIndex].timeout);
}

#endif

/*****************************************************************************/

/**
 *  Cbus Queue operation: Set Out-queue's active Req's timeout value
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          value			timeout value
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusOQSetReqTimeout( uint8_t channel, uint32_t value)
{
    l_cbus[ channel].o_queue[ l_cbus[ channel].o_activeIndex].timeout = value;
}

/*****************************************************************************/

/**
 *  Cbus Queue operation: Get Out-queue's active Req's retry value
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             Return the value of retry
 *
 *****************************************************************************/
uint8_t SI_CbusOQReqRetry( uint8_t channel )
{
    return (l_cbus[ channel].o_queue[ l_cbus[ channel].o_activeIndex].retry);
}

/*****************************************************************************/

/**
 *  Cbus Queue operation: Reduce Out-queue's active Req's retry value by 1
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusOQReduceReqRetry( uint8_t channel )
{
    l_cbus[ channel].o_queue[ l_cbus[ channel].o_activeIndex].retry--;
}

#if 0 //not used

/*****************************************************************************/

/**
 *  Cbus Queue operation: Get Out-queue's active Req's CecReq value
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             Return the value of CecReq
 *
 *****************************************************************************/
bool_t SI_CbusOQGetCecReq( uint8_t channel )
{
    return (l_cbus[ channel].o_queue[ l_cbus[ channel].o_activeIndex].cecReq);
}

/*****************************************************************************/

/**
 *  Cbus Queue operation: Set Out-queue's active Req's CecReq value
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusOQSetCecReq( uint8_t channel, bool_t value )
{
    l_cbus[ channel].o_queue[ l_cbus[ channel].o_activeIndex].cecReq = value;
}

#endif

/*****************************************************************************/

/**
 *  Cbus Queue operation: Clean In-queue's active Req.
 *  					    Set the reqStatus to IDLE and timeout value to 0
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusIQCleanActiveReq( uint8_t channel )
{
    cbus_in_queue_t *pReq;

    pReq = SI_CbusIQActiveReq(channel);

    pReq->reqStatus = CBUS_REQ_IDLE;
    pReq->timeout   = 0;
    pReq->timer_set = false;
}

/*****************************************************************************/

/**
 *  Cbus Queue operation: Clean Out-queue's active Req.
 *  					    Set the reqStatus to IDLE, retry and timeout value to 0
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusOQCleanActiveReq( uint8_t channel )
{
    cbus_out_queue_t * pReq;

    pReq = SI_CbusOQActiveReq(channel);

    pReq->reqStatus = CBUS_REQ_IDLE;
    pReq->retry   = 0;
    pReq->timeout = 0;
    pReq->vip = false;
    pReq->timer_set = false;
    pReq->cecReq = false;
    pReq->dataRetHandler  = NULL;
   	pReq->sRetHandlerName = NULL;
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Check if the command is the ignore command by the peer
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          kerID			RCP or RAP's Key ID
 *  @param[in]          direction		Cbus In or Cbus Out
 *
 *  @return             ignore or not
 *  @retval             true: ignore command
 *  @retval             false: normal command
 *****************************************************************************/
#ifdef SUPPORT_MSCMSG_IGNORE_LIST
bool_t SI_CbusKeyIDCheck(uint8_t channel, uint8_t keyID, uint8_t direction)
#else
bool_t SI_CbusKeyIDCheck(uint8_t keyID, uint8_t direction)
#endif
{
	bool_t ret = false;
#ifdef SUPPORT_MSCMSG_IGNORE_LIST
    if (direction == CBUS_IN)
    {
        ret = (l_cbus[channel].i_mscmsg_ignore_list[keyID]) | rcp_reserved_list[keyID];
    }
    else if (direction == CBUS_OUT)
    {
        ret = (l_cbus[channel].o_mscmsg_ignore_list[keyID]) | rcp_reserved_list[keyID];
    }

#else
    if (direction == CBUS_IN)
    {
        ret = rcp_reserved_list[keyID];
    }
    else if (direction == CBUS_OUT)
    {
        ret = rcp_reserved_list[keyID];
    }
#endif


    return (ret);
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Get the value of connect_wait
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             connect_wait
 *  @retval             true: this step has been done
 *  @retval             false: this step hasn't been done
 *
 *****************************************************************************/
bool_t SI_CbusGetConnectWait( uint8_t channel )
{
    return (l_cbus[ channel].connect_wait);
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Set the value of connect_wait
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          value			value of connect_wait
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusSetConnectWait( uint8_t channel, bool_t value )
{
    l_cbus[ channel].connect_wait = value;
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Get the value of hpd_state
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             hpd_state
 *  @retval             true: hpd is set
 *  @retval             false: hpd is cleared
 *
 *****************************************************************************/
bool_t SI_CbusGetHpdState( uint8_t channel )
{
    return (l_cbus[ channel].hpd_state);
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Set the value of hpd_state
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          value			value of hpd_state
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusSetHpdState( uint8_t channel, bool_t value )
{
    l_cbus[ channel].hpd_state = value;
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Get the value of grt_wrt
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI9292
 *
 *  @return             path_enable
 *  @retval             true: connect path enabled
 *  @retval             false: connect path disabled
 *
 *****************************************************************************/
bool_t SI_CbusGetGrtWrt( uint8_t channel )
{
    return (l_cbus[ channel].grt_wrt);
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Set the value of grt_wrt
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI9292
 *  @param[in]          value			value of path_enable
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusSetGrtWrt( uint8_t channel, bool_t value )
{
    l_cbus[ channel].grt_wrt = value;
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Get the value of path_enable
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             path_enable
 *  @retval             true: connect path enabled
 *  @retval             false: connect path disabled
 *
 *****************************************************************************/
bool_t SI_CbusGetPathEnable( uint8_t channel )
{
    return (l_cbus[ channel].path_enable);
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Set the value of path_enable
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          value			value of path_enable
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusSetPathEnable( uint8_t channel, bool_t value )
{
    l_cbus[ channel].path_enable = value;
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Get the value of dcap_rdy
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI9292
 *
 *  @return             connect_ready
 *  @retval             true: peer dcap reg ready
 *  @retval             false: peer dcap reg not ready
 *
 *****************************************************************************/
bool_t SI_CbusGetDcapRdy( uint8_t channel )
{
    return (l_cbus[ channel].dcap_rdy);
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Set the value of dcap_rdy
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI9292
 *  @param[in]          value			value of dcap_rdy
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusSetDcapRdy( uint8_t channel, bool_t value )
{
    l_cbus[ channel].dcap_rdy = value;
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Get the value of connect_ready
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             connect_ready
 *  @retval             true: connect ready
 *  @retval             false: connect not ready
 *
 *****************************************************************************/
bool_t SI_CbusGetConnectReady( uint8_t channel )
{
    return (l_cbus[ channel].connect_ready);
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Set the value of connect_ready
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          value			value of connect_ready
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusSetConnectReady( uint8_t channel, bool_t value )
{
    l_cbus[ channel].connect_ready = value;
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Get the value of abort_wait
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI9292
 *
 *  @return             abort_wait value
 *  @retval             true: need to do abort wait
 *  @retval             false: no abort wait
 *
 *****************************************************************************/
bool_t SI_CbusGetAbortWait( uint8_t channel )
{
    return (l_cbus[ channel].abort_wait);
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Set the value of abort_wait
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI9292
 *  @param[in]          value			value of abort_wait
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusSetAbortWait( uint8_t channel, bool_t value )
{
    l_cbus[ channel].abort_wait = value;

    if (value)
    {
        l_cbus[ channel].base_time = timer_count;
    }
    else
    {
        l_cbus[ channel].base_time = 0;
    }
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Get the value of read_info
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             read_info
 *  @retval             true: this step has been done
 *  @retval             false: this step hasn't been done
 *
 *****************************************************************************/
uint8_t SI_CbusGetReadInfo( uint8_t channel )
{
    return (l_cbus[ channel].read_info);
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Set the value of read_info
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          value			value of read_info
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusSetReadInfo( uint8_t channel, uint8_t value )
{
    l_cbus[ channel].read_info = value;
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Set the value of rcp_support
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          value			value of rcp_support
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusSetRcpSupport( uint8_t channel, bool_t value )
{
    l_cbus[ channel].rcp_support = value;
}



/*****************************************************************************/

/**
 *  Cbus data structure operation: Set the value of rap_support
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          value			value of rap_support
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusSetRapSupport( uint8_t channel, bool_t value )
{
    l_cbus[ channel].rap_support = value;
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: initial the cbus parameters, set all to default
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusInitParam( uint8_t channel )
{
    uint8_t i;

    l_cbus[channel].connect_wait = false;
    l_cbus[channel].hpd_state     = false;
    l_cbus[channel].path_enable   = false;
    l_cbus[channel].connect_ready = false;
    l_cbus[channel].dcap_rdy  = false;
    l_cbus[channel].read_info = 0;
    l_cbus[channel].grt_wrt = false;
    l_cbus[channel].rcp_support = true;
    l_cbus[channel].rap_support = true;

    for (i = 0; i < CBUS_MAX_COMMAND_QUEUE; i++)
    {
        l_cbus[channel].o_queue[i].reqStatus = CBUS_REQ_IDLE;
        l_cbus[channel].o_queue[i].cecReq = false;
        l_cbus[channel].o_queue[i].vip = false;
        l_cbus[channel].o_queue[i].timer_set = false;
        l_cbus[channel].o_queue[i].base_time = 0;
        l_cbus[channel].o_queue[i].timeout = 0;
        l_cbus[channel].o_queue[i].dataRetHandler  = NULL;
        l_cbus[channel].o_queue[i].sRetHandlerName = NULL;
        l_cbus[channel].i_queue[i].reqStatus = CBUS_REQ_IDLE;
        l_cbus[channel].i_queue[i].timer_set = false;
        l_cbus[channel].i_queue[i].base_time = 0;
        l_cbus[channel].i_queue[i].timeout = 0;
    }

    memset(PeerDevCap, 0, 16);

	g_3D_WB_Processing = false;
	g_Non3D_WB_Processing = false;

}

/*****************************************************************************/

/**
 *  Cbus queue operation: Copy the prepared data into Out-Queue
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          index			the position of the queue
 *  @param[in]          pReq			the point of the prepared Req
 *
 *  @return             void
 *
 *****************************************************************************/
static void CopyDataInOQ(uint8_t channel, uint8_t index, cbus_out_queue_t *pReq )
{
    //DEBUG_PRINT(MSG_DBG, ("CBUS:: CopyDataInOQ \n"));
    memcpy(&l_cbus[ channel].o_queue[index], pReq, sizeof(cbus_out_queue_t));
}

/*****************************************************************************/

/**
 *  Cbus operation: The MSC command abort handler
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          abortReason	MSC abort reason
 *
 *  @return             void
 *
 *****************************************************************************/
static void SI_CbusOQReqAbort(uint8_t channel, uint8_t abortReason)
{
    //DEBUG_PRINT(MSG_DBG, ("CBUS:: Abort package received! Wait 2s ...\n"));
    SI_CbusSetAbortWait(channel, true);

    if (abortReason & 0x68) // not a hotplug or a HB or undefined command
    {
        SI_CbusOQCleanActiveReq(channel);
        return;
    }

    {
        cbus_out_queue_t *pReq;

        pReq = SI_CbusOQActiveReq(channel);

        if (pReq->retry != 0)
        {
            pReq->retry--;
            pReq->reqStatus = CBUS_REQ_PENDING;
        }
        else
        {
            SI_CbusOQCleanActiveReq(channel);
        }
    }
}

/*****************************************************************************/

/**
 *  Cbus Queue operation: Push the prepared data into Out-queue
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          pReq			The pointer of the prepared Req data
 *  @param[in]          vip			define if the Req is a vip one
 *
 *  @return             result
 *  @retval             0: SUCCESS
 *  @retval             0xA: ERROR_QUEUE_FULL
 *
 *****************************************************************************/
uint8_t SI_CbusPushReqInOQ( uint8_t channel, cbus_out_queue_t *pReq, bool_t vip )
{
    uint8_t result = ERROR_QUEUE_FULL;
    uint8_t status;

    if ((pReq->command != MSC_MSG) && (pReq->dataRetHandler == NULL))
    {
        DEBUG_PRINT(MSG_ALWAYS, ("CBUS:: Error:Missing Return data handler!\n"));
        return (ERROR_RET_HANDLER);
    }

    status = SI_CbusOQReqStatus(channel);

    if (status == CBUS_REQ_IDLE)
    {
        CopyDataInOQ(channel, l_cbus[channel].o_activeIndex, pReq);
        l_cbus[ channel].o_queue[ l_cbus[channel].o_activeIndex].reqStatus = CBUS_REQ_PENDING;
        l_cbus[ channel].o_queue[ l_cbus[channel].o_activeIndex].vip = vip;
        result = STATUS_SUCCESS;
    }
    else
    {
        uint8_t queueIndex;

        for (queueIndex = 0; queueIndex < CBUS_MAX_COMMAND_QUEUE; queueIndex++)
        {
            if (l_cbus[ channel].o_queue[ queueIndex].reqStatus == CBUS_REQ_IDLE)
            {
                CopyDataInOQ(channel, queueIndex, pReq);
                l_cbus[ channel].o_queue[ queueIndex].reqStatus = CBUS_REQ_PENDING;
                l_cbus[ channel].o_queue[ queueIndex].vip = vip;
                result = STATUS_SUCCESS;
                break;
            }
        }
    }

    if (result != STATUS_SUCCESS)
    {
        if (vip)
        {
            uint8_t queueIndex;

            for (queueIndex = 0; queueIndex < CBUS_MAX_COMMAND_QUEUE; queueIndex++)
            {
                if (queueIndex != l_cbus[channel].o_activeIndex)
                {
                    if (l_cbus[ channel].o_queue[ queueIndex].vip == false)
                    {
                        CopyDataInOQ(channel, queueIndex, pReq);
                        l_cbus[ channel].o_queue[ queueIndex].reqStatus = CBUS_REQ_PENDING;
                        l_cbus[ channel].o_queue[ queueIndex].vip = true;
                        result = STATUS_SUCCESS;
                        DEBUG_PRINT(MSG_DBG, ("CBUS:: Vip Req forces entering the queue\n"));
                        break;
                    }
                }
            }
        }
    }

    if (result != STATUS_SUCCESS)
    {
        uint8_t queueIndex;
        DEBUG_PRINT(MSG_DBG, ("CBUS:: Queue Full!\n"));

        for (queueIndex = 0; queueIndex < CBUS_MAX_COMMAND_QUEUE; queueIndex++)
        {
            DEBUG_PRINT(MSG_DBG, ("CBUS:: que[%d].command = %x ; offset[0] = %x ; offset[1] = %x\n", (int)queueIndex,
                                  (int)l_cbus[ channel].o_queue[ queueIndex].command,
                                  (int)l_cbus[ channel].o_queue[ queueIndex].msgData[0],
                                  (int)l_cbus[ channel].o_queue[ queueIndex].msgData[1]));
        }
    }

    return (result);
}

#ifdef SUPPORT_MSCMSG_IGNORE_LIST

/*****************************************************************************/

/**
 *  Cbus data structure operation: Push the Key ID into ignore list
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          keyID			Key ID of RCP or RAP
 *  @param[in]          direction		CBUS_IN or CBUS_OUT
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusPushKeytoIgnoreList(uint8_t channel, uint8_t keyID, uint8_t direction)
{
    if (keyID >= 0x80) //add error checking
    {
        DEBUG_PRINT(MSG_DBG, ("please check your keyID(%x) >= 0x80 , can not put into ignore_list(%d)\n", (int)keyID,
                              (int)direction));
        return;
    }

    DEBUG_PRINT(MSG_DBG, ("add key %x into ignore_list(%d)!\n", (int)keyID, (int)direction));

    if (direction == CBUS_IN)
    {
        l_cbus[channel].i_mscmsg_ignore_list[keyID] = true;
    }
    else if (direction == CBUS_OUT)
    {
        l_cbus[channel].o_mscmsg_ignore_list[keyID] = true;
    }
}

/*****************************************************************************/

/**
 *  Cbus data structure operation: Push the Key ID into ignore list
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          keyID			Key ID of RCP or RAP
 *  @param[in]          direction		CBUS_IN or CBUS_OUT
 *
 *  @return             void
 *
 *****************************************************************************/
void SI_CbusResetMscMsgIgnoreList(uint8_t channel, uint8_t direction)
{
    int i;

    if (direction == CBUS_IN)
    {
        for (i = 0; i < MSC_MSG_MAX_IGNORE_CMD; i++)
        {
            l_cbus[channel].i_mscmsg_ignore_list[i] = false;
        }
    }
    else if (direction == CBUS_OUT)
    {
        for (i = 0; i < MSC_MSG_MAX_IGNORE_CMD; i++)
        {
            l_cbus[channel].o_mscmsg_ignore_list[i] = false;
        }
    }
}

#endif

/*****************************************************************************/

/**
 *  Cbus operation: The MSC command return data handler
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          uData			MSC command return data
 *
 *  @return             result
 *  @retval             0: SUCCESS
 *  @retval             0xD: ERROR_RET_HANDLER
 *
 *****************************************************************************/
static uint8_t SI_CbusRetDataHandler(uint8_t channel, uint8_t uData)
{
    uint8_t command, reqStatus;
    bool_t ret = true;
    uint8_t result = SUCCESS;

    l_cbus[ channel].o_queue[l_cbus[ channel].o_activeIndex].timeout = 0;   // clean timeout count

    command   = SI_CbusOQReqCmd(channel);
    reqStatus = SI_CbusOQReqStatus(channel);

    if (reqStatus != CBUS_REQ_WAITING)
    {
        DEBUG_PRINT(MSG_DBG, ("CBUS:: reqStatus is NOT WAITING , it shouled be ignored \n", (int)reqStatus));
        return (result);
    }

    if (command == MSC_MSG)
    {
        result = SI_CbusMscMsgTransferDone(channel);
    }
    else
    {
        if (l_cbus[ channel].o_queue[ l_cbus[ channel].o_activeIndex].dataRetHandler)
        {
			DEBUG_PRINT(MSG_DBG, ("CBUS:: dataRetHandler =%x\n",(int)l_cbus[ channel].o_queue[ l_cbus[ channel].o_activeIndex].dataRetHandler));
            ret = l_cbus[ channel].o_queue[ l_cbus[ channel].o_activeIndex].dataRetHandler(channel, uData);
        }
        else
        {
            DEBUG_PRINT(MSG_DBG, ("CBUS:: dataRetHandler is NULL ,please check your code\n"));
        }
    }

    if (!ret)
    {
        result = ERROR_RET_HANDLER;
    }

    return (result);
}


/*****************************************************************************/
/** 
 *  Cbus operation: The MSC MSG handler, process the incoming MSC_MSG
 *  
 * 				
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  
 *  @return             result
 * 
 *****************************************************************************/
static uint8_t SI_CbusMscMsgHandler(uint8_t channel)
{
    uint8_t result = SUCCESS;
    uint8_t command;

    command = SI_CbusIQReqCmd(channel);

    if ((command == MHL_MSC_MSG_RCP) || (command == MHL_MSC_MSG_RCPK) || (command == MHL_MSC_MSG_RCPE))
    {
        result = SI_RcpHandler(channel);
    }
    else if ((command == MHL_MSC_MSG_RAP) || (command == MHL_MSC_MSG_RAPK))
    {
        result = SI_RapHandler(channel);
    }

    return (result);
}

/*****************************************************************************/

/**
 *  Cbus operation: The MSC MSG timeout handler
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *  @param[in]          direction		Cbus In or Cbus Out
 *
 *  @return             result
 *  @retval		0: SUCCESS
 *  @retval		0x9: ERROR_WRONG_DIRECTION
 *
 *****************************************************************************/
uint8_t SI_CbusMscMsgTimeoutHandler(uint8_t channel, uint8_t direction)
{
    uint8_t result = SUCCESS;
    uint8_t command;

    if (direction == CBUS_IN)
    {
        command = SI_CbusIQReqCmd(channel);

        if ((command == MHL_MSC_MSG_RCP) || (command == MHL_MSC_MSG_RCPK) || (command == MHL_MSC_MSG_RCPE))
        {
            result = SI_RcpTimeoutHandler(channel, direction);
        }
        else if ((command == MHL_MSC_MSG_RAP) || (command == MHL_MSC_MSG_RAPK))
        {
            result = SI_RapTimeoutHandler(channel, direction);
        }
    }
    else if (direction == CBUS_OUT)
    {
        command = SI_CbusOQReqData0(channel);

        if ((command == MHL_MSC_MSG_RCP) || (command == MHL_MSC_MSG_RCPK) || (command == MHL_MSC_MSG_RCPE))
        {
            result = SI_RcpTimeoutHandler(channel, direction);
        }
        else if ((command == MHL_MSC_MSG_RAP) || (command == MHL_MSC_MSG_RAPK))
        {
            result = SI_RapTimeoutHandler(channel, direction);
        }
        }
    else
    {
        result = ERROR_WRONG_DIRECTION;
    }

    return (result);
}

/*****************************************************************************/

/**
 *  Cbus operation: The MSC MSG transfer done handler
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             result
 *
 *****************************************************************************/
uint8_t SI_CbusMscMsgTransferDone(uint8_t channel)
{
    uint8_t result = SUCCESS;
    uint8_t command;

    command = SI_CbusOQReqData0(channel);

    if ((command == MHL_MSC_MSG_RCP) || (command == MHL_MSC_MSG_RCPK) || (command == MHL_MSC_MSG_RCPE))
    {
        result = SI_RcpTransferDoneHandler(channel);
    }
    else if ((command == MHL_MSC_MSG_RAP) || (command == MHL_MSC_MSG_RAPK))
    {
        result = SI_RapTransferDoneHandler(channel);
    }

    return (result);
}

/*****************************************************************************/

/**
 *  Cbus queue operation: timeout counting in the reqs of In-queue
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             result
 *
 *****************************************************************************/
static uint8_t SI_CbusIQReqTimeoutCount(uint8_t channel)
{
    uint8_t result = SUCCESS;
    cbus_in_queue_t *pReq;

    pReq = SI_CbusIQActiveReq(channel);

    if (pReq->reqStatus == CBUS_REQ_PENDING)
    {
        if (!pReq->timer_set)
        {
            pReq->timer_set = true;
            pReq->base_time = timer_count;
        }
        else
        {
			vSil_Delay1ms(pReq->timeout);
            {
                pReq->base_time = 0;
                pReq->timer_set = false;
                result = SI_CbusMscMsgTimeoutHandler(channel, CBUS_IN);
            }
        }
    }

    return (result);
}

/*****************************************************************************/

/**
 *  Cbus queue operation: timeout counting in the reqs of Out-queue
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             result
 *
 *****************************************************************************/
static uint8_t SI_CbusOQReqTimeoutCount(uint8_t channel)
{
    uint8_t result = SUCCESS;
    cbus_out_queue_t *pReq;
	uint8_t i;
	uint8_t uData = 0;

    pReq = SI_CbusOQActiveReq(channel);

    if (pReq->reqStatus == CBUS_REQ_WAITING)
    {
        {
			vSil_Delay1ms(pReq->timeout);//waiting 100ms to check ABORT & ACK & NACK & NonACK
            {
                pReq->base_time = 0;
                pReq->timer_set = false;

                if (pReq->command == MSC_MSG)
                {
                    result = SI_CbusMscMsgTimeoutHandler(channel, CBUS_OUT);
                }
                else
                {
                    if (pReq->retry != 0)
                    {
						//1 //Check ABORT
						uint8_t intStatus, mscAbortReason;

						intStatus = SiIRegioCbusRead( REG_CBUS_INTR_STATUS, channel );
						intStatus &= (BIT_MSC_XFR_ABORT);
						if ( intStatus && BIT_MSC_XFR_ABORT )//1 //Met ABORT, waiting 2 sec to resend CMD 3 times
						{
							mscAbortReason = SiIRegioCbusRead( REG_CBUS_REQUESTER_ABORT_REASON, channel );
								
							DEBUG_PRINT( MSG_DBG, ("CBUS:: MSC Requester Abort. Clearing 0x0D\n"));
							DEBUG_PRINT( MSG_DBG, ("CBUS:: MSC Requester Abort reason: %02X\n", (int)mscAbortReason));
							SiIRegioCbusWrite( REG_CBUS_REQUESTER_ABORT_REASON, channel, 0xFF );
							SiIRegioCbusWrite( REG_CBUS_INTR_STATUS, channel, BIT_MSC_XFR_ABORT );
							vSil_Delay1ms(DEM_CBUS_ABORT_WAIT);
							DEBUG_PRINT( MSG_DBG, ("CBUS:: ---- ABORT WAIT finished----Needs to retry 3 times\n"));
						}
						else//1 //If no ABORT then check ACK and NACK and NonACK.
						{
							i=0;
							for(i=0 ; i<20 ; i++)//check thru 1000ms
							{
								intStatus = SiIRegioCbusRead( REG_CBUS_INTR_STATUS, channel );
								if (intStatus != 0)
								{
									if (intStatus & BIT_MSC_XFR_DONE)
									{
										SiIRegioCbusWrite( REG_CBUS_INTR_STATUS, channel, BIT_MSC_XFR_DONE );
								
										DEBUG_PRINT(MSG_DBG, ("CBUS:: NonMSC_MSG CMD Transfer Done\n"));
								
										uData = SiIRegioCbusRead( REG_CBUS_WRITE_BURST_LEN, channel );
										if (uData & BIT_MSC_DONE_WITH_NACK)
										{//1 //NACK arrived.
											DEBUG_PRINT(MSG_DBG, ("CBUS:: NonMSC_MSG Transfer Done with NACK. Retry 3 Times...\n"));
											SI_CbusOQSetReqStatus( channel, CBUS_REQ_PENDING );
											SI_CbusOQSetReqTimeout( channel, 0 );
											break;//NACK arrived, retry 3 times.
										}
										else
										{//1 //ACK arrived.
											DEBUG_PRINT(MSG_DBG, ("CBUS:: NonMSC_MSG Transfer Done with ACK. No need to retry.\n"));
											uData  = SiIRegioCbusRead( REG_CBUS_PRI_RD_DATA_1ST, channel );
											result = SI_CbusRetDataHandler(channel, uData);
											return (result);//No ABORT and ACK arrived, don't retry. Otherwise retry 3 times.
										}
									}
								}
								vSil_Delay1ms(50);
							}
							//1 //1sec timeout!!! NonACK...
							DEBUG_PRINT(MSG_DBG, ("CBUS:: NonMSC_MSG Transfer Done with NonACK. Retry 3 Times...\n"));
						}

                        DEBUG_PRINT(MSG_DBG, ("Cbus:: 0x%x  Req Timeout \n", (int)SI_CbusOQReqCmd(channel)));

						//1 //Resend CBUS CMD 3 times.
						i=0;
						for(i=0 ; i<3 ; i++)//retry 3 times
						{
	                        result = CbusWriteCommand(channel, pReq);
	                        pReq->base_time = timer_count;
	                        pReq->reqStatus = CBUS_REQ_IDLE;
	                        pReq->timeout = DEM_MSC_MAX_REPLY_DELAY;
							DEBUG_PRINT( MSG_DBG, ("CBUS:: Sent CBUS CMD out...3rd Time... MSC::0x%02X ; Offset::0x%02X ; Retry::0x%02xTimes\n",(int)pReq->command,(int)pReq->offsetData,(int)pReq->retry));
							DEBUG_PRINT( MSG_DBG, ("CBUS:: Retry %d times\n",(int)i));
						}

						{//1 //Ignore "Abort" CMD, and don't wait...
							uint8_t intStatus, mscAbortReason;
							intStatus = SiIRegioCbusRead( REG_CBUS_INTR_STATUS, channel );
							intStatus &= (BIT_MSC_XFR_ABORT);
							if ( intStatus && BIT_MSC_XFR_ABORT )
							{
								mscAbortReason = SiIRegioCbusRead( REG_CBUS_REQUESTER_ABORT_REASON, channel );
							
								DEBUG_PRINT( MSG_DBG, ("CBUS:: MSC Requester Abort. Clearing 0x0D\n"));
								DEBUG_PRINT( MSG_DBG, ("CBUS:: MSC Requester Abort reason: %02X\n", (int)mscAbortReason));
								SiIRegioCbusWrite( REG_CBUS_REQUESTER_ABORT_REASON, channel, 0xFF );
								SiIRegioCbusWrite( REG_CBUS_INTR_STATUS, channel, BIT_MSC_XFR_ABORT );
								DEBUG_PRINT( MSG_DBG, ("CBUS:: Don't care ABORT CMD, and don't wait 2sec <---This is not meet MHL SPEC\n"));
							}
						}
                    }
                    else
                    {
                        SI_CbusOQCleanActiveReq(channel);
                    }
                }
            }
        }
    }

    return (result);
}

/*****************************************************************************/

/**
 *  Cbus queue operation: In-queue main handler to check the req status
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             result
 *
 *****************************************************************************/
uint8_t SI_CbusIQReqStatusCheck(uint8_t channel)
{
    uint8_t result = SUCCESS;
    uint8_t status;

    status = SI_CbusIQReqStatus(channel);

    if (status == CBUS_REQ_PENDING)
    {
        result = SI_CbusMscMsgHandler(channel);
    }
    else if (status == CBUS_REQ_IDLE)
    {
        uint8_t queueIndex;

        for (queueIndex = 0; queueIndex < CBUS_MAX_COMMAND_QUEUE; queueIndex++)
        {
            if (l_cbus[ channel].i_queue[ queueIndex].reqStatus == CBUS_REQ_PENDING)
            {
                l_cbus[ channel].i_activeIndex = queueIndex;
                result = SI_CbusMscMsgHandler(channel);
            }
        }
    }

    result |= SI_CbusIQReqTimeoutCount(channel);

    return (result);
}

/*****************************************************************************/

/**
 *  Cbus queue operation: Out-queue main handler to check the req status
 *
 *
 *  @param[in]          channel		Cbus channel, always 0 in SiI1292
 *
 *  @return             result
 *
 *****************************************************************************/
uint8_t SI_CbusOQReqStatusCheck(uint8_t channel)
{
    uint8_t result = SUCCESS;
    uint8_t status;
    cbus_out_queue_t *pReq;

    status = SI_CbusOQReqStatus(channel);

    if (status == CBUS_REQ_PENDING)
    {
        pReq   = SI_CbusOQActiveReq(channel);
        result = CbusWriteCommand(channel, pReq);
        pReq->base_time = timer_count;
        pReq->reqStatus = CBUS_REQ_WAITING;
        pReq->timeout = DEM_MSC_MAX_REPLY_DELAY;
    }
    else if (status == CBUS_REQ_IDLE)
    {
        uint8_t queueIndex;

        for (queueIndex = 0; queueIndex < CBUS_MAX_COMMAND_QUEUE; queueIndex++)
        {
            if (l_cbus[ channel].o_queue[ queueIndex].reqStatus == CBUS_REQ_PENDING)
            {
                l_cbus[ channel].o_activeIndex = queueIndex;

                pReq   = SI_CbusOQActiveReq(channel);
                result = CbusWriteCommand(channel, pReq);
                pReq->base_time = timer_count;
                pReq->reqStatus = CBUS_REQ_WAITING;
                pReq->timeout = DEM_MSC_MAX_REPLY_DELAY;
				break;//Keno20120413, for fix MHL CTS6.3.11.7
            }
        }
    }

    result |= SI_CbusOQReqTimeoutCount(channel);

    return (result);
}

//------------------------------------------------------------------------------
// Function:    SI_CbusChannelConnected
// Description: Return the CBUS channel connected status for this channel.
// Returns:     true if connected.
//              false if disconnected.
//------------------------------------------------------------------------------

bool_t SI_CbusChannelConnected (uint8_t channel)
{
    return (l_cbus[ channel].connected);
}

//------------------------------------------------------------------------------
// Function:    CbusProcessConnectionChange
// Description: Process a connection change interrupt
// Returns:
//------------------------------------------------------------------------------

static uint8_t CbusProcessConnectionChange ( int channel )
{
    channel = 0;

    // for warning free
    UNUSED(channel);
    DEBUG_PRINT( MSG_DBG, ("CBUS:: ----Connection Change----\n"));

    return (ERROR_CBUS_TIMEOUT);
}

//------------------------------------------------------------------------------
// Function:    CbusProcessFailureInterrupts
// Description: Check for and process any failure interrupts.
// Returns:     SUCCESS
//------------------------------------------------------------------------------

uint8_t CbusProcessFailureInterrupts ( uint8_t channel, uint8_t intStatus, uint8_t inResult )
{
    uint8_t result          = inResult;
    uint8_t mscAbortReason  = SUCCESS;

    /* At this point, we only need to look at the abort interrupts. */

    intStatus &= (BIT_CEC_ABORT | BIT_DDC_ABORT | BIT_MSC_ABORT | BIT_MSC_XFR_ABORT);

    if ( intStatus )
    {
        result = ERROR_CBUS_ABORT;		// No Retry will help

        /* If transfer abort or MSC abort, clear the abort reason register. */

        if ( intStatus & BIT_MSC_ABORT )
        {
            mscAbortReason = SiIRegioCbusRead( REG_CBUS_RESPONDER_ABORT_REASON, channel );

            //DEBUG_PRINT( MSG_DBG, ("CBUS:: MSC Responder Abort. Clearing 0x0E\n"));
			//DEBUG_PRINT( MSG_DBG, ("CBUS:: MSC Responder Abort reason: %02X\n", (int)mscAbortReason));        
            SiIRegioCbusWrite( REG_CBUS_RESPONDER_ABORT_REASON, channel, 0xFF );
			SI_CbusOQReqAbort(channel, mscAbortReason);
        }
		if ( intStatus & BIT_DDC_ABORT )
		{
            mscAbortReason = SiIRegioCbusRead( REG_CBUS_DDC_ABORT_REASON, channel );

            //DEBUG_PRINT( MSG_DBG, ("CBUS:: DDC Abort. Clearing 0x0C\n"));	
			//DEBUG_PRINT( MSG_DBG, ("CBUS:: DDC Abort reason: %02X\n", (int)mscAbortReason));        
            SiIRegioCbusWrite( REG_CBUS_DDC_ABORT_REASON, channel, 0xFF );
		}
		if ( intStatus & BIT_CEC_ABORT )
		{
            mscAbortReason = SiIRegioCbusRead( REG_CBUS_CEC_ABORT_REASON, channel );

            DEBUG_PRINT( MSG_DBG, ("CBUS:: CEC Abort. Clearing 0x0B\n"));	
			DEBUG_PRINT( MSG_DBG, ("CBUS:: CEC Abort reason: %02X\n", (int)mscAbortReason));        
            SiIRegioCbusWrite( REG_CBUS_CEC_ABORT_REASON, channel, 0xFF );
		}

        // Now display the abort reason.

        if ( mscAbortReason != 0 )
        {
            //DEBUG_PRINT( MSG_DBG, ("CBUS:: Reason for ABORT is ....0x%02X = ", (int)mscAbortReason ));

            if ( mscAbortReason & CBUSABORT_BIT_REQ_MAXFAIL)
            {
                DEBUG_PRINT( MSG_DBG, ("Requestor MAXFAIL - retry threshold exceeded\n"));
            }
            if ( mscAbortReason & CBUSABORT_BIT_PROTOCOL_ERROR)
            {
                DEBUG_PRINT( MSG_DBG, ("Protocol Error\n"));
            }
            if ( mscAbortReason & CBUSABORT_BIT_REQ_TIMEOUT)
            {
                DEBUG_PRINT( MSG_DBG, ("Requestor translation layer timeout\n"));
            }
            if ( mscAbortReason & CBUSABORT_BIT_PEER_ABORTED)
            {
                //DEBUG_PRINT( MSG_DBG, ("Peer sent an abort\n"));
            }
            if ( mscAbortReason & CBUSABORT_BIT_UNDEFINED_OPCODE)
            {
                DEBUG_PRINT( MSG_DBG, ("Undefined opcode\n"));
            }
        }

        /* Clear any failure interrupt that we received.    */

        SiIRegioCbusWrite( REG_CBUS_INTR_STATUS, channel, intStatus );
    }

    return (result);
}

//------------------------------------------------------------------------------
// Function:    CbusProcessSubCommand
// Description: Process a sub-command (RCP) or sub-command response (RCPK).
//              Modifies channel state as necessary.
// Parameters:  channel - CBUS channel that received the command.
// Returns:     SUCCESS or CBUS_SOFTWARE_ERRORS_t
//              If SUCCESS, command data is returned in l_cbus[channel].msgData[i]
//------------------------------------------------------------------------------

static uint8_t CbusProcessSubCommand ( int channel )
{
    uint8_t result = SUCCESS;
    uint8_t vs_cmd, vs_data;
    uint8_t q_index = 0xFF;

    /* Get RCP message data for this channel from the hardware. */

    vs_cmd  = SiIRegioCbusRead( REG_CBUS_PRI_VS_CMD, channel );
    vs_data = SiIRegioCbusRead( REG_CBUS_PRI_VS_DATA, channel );

    DEBUG_PRINT(MSG_DBG, ("vs_cmd = %02X\n", (int)vs_cmd));

    // Save MSC_MSG data in the channel i_queue structure to be returned
    if (l_cbus[ channel].i_queue[ l_cbus[ channel].i_activeIndex].reqStatus == CBUS_REQ_IDLE)
    {
        l_cbus[ channel].i_queue[ l_cbus[ channel].i_activeIndex].command = vs_cmd;
        l_cbus[ channel].i_queue[ l_cbus[ channel].i_activeIndex].msgData = vs_data;
        q_index = l_cbus[ channel].i_activeIndex;
    }
    else
    {
        uint8_t queueIndex;

        for (queueIndex = 0; queueIndex < CBUS_MAX_COMMAND_QUEUE; queueIndex++)
        {
            if (l_cbus[ channel].i_queue[ queueIndex].reqStatus == CBUS_REQ_IDLE)
            {
                l_cbus[ channel].i_queue[ queueIndex].command = vs_cmd;
                l_cbus[ channel].i_queue[ queueIndex].msgData = vs_data;
                q_index = queueIndex;
            }
        }
    }

    if (q_index == 0xFF)
    {
        DEBUG_PRINT(MSG_ALWAYS, ("CBUS::MSC_MSG Receiving Queue full!\n"));
        return (ERROR_QUEUE_FULL);
    }

    // Parse it a little before telling the upper level about it.
    switch (vs_cmd)
    {
        //RCP
    case MHL_MSC_MSG_RCP:
        DEBUG_PRINT( MSG_DBG, ("CBUS:: Received <-- MHL_MSC_MSG_RCP\n"));
        l_cbus[ channel].i_queue[ q_index ].reqStatus = CBUS_REQ_PENDING;
        l_cbus[ channel].i_queue[ q_index ].timeout = DEM_MHL_RCP_TIMEOUT;          // setup the timeout wait time for RCP
        result = SUCCESS;
        break;

    case MHL_MSC_MSG_RCPK:
        DEBUG_PRINT( MSG_DBG, ("CBUS:: Received <-- MHL_MSC_MSG_RCPK\n"));
        l_cbus[ channel].i_queue[ q_index ].reqStatus = CBUS_REQ_IDLE;
        result = SI_RcpAckRcvd(channel, vs_data);
        break;

    case MHL_MSC_MSG_RCPE:
        DEBUG_PRINT( MSG_DBG, ("CBUS:: Received <-- MHL_MSC_MSG_RCPE\n"));
        l_cbus[ channel].i_queue[ q_index ].reqStatus = CBUS_REQ_IDLE;
        result = SI_RcpErrRcvd(channel, vs_data);                                   // RCPE handler will reset the timer of RCP request in OQ to Trcp_wait
        break;

        //RAP
    case MHL_MSC_MSG_RAP:
        DEBUG_PRINT( MSG_DBG, ("CBUS:: Received <-- MHL_MSC_MSG_RAP\n"));
        l_cbus[ channel].i_queue[ q_index ].reqStatus = CBUS_REQ_PENDING;
        l_cbus[ channel].i_queue[ q_index ].timeout = DEM_MHL_RCP_TIMEOUT;          // setup the timeout wait time for RAP
        result = SUCCESS;
        break;

    case MHL_MSC_MSG_RAPK:
        DEBUG_PRINT( MSG_DBG, ("CBUS:: Received <-- MHL_MSC_MSG_RAPK\n"));
        l_cbus[ channel].i_queue[ q_index ].reqStatus = CBUS_REQ_IDLE;
        result = SI_RapAckRcvd(channel, vs_data);
		fgSil_NFYRAPK(vs_data);//kh, Notify SoC when RAPK received.
        break;



    default:
        DEBUG_PRINT( MSG_DBG, ("CBUS:: Unknown MSC_MSG CMD:  0x%02X. Data: 0x%02X\n", (int)vs_cmd, (int)vs_data));
    }

    return (result);
}

//------------------------------------------------------------------------------
// Function:    CbusWriteCommand
// Description: Write the specified Sideband Channel command to the CBUS.
//              Command can be a MSC_MSG command (RCP/MCW/RAP), or another command
//              such as READ_DEVCAP, GET_VENDOR_ID, SET_HPD, CLR_HPD, etc.
//
// Parameters:  channel - CBUS channel to write
//              pReq    - Pointer to a cbus_req_t structure containing the
//                        command to write
// Returns:     TRUE    - successful write
//              FALSE   - write failed
//------------------------------------------------------------------------------

uint8_t CbusWriteCommand ( int channel, cbus_out_queue_t *pReq  )
{
    uint8_t i, startbit;
    uint8_t uData1 = 0;
    uint8_t uData2 = 0;
    uint8_t result = SUCCESS;

    // for warning free
    UNUSED(uData1);
    UNUSED(uData2);

    /****************************************************************************************/
    /* Setup for the command - write appropriate registers and determine the correct        */
    /*                         start bit.                                                   */
    /****************************************************************************************/

    SiIRegioCbusWrite( REG_CBUS_PRI_ADDR_CMD, channel, pReq->command );


    startbit = 0x00;
    switch (pReq->command)
    {
    case MSC_WRITE_STAT: //MSC_SET_INT    // Same opCode as MSC_SET_INT
        SiIRegioCbusWrite( REG_CBUS_PRI_ADDR_CMD, channel, pReq->offsetData );
        SiIRegioCbusWrite( REG_CBUS_PRI_WR_DATA_1ST, channel, pReq->msgData[0] );
        startbit = MSC_START_BIT_WRITE_REG;
        uData1 = pReq->offsetData;
        uData2 = pReq->msgData[0];
            break;

        case MSC_READ_DEVCAP:
            SiIRegioCbusWrite( REG_CBUS_PRI_ADDR_CMD, channel, pReq->offsetData );
            startbit = MSC_START_BIT_READ_REG;
 			uData1 = pReq->offsetData;
           break;

        case MSC_GET_STATE:
        case MSC_GET_VENDOR_ID:
        case MSC_SET_HPD:
        case MSC_CLR_HPD:
		case MSC_GET_VS_ABORT:
    	case MSC_GET_DDC_ABORT:
    	case MSC_GET_MSC_ABORT:     
            startbit = MSC_START_BIT_MSC_CMD;
            break;

        case MSC_MSG:
            SiIRegioCbusWrite( REG_CBUS_PRI_WR_DATA_1ST, channel, pReq->msgData[0] );
            SiIRegioCbusWrite( REG_CBUS_PRI_WR_DATA_2ND, channel, pReq->msgData[1] );
            startbit = MSC_START_BIT_VS_CMD;
			uData1 = pReq->msgData[0];
			uData2 = pReq->msgData[1];
            break;

        case MSC_WRITE_BURST:
            SiIRegioCbusWrite( REG_CBUS_PRI_ADDR_CMD, channel, pReq->offsetData );
            SiIRegioCbusWrite( REG_MSC_WRITE_BURST_LEN, channel, pReq->length - 1 );//be care of length , if length = 16 , write 15 into register 

            // Now copy all bytes from array to local scratchpad

            for ( i = 0; i < pReq->length; i++ )
            {
                SiIRegioCbusWrite( (REG_CBUS_SCRATCHPAD_0 + i), channel, pReq->msgData[i] );
            }
            startbit = MSC_START_BIT_WRITE_BURST;
			uData1 = pReq->offsetData;
			uData2 = pReq->length;
            break;

        default:
            result = ERROR_INVALID_MSC_CMD;
            break;
    }

    /****************************************************************************************/
    /* Trigger the CBUS command transfer using the determined start bit.                    */
    /****************************************************************************************/

    if ( result == SUCCESS )
    {
	if(pReq->command == MSC_SET_HPD)fgSil_NTF_MSC_CMD(0, 0x64, 0x00, 0x00);
		SiIRegioCbusWrite( REG_CBUS_PRI_START, channel, startbit );
    		DEBUG_PRINT( MSG_DBG, ("CBUS:: Sending MSC command %02X, %02X, %02X\n", (int)pReq->command, (int)uData1, (int)uData2));
    }

    return( result );
}

bool_t  SI_WriteBurstDataDoneDummy(uint8_t channel, uint8_t dummy)
{
    SI_CbusOQCleanActiveReq(channel);
	return true;
}

BOOL fgSil_SendWriteBurstData(UINT8 key, UINT8 *pdata, UINT8 size)//notify MSC:: MSC_WRITE_BURST = 0x6c ...etc.
{
	cbus_out_queue_t req;
    	uint8_t i;

    	req.length = size;    
    	for ( i = 0; i < req.length; i++ )
    	{
		ScratchpadAreaOut[i] = pdata[i];
    	}
		
		g_Non3D_WB_Processing = true;

	return true;
}

static uint8_t SiiWriteBurstData(uint8_t channel)
{
    cbus_out_queue_t req;
    uint8_t result, i;

    req.length = 0x10;
    for (i = 0; i < req.length; i++)
    {
        req.msgData[i] = ScratchpadAreaOut[i];
    }

    req.command = MSC_WRITE_BURST;
    req.offsetData = 0x40; //register offset
    req.dataRetHandler  = SI_WriteBurstDataDone;
    req.sRetHandlerName = "SI_WriteBurstDataDone";

    req.retry = 3;
	DEBUG_PRINT(MSG_DBG,
				("CBUS:: Non-3D WB CMD [%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x]\n",
				 (int)req.msgData[0], (int)req.msgData[1], (int)req.msgData[2],
				 (int)req.msgData[3], (int)req.msgData[4],
				 (int)req.msgData[5], (int)req.msgData[6], (int)req.msgData[7],
				 (int)req.msgData[8], (int)req.msgData[9],
				 (int)req.msgData[10], (int)req.msgData[11], (int)req.msgData[12],
				 (int)req.msgData[13], (int)req.msgData[14],
				 (int)req.msgData[15]
				));
    result = SI_CbusPushReqInOQ( channel, &req, true );

    return result;
}

///////////////////////////////////////////////////////////////////////////////
//
// SiiMhlTxGotMhlIntr
//
// This function is called by the driver to inform of arrival of a MHL INTERRUPT.
//
// It is called in interrupt context to meet some MHL specified timings, therefore,
// it should not have to call app layer and do negligible processing, no printfs.
//
void    SiiMhlTxGotMhlIntr(uint8_t channel, uint8_t intr_0, uint8_t intr_1 )
{
    uint8_t result;

     // for warning free
     UNUSED(result);

	DEBUG_PRINT(MSG_DBG,("MhlTx: INTERRUPT Arrived. %02X, %02X\n", (int) intr_0, (int) intr_1 ));

    //
    // Handle DCAP_CHG INTR here
    //
    if (CBUS_INT_BIT_DCAP_CHG & intr_0)
    {
        SI_CbusSetReadInfo(channel, 0); //start to read DCAP in main loop
    }

    if (CBUS_INT_BIT_DSCR_CHG & intr_0)
    {}

    if (CBUS_INT_BIT_REQ_WRT & intr_0)
    {
        bool_t grant = SI_CbusGetGrtWrt(channel);

        if (!grant)
        {
            cbus_out_queue_t req;

            req.command = MSC_SET_INT;
            req.offsetData = MHL_REG_CHANGE_INT_OFFSET;
            req.msgData[0] = CBUS_INT_BIT_GRT_WRT;
            req.dataRetHandler  = SI_MscGrtWrt;
            req.sRetHandlerName = "SI_MscGrtWrt";

            req.retry = 3;  // don't retry twice
            result = SI_CbusPushReqInOQ( channel, &req, true );
        }
    }

    if (CBUS_INT_BIT_GRT_WRT & intr_0)
    {
		cbus_out_queue_t req;
        DEBUG_PRINT(MSG_DBG, ("MhlTx: you cant write your data now!\n"));
        SiiWriteBurstData(channel);

		//[KH] please refer [MHL] figure 7-61. write DSCR_CHG to RCHANGE_INT after sent WB CMD
		req.command = MSC_SET_INT;
		req.offsetData = MHL_REG_CHANGE_INT_OFFSET;
		req.msgData[0] = CBUS_INT_BIT_DSCR_CHG;
		req.dataRetHandler	= SI_MscWriteBurst3D_DTD_DSCR_CHG_Done;
		req.sRetHandlerName = "SI_MscWriteBurst3D_DTD_DSCR_CHG_Done";
		req.retry = 3;//don't retry twice
		
		// push REQ_WRT command to out queue.
		SI_CbusPushReqInOQ( channel, &req, true );
		DEBUG_PRINT(MSG_DBG, ("CBUS:: Push DSCR_CHG into output queue.\n"));
    }
}

#if 0
///////////////////////////////////////////////////////////////////////////////
//
// SiiMhlTxGotMhlStatus
//
// This function is called by the driver to inform of arrival of a MHL STATUS.
//
// It is called in interrupt context to meet some MHL specified timings, therefore,
// it should not have to call app layer and do negligible processing, no printfs.
//
void    SiiMhlTxGotMhlStatus(uint8_t channel, uint8_t status_0, uint8_t status_1 )
{
    //	TX_DEBUG_PRINT( ("MhlTx: STATUS Arrived. %02X, %02X\n", (int) status_0, (int) status_1) );
    //
    // Handle DCAP_RDY STATUS here itself
    //
    static uint8_t s_status_0 = 0, s_status_1 = 0;
    uint8_t StatusChangeBitMask0, StatusChangeBitMask1;

    StatusChangeBitMask0 = status_0 ^ s_status_0;
    StatusChangeBitMask1 = status_1 ^ s_status_1;

    // Remember the event.   (other code checks the saved values, so save the values early, but not before the XOR operations above)
    s_status_0 = status_0;
    s_status_1 = status_1;

    if (BIT_DCAP_RDY & StatusChangeBitMask0) //changed
    {
        DEBUG_PRINT(MSG_DBG, ("MhlTx: DCAP_RDY changed\n"));
        if (BIT_DCAP_RDY & status_0)
        {
            //
        }
    }

    // did PATH_EN change?
    if (BIT_PATH_EN & StatusChangeBitMask1)
    {
        DEBUG_PRINT(MSG_DBG, ("MhlTx: PATH_EN changed\n"));
        if (BIT_PATH_EN & status_1)
        {
            // OK to call this here since all requests are queued
            SI_CbusSetPathEnable(channel, true);
        }
        else
        {
            // OK to call this here since all requests are queued
            SI_CbusSetPathEnable(channel, false);
        }
    }
}

#endif

//------------------------------------------------------------------------------
// Function:    CbusCheckInterruptStatus
// Description: If any interrupts on the specified channel are set, process them.
// Parameters:  channel - CBUS channel to check
// Returns:     SUCCESS or CBUS_SOFTWARE_ERRORS_t error code.
//------------------------------------------------------------------------------

static uint8_t CbusCheckInterruptStatus ( uint8_t channel )
{
    uint8_t result, uData;
    uint8_t intStatus;
//	uint8_t i;//kh, disabled for fix building error
	uint8_t reg_data;

	// for warning free
	UNUSED(reg_data);

    /* Read CBUS interrupt status.  */
    intStatus = SiIRegioCbusRead( REG_CBUS_INTR_STATUS, channel );

    if ((intStatus != 0) && (intStatus != 0x04))
    {
        //DEBUG_PRINT(MSG_DBG, ("CBUS:: Interrupt Status, %02X\n", (int)intStatus));
    }

    /* Check for interrupts.  */

    result = SUCCESS;
    if (intStatus != 0)
    {
        if (intStatus & BIT_MSC_MSG_RCV)
        {
            /* Receiving a sub-command, either an actual command or */
            /* the response to a command we sent.                   */

            //DEBUG_PRINT(MSG_DBG, ("BIT_MSC_MSG_RCV\n"));
            SiIRegioCbusWrite( REG_CBUS_INTR_STATUS, channel, BIT_MSC_MSG_RCV );
            result = CbusProcessSubCommand( channel );
        }

        if (intStatus & BIT_MSC_XFR_DONE)
        {
            /* A previous MSC sub-command has been acknowledged by the responder.   */
            /* Does not include MSC MSG commands.                                   */
            SiIRegioCbusWrite( REG_CBUS_INTR_STATUS, channel, BIT_MSC_XFR_DONE );

            DEBUG_PRINT(MSG_DBG, ("CBUS:: Interrupt Transfer Done\n"));

            uData = SiIRegioCbusRead( REG_CBUS_WRITE_BURST_LEN, channel );
            if (uData & BIT_MSC_DONE_WITH_NACK)
            {
                DEBUG_PRINT(MSG_DBG, ("CBUS:: MSC Transfer Done with NACK. Need retry...\n"));
                SI_CbusOQSetReqStatus( channel, CBUS_REQ_PENDING );
                SI_CbusOQSetReqTimeout( channel, 0 );
            }
            else
            {
                /* Save any response data in the channel request structure to be returned    */
                /* to the upper level.                                                      */

                uData  = SiIRegioCbusRead( REG_CBUS_PRI_RD_DATA_1ST, channel );
                result = SI_CbusRetDataHandler(channel, uData);
            }
        }

        if (intStatus & BIT_CONNECT_CHG)
        {
            /* The connection change interrupt has been received.   */

            DEBUG_PRINT(MSG_DBG, ("CBUS:: Interrupt Connect Change\n"));
            SiIRegioCbusWrite( REG_CBUS_INTR_STATUS, channel, BIT_CONNECT_CHG );

            // MP: do we need to process the connection change

            result = CbusProcessConnectionChange( channel );
        }

        if (intStatus & BIT_PARITY_ERROR)
        {
            //DEBUG_PRINT(MSG_DBG, ("CBUS:: Interrupt Parity Error\n"));
            SiIRegioCbusWrite( REG_CBUS_INTR_STATUS, channel, BIT_PARITY_ERROR );
            SiIRegioCbusWrite( REG_CBUS_LINK_STATUS_2, channel, 0 );
        }

        /* Check for failure interrupts.    */

        result = CbusProcessFailureInterrupts( channel, (uint8_t)intStatus, result );
    }

    // Add processing for WRITE_BURST
    intStatus = 0;
    intStatus = SiIRegioCbusRead( REG_CBUS_MSC_INT2_STATUS, channel );

    if (intStatus)
    {
        //  	DEBUG_PRINT(MSG_DBG, ("CBUS:: REG_CBUS_MSC_INT2_STATUS, %02X\n", (int)intStatus));
        if (intStatus & BIT_MSC_MR_SET_INT)
        {
            uint8_t intr_0 = 0, intr_1 = 0;
            intr_0 = SiIRegioCbusRead(REG_CBUS_INT_REG_0, channel);
            intr_1 = SiIRegioCbusRead(REG_CBUS_INT_REG_1, channel);
            DEBUG_PRINT(MSG_DBG, ("CBUS:: MHL INTR Received.REG_CBUS_INT_REG_0 = 0x%2x REG_CBUS_INT_REG_1 = 0x%2x\n",
                                  (int)intr_0, (int)intr_1));

			if(!g_Support_MHL2)
    		{
    		// We are interested only in first two bytes.
    		SiiMhlTxGotMhlIntr(channel ,intr_0, intr_1 );
        	}
			else
			{

            if (intr_0 & CBUS_INT_BIT_DCAP_CHG)
            {
                SI_CbusSetReadInfo(channel, 0); //start to read DCAP in main loop
            }

            if (CBUS_INT_BIT_DSCR_CHG & intr_0)
            {}

            if (CBUS_INT_BIT_REQ_WRT & intr_0)
            {
                bool_t grant = SI_CbusGetGrtWrt(channel);

                if (!grant)
                {
                    cbus_out_queue_t req;

                    req.command = MSC_SET_INT;
                    req.offsetData = MHL_REG_CHANGE_INT_OFFSET;
                    req.msgData[0] = CBUS_INT_BIT_GRT_WRT;
                    req.dataRetHandler  = SI_MscGrtWrt;
                    req.sRetHandlerName = "SI_MscGrtWrt";
                    req.retry = 3; // don't retry twice
                    result = SI_CbusPushReqInOQ( channel, &req, true );
                }
            }

            //Processing 3D_REQ
            if ((intr_0 & CBUS_INT_BIT_3D_REQ) && (g_3D_WB_Processing == false))
            {
                //static uint32_t _3D_REQ_Time = 0;//kh, disabled for fix building error
//              if ((_3D_REQ_Time == 0) | ((g_pass - _3D_REQ_Time) > 10000))//kh, disabled the line. it will effect no display when test on SL-861
                {
                    //Step 1 of Response to 3D_REQ.
                    //Send REQ_WRT to peer
                    cbus_out_queue_t req;
//                    SI_3D_EDID_Configuration_VIC_DTD();
					g_3D_WB_Processing = true;

					g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_Index = 0;
					g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_Index = 0;
                    g_u3DstateMachine = STEP_1_3D_VIC_REQ_WRT;
                    req.command = MSC_SET_INT;
                    req.offsetData = MHL_REG_CHANGE_INT_OFFSET;
                    req.msgData[0] = CBUS_INT_BIT_REQ_WRT;
                    req.dataRetHandler  = SI_MscWriteBurst3D_VIC_REQ_WRT_Done;
                    req.sRetHandlerName = "SI_MscWriteBurst3D_VIC_REQ_WRT_Done";
                    req.retry = 3;

                    // push REQ_WRT command to out queue.
                    result = SI_CbusPushReqInOQ( channel, &req, true );
                    DEBUG_PRINT(MSG_DBG, ("CBUS:: Interrupt of 3D_REQ arrived.\n"));
                    DEBUG_PRINT(MSG_DBG, ("CBUS:: Push 3D_VIC_REQ_WRT into output queue.\n"));
                }

                //_3D_REQ_Time = g_pass;//kh, disabled for fix building error
            }

            if (intr_0 & CBUS_INT_BIT_GRT_WRT)
            {
                int i = 0;
                if (g_u3DstateMachine == STEP_1_3D_VIC_REQ_WRT)
                {
                    //Step 2 of Resonpse to 3D_REQ
                    //Wait for GRT_WRT

                    cbus_out_queue_t req;
                    g_u3DstateMachine = STEP_2_3D_VIC_GRT_WRT;
                    DEBUG_PRINT(MSG_DBG, ("CBUS:: Interrupt of 3D_VIC_GRT_WRT arrived.\n"));

                    //Step 3 of Response to 3D_REQ
                    //Send WRITE_BURST of 3D_DTD
                    g_u3DstateMachine = STEP_3_3D_VIC_WRT_VIC;
                    req.command = MSC_WRITE_BURST;
                    req.offsetData = 0x40;
                    req.length = 16;
                    req.dataRetHandler  = SI_MscWriteBurst3D_3D_VIC_Done;
                    req.sRetHandlerName = "SI_MscWriteBurst3D_3D_VIC_Done";
                    req.retry = 3;

                    memset(req.msgData, 0, MHL_MAX_BUFFER_SIZE);

                    req.msgData[0] = BURST_3D_VIC_H;
                    req.msgData[1] = BURST_3D_VIC_L;

                    req.msgData[3] = g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT; //TOT_ENT
                    req.msgData[4] = 1 + g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_Index / 5; //SEQ
                    if (req.msgData[3] != 0)
                    {
                        //NUM_ENT
                        if ((req.msgData[4] * 5) < g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT)
                        {
                            req.msgData[5] = 5;
                        }
                        else
                        {
                            req.msgData[5] = (g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT - (req.msgData[4] - 1) * 5) % 5;
                        }

                        for (i = 0; i < 5; i++)
                        {
                            if (g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_Index < g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT)
                            {
                                req.msgData[6 + i * 2] = 0; //VID_0_H
                                req.msgData[7 + i * 2] = 0x00; //VID_0_L
                                if (true
                                    == g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_Index].FS_SUPP)
                                {
                                    req.msgData[7 + i * 2] |= BIT_FS_SUPP;
                                }

                                if (true
                                    == g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_Index].TB_SUPP)
                                {
                                    req.msgData[7 + i * 2] |= BIT_TB_SUPP;
                                }

                                if (true
                                    == g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_Index].LR_SUPP)
                                {
                                    req.msgData[7 + i * 2] |= BIT_LR_SUPP;
                                }

                                g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_Index++;
                            }
                        }
                    }

                    req.msgData[2] = 0xFF + 1 - \
                                     ((req.msgData[0] + req.msgData[1] + req.msgData[3] \
                                      + req.msgData[4] + req.msgData[5] + req.msgData[6] + req.msgData[7] \
                                      + req.msgData[8] + req.msgData[9] + req.msgData[10] + req.msgData[11] \
                                      + req.msgData[12] + req.msgData[13] + req.msgData[14] + req.msgData[15]) \
                                     & 0xFF); // Checksum;
                    // push 3D_VIC command to out queue.
                    result = SI_CbusPushReqInOQ( channel, &req, true );
                    DEBUG_PRINT(MSG_DBG, ("CBUS:: Push MSC_WRITE_BURST(3D_VIC) into output queue.\n"));
                    DEBUG_PRINT(MSG_DBG,
                                ("CBUS:: 3D_VIC [%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x]\n",
                                 (int)req.msgData[0], (int)req.msgData[1], (int)req.msgData[2],
                                 (int)req.msgData[3], (int)req.msgData[4],
                                 (int)req.msgData[5], (int)req.msgData[6], (int)req.msgData[7],
                                 (int)req.msgData[8], (int)req.msgData[9],
                                 (int)req.msgData[10], (int)req.msgData[11], (int)req.msgData[12],
                                 (int)req.msgData[13], (int)req.msgData[14],
                                 (int)req.msgData[15]
                                ));
                }
                else if (g_u3DstateMachine == STEP_6_3D_DTD_REQ_WRT)
                {
                    //Step  7 of Resonpse to 3D_REQ
                    //Wait for GRT_WRT
                    cbus_out_queue_t req;
                    g_u3DstateMachine = STEP_7_3D_DTD_GRT_WRT;
                    DEBUG_PRINT(MSG_DBG, ("CBUS:: Interrupt of 3D_DTD_GRT_WRT arrived.\n"));

                    //Step 8 of Response to 3D_REQ
                    //Send WRITE_BURST of 3D_VIC
                    g_u3DstateMachine = STEP_8_3D_DTD_WRT_DTD;
                    req.command = MSC_WRITE_BURST;
                    req.offsetData = 0x40;
                    req.length = 16;
                    req.dataRetHandler  = SI_MscWriteBurst3D_3D_DTD_Done;
                    req.sRetHandlerName = "SI_MscWriteBurst3D_3D_DTD_Done";
                    req.retry = 3;
                    memset(req.msgData, 0, MHL_MAX_BUFFER_SIZE);

                    req.msgData[0] = BURST_3D_DTD_H;
                    req.msgData[1] = BURST_3D_DTD_L;

                    req.msgData[3] = g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_TOT_ENT; //TOT_ENT
                    req.msgData[4] = 1 + g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_Index / 5; //SEQ

                    if (req.msgData[3] != 0)
                    {
                        //NUM_ENT
                        if ((req.msgData[4] * 5) < g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT)
                        {
                            req.msgData[5] = 5;
                        }
                        else
                        {
                            req.msgData[5] = (g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT - (req.msgData[4] - 1) * 5) % 5;
                        }

                        for (i = 0; i < 5; i++)
                        {
                            if (g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_Index < g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_TOT_ENT)
                            {
                                req.msgData[6 + i * 2] = 0; //VID_0_H
                                req.msgData[7 + i * 2] = 0x00; //VID_0_L
                                if (true
                                    == g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_Index].FS_SUPP)
                                {
                                    req.msgData[7 + i * 2] |= BIT_FS_SUPP;
                                }

                                if (true
                                    == g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_Index].TB_SUPP)
                                {
                                    req.msgData[7 + i * 2] |= BIT_TB_SUPP;
                                }

                                if (true
                                    == g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_Index].LR_SUPP)
                                {
                                    req.msgData[7 + i * 2] |= BIT_LR_SUPP;
                                }

                                g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_Index++;
                            }
                        }
                    }

                    req.msgData[2] = 0xFF + 1 - \
                                     ((req.msgData[0] + req.msgData[1] + req.msgData[3] \
                                      + req.msgData[4] + req.msgData[5] + req.msgData[6] + req.msgData[7] \
                                      + req.msgData[8] + req.msgData[9] + req.msgData[10] + req.msgData[11] \
                                      + req.msgData[12] + req.msgData[13] + req.msgData[14] + req.msgData[15]) \
                                     & 0xFF); // Checksum;
                    // push 3D_DTD command to out queue.
                    result = SI_CbusPushReqInOQ( channel, &req, true );
                    DEBUG_PRINT(MSG_DBG, ("CBUS:: Push MSC_WRITE_BURST(3D_DTD) into output queue.\n"));
                    DEBUG_PRINT(MSG_DBG,
                                ("CBUS:: 3D_DTD [%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x][%02x]\n",
                                 (int)req.msgData[0], (int)req.msgData[1], (int)req.msgData[2],
                                 (int)req.msgData[3], (int)req.msgData[4],
                                 (int)req.msgData[5], (int)req.msgData[6], (int)req.msgData[7],
                                 (int)req.msgData[8], (int)req.msgData[9],
                                 (int)req.msgData[10], (int)req.msgData[11], (int)req.msgData[12],
                                 (int)req.msgData[13], (int)req.msgData[14],
                                 (int)req.msgData[15]
                                ));
                }
                else if(g_3D_WB_Processing == false)
                {
					//kh, add 2 functions (SiiWriteBurstData, SI_MscWriteBurst_Done) when customer wants to use WB do something.
					SiiWriteBurstData(channel);
                	SI_MscWriteBurst_Done(channel);
                    DEBUG_PRINT(MSG_DBG, ("CBUS:: g_u3DstateMachine is wrong(0x%0x).\n", (int)g_u3DstateMachine));
                }
            }
			}

            SiIRegioCbusWrite( REG_CBUS_INT_REG_0, channel, intr_0 );
            SiIRegioCbusWrite( REG_CBUS_INT_REG_1, channel, intr_1 );
        }

        if (intStatus & BIT_MSC_WRITE_BURST)
        {
            uint8_t i;

            DEBUG_PRINT(MSG_DBG, ("CBUS:: Interrupt WRITE_BURST\n"));
            DEBUG_PRINT(MSG_DBG, ("CBUS:: Data received in Scratch Pad\n"));
			for (i = 0; i < SCRATCHPAD_SIZE; i++)
			{
				reg_data = SiIRegioCbusRead((REG_CBUS_SCRATCHPAD_0 + i), channel);
				ScratchpadAreaIn[i] = reg_data;//Keno20120309, add for notify MSC:: MSC_WRITE_BURST = 0x6c ...etc.
                DEBUG_PRINT(MSG_DBG, ("%02X ", (int)reg_data));
            }

            DEBUG_PRINT(MSG_DBG, ("\n"));
            SI_CbusSetGrtWrt(channel, false);
			fgSil_NFYWriteBurstData(MSC_WRITE_BURST, ScratchpadAreaIn,SCRATCHPAD_SIZE);//Keno20120309, add for notify MSC:: MSC_WRITE_BURST = 0x6c ...etc.
        }


        SiIRegioCbusWrite(REG_CBUS_MSC_INT2_STATUS, channel, intStatus);
    }

    {
        static uint8_t reg_B0 = 0;

        uData = SiIRegioCbusRead(REG_CBUS_STAT_REG_0, channel);
        if (uData != reg_B0)
        {
            if (reg_B0)
            {
                DEBUG_PRINT(MSG_DBG, ("CBUS:: Interrupt WRITE_STATE\n"));
            }

            reg_B0 = uData;
            if (uData & BIT_DCAP_RDY)
            {
                DEBUG_PRINT(MSG_DBG, ("CBUS:: Peer DevCap Ready\n"));
                SI_CbusSetDcapRdy(channel, true);
            }
        }
    }

    return (result);
}

//------------------------------------------------------------------------------
// Function:    SI_CbusPortToChannel
// Description: Determine if the requested port is MHL
// Returns:     CBUS Channel if an MHL port, or 0xFF if not.
//
// Note:        Input parameter is NOT bounds-checked
//------------------------------------------------------------------------------

uint8_t SI_CbusPortToChannel ( uint8_t portIndex )
{
    return (l_PortToChannel[ portIndex ]);
}

#if 0 //not used
//------------------------------------------------------------------------------
// Function:    SI_CbusChannelToPort
// Description: Determine which port is associated with the specified channel.
// Return:      Port number (0-4) or 0xFF if not found.
//
// Note:        Input parameter is NOT bounds-checked
//------------------------------------------------------------------------------

uint8_t SI_CbusChannelToPort ( uint8_t channel )
{
    return (l_ChannelToPort[ channel ]);
}

#endif

//------------------------------------------------------------------------------
// Function:    SI_CbusHandler
// Description: Check the state of any current CBUS message on specified channel.
//              Handle responses or failures and send any pending message if
//              channel is IDLE.
// Parameters:  channel - CBUS channel to check
// Returns:     SUCCESS or one of CBUS_SOFTWARE_ERRORS_t
//------------------------------------------------------------------------------

uint8_t SI_CbusHandler ( uint8_t channel )
{
    uint8_t result = SUCCESS;

    if (l_ChannelToPort[ channel ] == CBUS_NOPORT)   // Don't bother with disconnected channels
    {
        return (SUCCESS);
    }

    /* Check the channel interrupt status to see if anybody is  */
    /* talking to us. If they are, talk back.                   */

    result = CbusCheckInterruptStatus( channel );
    return (result);
}

//------------------------------------------------------------------------------
// Function:    SI_CbusUpdateBusStatus
// Description: Check the BUS status interrupt register for this channel and
//              update the channel data as needed.
//              channel.
// Parameters:  channel to check
// Returns:     TRUE    - connected
//              FALSE   - not connected
//
//  Note: This function should be called periodically to update the bus status
//
//------------------------------------------------------------------------------

bool_t SI_CbusUpdateBusStatus ( uint8_t channel )
{
    //uint8_t busStatus;

    //busStatus = SiIRegioCbusRead( REG_CBUS_BUS_STATUS, channel );

    //DJ: C8:08[0] has a bug?
    l_cbus[ channel].connected = g_MHL_Source_Connected;

    //DEBUG_PRINT(MSG_DBG, ("busStatus: %02X, connected = %02X\n", (int)busStatus, (int)(l_cbus[ channel].connected)));

    //l_cbus[ channel].connected = g_MHL_Source_Connected;

    return (l_cbus[ channel].connected);
}

//------------------------------------------------------------------------------
// Function:    SI_CbusInitDevCap
// Description: Initialize device capability registers
// Returns:     none
//------------------------------------------------------------------------------
void SI_CbusInitDevCap( uint8_t channel )
{
    uint16_t devcap_reg;

    devcap_reg = REG_CBUS_DEVICE_CAP_0;
		
    SiIRegioCbusWrite( devcap_reg++, channel, DEVICE_STATE);// 0x00
    
    if(g_Support_MHL2)
	    SiIRegioCbusWrite( devcap_reg++, channel, 0x20);// 0x01
    else
		SiIRegioCbusWrite( devcap_reg++, channel, 0x12);// 0x01

    if((g_Support_MHL2)&&(g_Support_Charger_900mA))
    	SiIRegioCbusWrite( devcap_reg++, channel, (MHL_DEV_CAT_SINK | MHL_DEV_CAT_POW | MHL_DEV_CAT_900mA) );// 0x02
    else if((g_Support_MHL2)&&(!g_Support_Charger_900mA))
		SiIRegioCbusWrite( devcap_reg++, channel, (MHL_DEV_CAT_SINK | MHL_DEV_CAT_POW | MHL_DEV_CAT_1500mA) );// 0x02
    else if(!g_Support_MHL2)
		SiIRegioCbusWrite( devcap_reg++, channel, (MHL_DEV_CAT_SINK | MHL_DEV_CAT_POW | MHL_DEV_CAT_500mA) );// 0x02
    SiIRegioCbusWrite( devcap_reg++, channel, ADOPTER_ID_H);// 0x03
    SiIRegioCbusWrite( devcap_reg++, channel, ADOPTER_ID_L);   								// 0x04
    SiIRegioCbusWrite( devcap_reg++, channel, VID_LINK_MODE);  		// 0x05
    SiIRegioCbusWrite( devcap_reg++, channel, AUD_LINK_MODE);  		// 0x06
    SiIRegioCbusWrite( devcap_reg++, channel, VIDEO_TYPE);     			// 0x07
    SiIRegioCbusWrite( devcap_reg++, channel, LOG_DEV_MAP);     			// 0x08
    SiIRegioCbusWrite( devcap_reg++, channel, BANDWIDTH);         		// 0x09
    SiIRegioCbusWrite( devcap_reg++, channel, FEATURE_FLAG);     				// 0x0A
    SiIRegioCbusWrite( devcap_reg++, channel, DEVICE_ID_H);   					// 0x0B
    SiIRegioCbusWrite( devcap_reg++, channel, DEVICE_ID_L);   	     			// 0x0C
    SiIRegioCbusWrite( devcap_reg++, channel, SCRATCHPAD_SIZE);		       		// 0x0D
    SiIRegioCbusWrite( devcap_reg++, channel, INT_STAT_SIZE);					// 0x0E
    SiIRegioCbusWrite( devcap_reg++, channel, Reserved_for_Future_Use);  	// reserved			         		// 0x0F
}

//------------------------------------------------------------------------------
// Function:    SI_CbusInitialize
// Description: Attempts to intialize the CBUS. If register reads return 0xFF,
//              it declares error in initialization.
//              Initializes discovery enabling registers and anything needed in
//              config register, interrupt masks.
// Returns:     TRUE if no problem
//------------------------------------------------------------------------------

bool_t SI_CbusInitialize ( void )
{
	uint8_t		channel = 0;
    bool_t success = true;

    memset( &l_cbus, 0, sizeof(l_cbus));

    l_PortToChannel[ 0 ] = 0;
    l_ChannelToPort[ 0 ] = 0;

    /* Initialize CBUS channels.    */

    {
        SI_CbusInitDevCap(channel);

        SiIRegioCbusWrite( REG_CBUS_INTR_ENABLE, channel, 0xFF );  // Enable all interrupts
        SiIRegioWrite(REG_CBUS_INTR_STATUS, BIT_MSC_MSG_RCV); //tiger , 12-07-2-11, bi3 hardware defualt value is 1,clear it when init;
        //      SiIRegioCbusWrite(REG_CBUS_LINK_LAYER_CTRL12,channel,0xA3);
    }

    return (success);
}

//------------------------------------------------------------------------------
// Function:    SI_3D_EDID_Configuration_VIC_DTD
// Description:1292 no EDID included, so must to refer SoC EDID to fill VIC & DTD list for 3D
//			in SI_3D_EDID_Configuration_VIC_DTD. When 3D_REQ arrived, those data will
//			send out via WriteBurst CMD. If VIC and DTD list of SI_3D_EDID_Configuration_VIC_DTD
//			is mismatch with EDID, may no display. Please refer MHL 5.9.
// Returns:     0
//------------------------------------------------------------------------------
BOOL SI_3D_EDID_Configuration_VIC_DTD(MHL_3D_VIC_Structuration_T *p3D_VIC_Struct, MHL_3D_DTD_Structuration_T *p3D_DTD_Struct)
{
	DEBUG_PRINT(MSG_DBG, ("CBUS:: SI_3D_EDID_Configuration_VIC_DTD()\n"));
	if(g_Support_ThreeD)
	{
	DEBUG_PRINT(MSG_DBG, ("CBUS:: Defining 3D Video Format\n"));
    //DTD related
    if(p3D_DTD_Struct->EDID_1st_DTD)g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_TOT_ENT = 1;
    if(p3D_DTD_Struct->EDID_2nd_DTD)g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_TOT_ENT = 2;
    if(p3D_DTD_Struct->EDID_3rd_DTD)g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_TOT_ENT = 3;
    if(p3D_DTD_Struct->EDID_4th_DTD)g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_TOT_ENT = 4;
    if(p3D_DTD_Struct->EDID_5th_DTD)g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_TOT_ENT = 5;
    if(p3D_DTD_Struct->EDID_6th_DTD)g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_TOT_ENT = 6;
    if(p3D_DTD_Struct->EDID_7th_DTD)g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_TOT_ENT = 7;
    if(p3D_DTD_Struct->EDID_8th_DTD)g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_TOT_ENT = 8;
    if(p3D_DTD_Struct->EDID_9th_DTD)g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_TOT_ENT = 9;
    if(p3D_DTD_Struct->EDID_10th_DTD)g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_TOT_ENT = 10;
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_Index = 0;

    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[0].FS_SUPP = (bool_t)(p3D_DTD_Struct->EDID_1st_DTD_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[0].LR_SUPP = (bool_t)(p3D_DTD_Struct->EDID_1st_DTD_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[0].TB_SUPP = (bool_t)(p3D_DTD_Struct->EDID_1st_DTD_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[1].FS_SUPP = (bool_t)(p3D_DTD_Struct->EDID_2nd_DTD_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[1].LR_SUPP = (bool_t)(p3D_DTD_Struct->EDID_2nd_DTD_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[1].TB_SUPP = (bool_t)(p3D_DTD_Struct->EDID_2nd_DTD_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[2].FS_SUPP = (bool_t)(p3D_DTD_Struct->EDID_3rd_DTD_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[2].LR_SUPP = (bool_t)(p3D_DTD_Struct->EDID_3rd_DTD_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[2].TB_SUPP = (bool_t)(p3D_DTD_Struct->EDID_3rd_DTD_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[3].FS_SUPP = (bool_t)(p3D_DTD_Struct->EDID_4th_DTD_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[3].LR_SUPP = (bool_t)(p3D_DTD_Struct->EDID_4th_DTD_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[3].TB_SUPP = (bool_t)(p3D_DTD_Struct->EDID_4th_DTD_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[4].FS_SUPP = (bool_t)(p3D_DTD_Struct->EDID_5th_DTD_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[4].LR_SUPP = (bool_t)(p3D_DTD_Struct->EDID_5th_DTD_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[4].TB_SUPP = (bool_t)(p3D_DTD_Struct->EDID_5th_DTD_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[5].FS_SUPP = (bool_t)(p3D_DTD_Struct->EDID_6th_DTD_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[5].LR_SUPP = (bool_t)(p3D_DTD_Struct->EDID_6th_DTD_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[5].TB_SUPP = (bool_t)(p3D_DTD_Struct->EDID_6th_DTD_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[6].FS_SUPP = (bool_t)(p3D_DTD_Struct->EDID_7th_DTD_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[6].LR_SUPP = (bool_t)(p3D_DTD_Struct->EDID_7th_DTD_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[6].TB_SUPP = (bool_t)(p3D_DTD_Struct->EDID_7th_DTD_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[7].FS_SUPP = (bool_t)(p3D_DTD_Struct->EDID_8th_DTD_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[7].LR_SUPP = (bool_t)(p3D_DTD_Struct->EDID_8th_DTD_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[7].TB_SUPP = (bool_t)(p3D_DTD_Struct->EDID_8th_DTD_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[8].FS_SUPP = (bool_t)(p3D_DTD_Struct->EDID_9th_DTD_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[8].LR_SUPP = (bool_t)(p3D_DTD_Struct->EDID_9th_DTD_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[8].TB_SUPP = (bool_t)(p3D_DTD_Struct->EDID_9th_DTD_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[9].FS_SUPP = (bool_t)(p3D_DTD_Struct->EDID_10th_DTD_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[9].LR_SUPP = (bool_t)(p3D_DTD_Struct->EDID_10th_DTD_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_VDI[9].TB_SUPP = (bool_t)(p3D_DTD_Struct->EDID_10th_DTD_TB); 

    //SVD related
    if(p3D_VIC_Struct->EDID_1st_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 1;
    if(p3D_VIC_Struct->EDID_2nd_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 2;
    if(p3D_VIC_Struct->EDID_3rd_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 3;
    if(p3D_VIC_Struct->EDID_4th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 4;
    if(p3D_VIC_Struct->EDID_5th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 5;
    if(p3D_VIC_Struct->EDID_6th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 6;
    if(p3D_VIC_Struct->EDID_7th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 7;
    if(p3D_VIC_Struct->EDID_8th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 8;
    if(p3D_VIC_Struct->EDID_9th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 9;
    if(p3D_VIC_Struct->EDID_10th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 10;
    if(p3D_VIC_Struct->EDID_11th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 11;
    if(p3D_VIC_Struct->EDID_12th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 12;
    if(p3D_VIC_Struct->EDID_13th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 13;
    if(p3D_VIC_Struct->EDID_14th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 14;
    if(p3D_VIC_Struct->EDID_15th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 15;
    if(p3D_VIC_Struct->EDID_16th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 16;
    if(p3D_VIC_Struct->EDID_17th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 17;
    if(p3D_VIC_Struct->EDID_18th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 18;
    if(p3D_VIC_Struct->EDID_19th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 19;
    if(p3D_VIC_Struct->EDID_20th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 20;
    if(p3D_VIC_Struct->EDID_21th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 21;
    if(p3D_VIC_Struct->EDID_22th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 22;
    if(p3D_VIC_Struct->EDID_23th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 23;
    if(p3D_VIC_Struct->EDID_24th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 24;
    if(p3D_VIC_Struct->EDID_25th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 25;
    if(p3D_VIC_Struct->EDID_26th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 26;
    if(p3D_VIC_Struct->EDID_27th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 27;
    if(p3D_VIC_Struct->EDID_28th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 28;
    if(p3D_VIC_Struct->EDID_29th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 29;
    if(p3D_VIC_Struct->EDID_30th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 30;
    if(p3D_VIC_Struct->EDID_31th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 31;
    if(p3D_VIC_Struct->EDID_32th_VIC)g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 32;
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_Index = 0;

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[0].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_1st_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[0].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_1st_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[0].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_1st_VIC_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[1].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_2nd_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[1].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_2nd_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[1].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_2nd_VIC_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[2].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_3rd_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[2].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_3rd_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[2].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_3rd_VIC_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[3].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_4th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[3].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_4th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[3].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_4th_VIC_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[4].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_5th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[4].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_5th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[4].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_5th_VIC_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[5].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_6th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[5].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_6th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[5].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_6th_VIC_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[6].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_7th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[6].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_7th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[6].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_7th_VIC_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[7].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_8th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[7].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_8th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[7].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_8th_VIC_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[8].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_9th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[8].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_9th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[8].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_9th_VIC_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[9].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_10th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[9].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_10th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[9].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_10th_VIC_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[10].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_11th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[10].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_11th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[10].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_11th_VIC_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[11].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_12th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[11].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_12th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[11].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_12th_VIC_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[12].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_13th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[12].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_13th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[12].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_13th_VIC_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[13].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_14th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[13].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_14th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[13].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_14th_VIC_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[14].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_15th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[14].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_15th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[14].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_15th_VIC_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[15].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_16th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[15].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_16th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[15].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_16th_VIC_TB); 

    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[16].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_17th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[16].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_17th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[16].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_17th_VIC_TB); 
	
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[17].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_18th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[17].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_18th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[17].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_18th_VIC_TB); 
	
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[18].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_19th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[18].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_19th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[18].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_19th_VIC_TB); 
	
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[19].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_20th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[19].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_20th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[19].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_20th_VIC_TB); 
	
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[20].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_21th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[20].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_21th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[20].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_21th_VIC_TB); 
	
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[21].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_22th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[21].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_22th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[21].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_22th_VIC_TB); 
	
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[22].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_23th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[22].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_23th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[22].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_23th_VIC_TB); 
	
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[23].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_24th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[23].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_24th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[23].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_24th_VIC_TB); 
	
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[24].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_25th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[24].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_25th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[24].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_25th_VIC_TB); 
	
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[25].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_26th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[25].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_26th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[25].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_26th_VIC_TB); 
	
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[26].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_27th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[26].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_27th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[26].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_27th_VIC_TB); 
	
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[27].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_28th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[27].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_28th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[27].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_28th_VIC_TB); 
	
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[28].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_29th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[28].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_29th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[28].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_29th_VIC_TB); 
	
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[29].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_30th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[29].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_30th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[29].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_30th_VIC_TB); 
	
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[30].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_31th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[30].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_31th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[30].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_31th_VIC_TB); 
	
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[31].FS_SUPP = (bool_t)(p3D_VIC_Struct->EDID_32th_VIC_FS); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[31].LR_SUPP = (bool_t)(p3D_VIC_Struct->EDID_32th_VIC_LR); 
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_VDI[31].TB_SUPP = (bool_t)(p3D_VIC_Struct->EDID_32th_VIC_TB); 
	DEBUG_PRINT(MSG_DBG, ("CBUS:: Defined 3D Video Format\n"));
	}
	return 1; 
}

//------------------------------------------------------------------------------
//Function:    SI_3DConfig_For_3D_Not_Supported
//Description:
//------------------------------------------------------------------------------
void SI_3DConfig_For_3D_Not_Supported(void)
{
    //DTD related
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_TOT_ENT = 0;
    g_3D_SUPPORT_DTD_VIC_LIST._3D_DTD_Index = 0;

    //SVD related
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_TOT_ENT = 0;
    g_3D_SUPPORT_DTD_VIC_LIST._3D_VIC_Index = 0;
}

//End of add
