/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/

/*-----------------------------------------------------------------------------
 *
 * $Author: brianpc.huang $
 * $Date: 2015/05/29 $
 * $RCSfile: drv_vga.h,v $
 * $Revision: #1 $
 *
 *---------------------------------------------------------------------------*/


#ifndef _DRV_VGA_H_
#define _DRV_VGA_H_

#include "general.h"
#include "hw_vdoin.h"
#ifdef CYJ_20090106
#include "x_tv_dec.h"
#endif

/*======================================================
              crystal number
  ====================================================*/
/*#define CRYSTAL_27M                27
#define CRYSTAL_40M                40

#define CRYSTAL                    CRYSTAL_27M*/

/*========================================================================
             SOURCE
  ========================================================================*/
#define  NO_SIGNAL 0
/*
#define  SEPERATE 0
#define  COMPOSITE 1
#define  SOG 2
*/
/*========================================================================
            Timing Judge Range
  ========================================================================*/
#define HSYNC_UPPER_BD           8 //5	//11
#define HSYNC_LOWER_BD          8 //6	//11
#define VSYNC_UPPER_BD            3
#define VSYNC_LOWER_BD           3

#define VSYNC_INVILID                 7	//Hz

#define VGA_EDID_ADDR 0xa0

/*=====================================================================
          PROCEDURE DEFINE
  ====================================================================*/
/*enum {
	ZERO,
	NOT_FINISHED,
	FINISHED,
	VALID,
	INVALID
};*/

typedef struct VGAWeight		// 2bytes
{
	UINT8 TimingIndex; // Vertical Frequency for timing search
	UINT8 Weight; // Pixel Frequency
}  VGAWeight ; // using __attribute__((packed)) make armcc --gnu  internal fault ?
/*=====================================================================
          MODE Detection State Machine Define
  ====================================================================*/
  enum{
        VGAMD_GET_ACTIVESYNC,
        VGAMD_GET_MODE_N_VTOTAL,
        VGAMD_GET_HTOTAL_N_STDTIME,
        VGAMD_SET_INPUT_CAPTURE,
  	VGAMD_DETECTDONE,
  	VGAMD_AMBCHK,
  	VGAMD_DELAY0,
  	VGAMD_DELAY1,
  	VGAMD_DELAY2,
  	VGAMD_DELAY3,  	
};

/*=====================================================================
          PROCEDURE DEFINE
  ====================================================================*/
#define NEGATIVE   0
#define POSITIVE    1

extern UINT8   _IsVgaDetectDone;
extern UINT8   _IsHdtvDetectDone;
extern UINT8   _bVgaTiming;
extern UINT16   wSP0Hclk;
extern UINT8   _bVgaUserMode;
extern BOOL _RETIMENeedReset;



extern void vVgaConnect(UINT8 bChannel, UINT8 fgIsOn) ;
extern UINT16 wVgaInputWidth(void) ;
extern UINT16 wVgaInputHeight(void) ;
extern UINT8 bVgaRefreshRate(void) ;
extern UINT8 bVgaInterlace(void) ;
extern UINT8 bVgaSigStatus(void) ;
extern void vVgaISR(void) ;

extern void vVgaModeDetect(void) ;
extern void vVgaChkModeChange(void) ;
extern void vVgaSetInputCapature(UINT8 bmode);

void vVGA_SETEDID(UINT8 *pData,UINT16 u2Length);
UINT8 u1VGA_GetEdidData(UINT8 *pData, UINT16 u2Length);
void vVga_EdidOnOffCtrl(UINT8 u1Port, UINT8 u1OnOff);

#define vVgaSetInput(wstart, wwidth)	vHdtvSetInput(wstart, wwidth)
#define vVgaClampWin( wclamp_start, wclamp_end) 	vHdtvClampWin( wclamp_start, wclamp_end) 
#define vVgaReset()	vHdtvReset()
////////////////////////////////////////////////////////////////////////////////
// for CLI */
void vVgaSwReset(void);
void vVgaStatus(void);
UINT8 bVgaCurPhase(void);

/* VGA options ------------------------------*/
extern UINT8 bVgaOpt01_MDmute0; //for MD , waiting lock mute
extern UINT8 bVgaOpt01_MDmute1; //for MD , after lock stable
extern UINT8 bVgaOpt02_MCmute0; //for MC , waiting stable mute
extern UINT8 bVgaOpt02_MCmute1; //for MC , waiting stable mute
extern UINT8 bVgaOpt02_MCmute2; //for MC , waiting stable mute
extern UINT8 bVgaOpt02_MCmute3; //for MC , waiting stable mute
extern UINT8 bVgaOpt03_SoGen; //for MC , waiting stable mute
extern UINT8 bVgaOpt04_SearchHDTV; //for MD, std timing search
extern UINT8 bVgaOpt05_SearchNewMode; //for MD, new mode & user timing search
extern UINT8 bVgaOpt06_SogMaxVsyncWidth ;
extern UINT8 bVgaOpt07_AutoKeepOldVal;
extern UINT8 bVgaOpt08_AutoSP0SwitchMux;

/* VGA options ------------------------------*/

#define QUERY_CUR_AMBIGUOUS_TIMING 0

typedef struct VGAAmbTimingInfo_s
{
    UINT8  bCandiIdx;
    UINT8  bVer_freq;
    UINT16 wHor_res;
    UINT16 wVer_res;

}VGAAmbTimingInfo_t;

/**
 * Enable/Disable to set the ambiguous vga mode with the previous user select
 * mode
 *
 * @param fgUserSel SV_FALSE to disable, otherwise to enable
 * @return none
 */
void vVgaSetAmbiguousUserSel(BOOL fgUserSel);

/**
 * Get # of items of ambiguous VGA in current VGA timing group
 *
 * @param NONE
 * @return # of items of ambiguous VGA timing
 */
UINT8 bVgaGetAmbiguousTimingNum(void);

/**
 * Query certain or current VGA timing details.
 *
 * @param pt_ambig_vga_timing_info structure pointer of struct type "TV_DEC_AMBIG_VGA_TIMING_INFO_T"
 * @return NONE. It will return 1. index in current group, 2. V freq, 3. H resolution, 4. V resolution
 */
void vVgaQueryAmbiguousTiming(UINT8 bCandiIdx, VGAAmbTimingInfo_t *rAmbTiming, UINT8 bSize);

/**
 * Set VGA timing according to input structure pointer.
 *
 * @param pt_vga_timing_option structure pointer of struct type "TV_DEC_VGA_TIMING_OPTION_T"
 * @return NONE.
 */
void vVgaSetAmbiguousTiming(UINT8 bCandiIdx, BOOL fgSetAsDefault);

/**
 * Reset EEPROM of VGA timing to default value.
 *
 * @param NONE.
 * @return TRUE is successful, FALSE has failure.
 */
BOOL vVgaResetAmbiguousTimingEEPROM(void);

void vVgaTriggerModeChange(void);


#endif

