
#ifndef _HW_TDSHARP_H_
#define _HW_TDSHARP_H_

#include "hw_vdoin.h"

#define IO_POSTPROC_BASE  (VDOIN_BASE+0x7000)
#define SRS_BASE (IO_VIRT+0x33000) //0xF0033000

//Page SHARPNESS_1
#define SHARP_00 (IO_POSTPROC_BASE + 0x000)
    #define TDS_EN Fld(1,30,AC_MSKB3)//[30:30]
    #define TDS_BLUR Fld(1,29,AC_MSKB3)//[29:29]
    #define TDS_FLT_LTI_V Fld(2,24,AC_MSKB3)//[25:24]
    #define TDS_FLT_LTI_H2 Fld(2,22,AC_MSKB2)//[23:22]
    #define TDS_FLT_LTI_H1 Fld(2,20,AC_MSKB2)//[21:20]
    #define TDS_DISABLE_LTI_V Fld(1,19,AC_MSKB2)//[19:19]
    #define TDS_DISABLE_LTI_H2 Fld(1,18,AC_MSKB2)//[18:18]
    #define TDS_DISABLE_LTI_H1 Fld(1,17,AC_MSKB2)//[17:17]
    #define TDS_DISABLE_V3 Fld(1,16,AC_MSKB2)//[16:16]
    #define TDS_DISABLE_V2 Fld(1,15,AC_MSKB1)//[15:15]
    #define TDS_DISABLE_V1 Fld(1,14,AC_MSKB1)//[14:14]
    #define TDS_DISABLE_D3 Fld(1,13,AC_MSKB1)//[13:13]
    #define TDS_DISABLE_D2 Fld(1,12,AC_MSKB1)//[12:12]
    #define TDS_DISABLE_D1 Fld(1,11,AC_MSKB1)//[11:11]
    #define TDS_DISABLE_H3 Fld(1,10,AC_MSKB1)//[10:10]
    #define TDS_DISABLE_H2 Fld(1,9,AC_MSKB1)//[9:9]
    #define TDS_DISABLE_H1 Fld(1,8,AC_MSKB1)//[8:8]
    #define SHP_COMBINE_MODE Fld(1,6,AC_MSKB0)//[6:6]
    #define TDS_FLT_V_3D Fld(2,4,AC_MSKB0)//[5:4]
    #define TDS_INK_SEL Fld(4,0,AC_MSKB0)//[3:0]
#define SHARP_01 (IO_POSTPROC_BASE + 0x004)
    #define TDS_V_FILTER_SEL Fld(3,4,AC_MSKB0)//[6:4]
    #define TDS_H_FILTER_SEL Fld(3,0,AC_MSKB0)//[2:0]
#define SHARP_03 (IO_POSTPROC_BASE + 0x00C)
    #define SHP_H1_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_H1_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_H1_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_H1_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_04 (IO_POSTPROC_BASE + 0x010)
    #define SHP_H1_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_H1_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_H1_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_H1_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_05 (IO_POSTPROC_BASE + 0x014)
    #define SHP_H1_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define SHP_H1_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_H1_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_06 (IO_POSTPROC_BASE + 0x018)
    #define SHP_H1_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_H1_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_07 (IO_POSTPROC_BASE + 0x01C)
    #define SHP_H2_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_H2_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_H2_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_H2_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_08 (IO_POSTPROC_BASE + 0x020)
    #define SHP_H2_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_H2_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_H2_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_H2_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_09 (IO_POSTPROC_BASE + 0x024)
    #define SHP_H2_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define SHP_H2_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_H2_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_0A (IO_POSTPROC_BASE + 0x028)
    #define SHP_H2_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_H2_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_0B (IO_POSTPROC_BASE + 0x02C)
    #define SHP_H3_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_H3_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_H3_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_H3_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_0C (IO_POSTPROC_BASE + 0x030)
    #define SHP_H3_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_H3_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_H3_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_H3_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_0D (IO_POSTPROC_BASE + 0x034)
    #define SHP_H3_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define SHP_H3_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_H3_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_0E (IO_POSTPROC_BASE + 0x038)
    #define SHP_H3_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_H3_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_0F (IO_POSTPROC_BASE + 0x03C)
    #define SHP_V1_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_V1_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_V1_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_V1_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_10 (IO_POSTPROC_BASE + 0x040)
    #define SHP_V1_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_V1_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_V1_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_V1_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_11 (IO_POSTPROC_BASE + 0x044)
    #define SHP_V1_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define SHP_V1_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_V1_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_12 (IO_POSTPROC_BASE + 0x048)
    #define SHP_V1_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_V1_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_13 (IO_POSTPROC_BASE + 0x04C)
    #define SHP_V2_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_V2_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_V2_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_V2_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_14 (IO_POSTPROC_BASE + 0x050)
    #define SHP_V2_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_V2_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_V2_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_V2_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_15 (IO_POSTPROC_BASE + 0x054)
    #define SHP_V2_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define SHP_V2_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_V2_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_16 (IO_POSTPROC_BASE + 0x058)
    #define SHP_V2_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_V2_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_17 (IO_POSTPROC_BASE + 0x05C)
    #define SHP_V3_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_V3_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_V3_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_V3_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_18 (IO_POSTPROC_BASE + 0x060)
    #define SHP_V3_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_V3_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_V3_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_V3_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_19 (IO_POSTPROC_BASE + 0x064)
    #define SHP_V3_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define SHP_V3_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_V3_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_1A (IO_POSTPROC_BASE + 0x068)
    #define SHP_V3_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_V3_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_1B (IO_POSTPROC_BASE + 0x06C)
    #define SHP_D1_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_D1_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_D1_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_D1_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_1C (IO_POSTPROC_BASE + 0x070)
    #define SHP_D1_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_D1_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_D1_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_D1_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_1D (IO_POSTPROC_BASE + 0x074)
    #define SHP_D1_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define SHP_D1_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_D1_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_1E (IO_POSTPROC_BASE + 0x078)
    #define SHP_D1_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_D1_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_1F (IO_POSTPROC_BASE + 0x07C)
    #define SHP_D2_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_D2_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_D2_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_D2_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_20 (IO_POSTPROC_BASE + 0x080)
    #define SHP_D2_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_D2_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_D2_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_D2_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_21 (IO_POSTPROC_BASE + 0x084)
    #define SHP_D2_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define SHP_D2_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_D2_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_22 (IO_POSTPROC_BASE + 0x088)
    #define SHP_D2_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_D2_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_23 (IO_POSTPROC_BASE + 0x08C)
    #define SHP_D3_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_D3_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_D3_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_D3_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_24 (IO_POSTPROC_BASE + 0x090)
    #define SHP_D3_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_D3_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_D3_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_D3_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_25 (IO_POSTPROC_BASE + 0x094)
    #define SHP_D3_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define SHP_D3_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_D3_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_26 (IO_POSTPROC_BASE + 0x098)
    #define SHP_D3_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_D3_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_27 (IO_POSTPROC_BASE + 0x09C)
    #define SHP_COMBINED_NEG_GAIN Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_COMBINED_POS_GAIN Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_30 (IO_POSTPROC_BASE + 0x0C0)
    #define SHP_DETAIL_GAIN_MB Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_EDGE_GAIN_MB Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_DETAIL_GAIN_LB Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_EDGE_GAIN_LB Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_31 (IO_POSTPROC_BASE + 0x0C4)
    #define SHP_EDGE_RANK_SEL Fld(2,18,AC_MSKB2)//[19:18]
    #define SHP_DETAIL_RANK_SEL Fld(2,16,AC_MSKB2)//[17:16]
    #define SHP_DETAIL_GAIN_HB Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_EDGE_GAIN_HB Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_32 (IO_POSTPROC_BASE + 0x0C8)
    #define SHP_FLAT_STEP Fld(4,28,AC_MSKB3)//[31:28]
    #define SHP_FLAT_TH Fld(6,22,AC_MSKW32)//[27:22]
    #define SHP_DETAIL_STEP Fld(4,18,AC_MSKB2)//[21:18]
    #define SHP_DETAIL_TH Fld(6,12,AC_MSKW21)//[17:12]
    #define SHP_EDGE_STEP Fld(4,8,AC_MSKB1)//[11:8]
    #define SHP_EDGE_TH Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_33 (IO_POSTPROC_BASE + 0x0CC)
    #define SHP_MIN_MAX_HF Fld(2,30,AC_MSKB3)//[31:30]
    #define SHP_MIN_MAX_XS Fld(11,16,AC_MSKW32)//[26:16]
    #define SHP_MIN_MAX_XE Fld(11,0,AC_MSKW10)//[10:0]
#define SHARP_34 (IO_POSTPROC_BASE + 0x0D0)
    #define SHP_MIN_MAX_VF Fld(2,30,AC_MSKB3)//[31:30]
    #define SHP_MIN_MAX_YS Fld(11,16,AC_MSKW32)//[26:16]
    #define SHP_MIN_MAX_YE Fld(11,0,AC_MSKW10)//[10:0]
#define SHARP_35 (IO_POSTPROC_BASE + 0x0D4)
    #define SHP_REGIONAL_MAX Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_REGIONAL_MIN Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_36 (IO_POSTPROC_BASE + 0x0D8)
    #define TDS_SAT_PROC Fld(6,20,AC_MSKW32)//[25:20]
    #define TDS_SAT_CONSERVATIVE Fld(1,17,AC_MSKB2)//[17:17]
    #define TDS_SAT_121 Fld(1,16,AC_MSKB2)//[16:16]
    #define TDS_SAT_WHITE Fld(5,8,AC_MSKB1)//[12:8]
    #define TDS_SAT_BLACK Fld(5,0,AC_MSKB0)//[4:0]
#define SHARP_40 (IO_POSTPROC_BASE + 0x100)
    #define TDS_HV_EN Fld(1,27,AC_MSKB3)//[27:27]
    #define TDS_HV_SLOPE Fld(3,24,AC_MSKB3)//[26:24]
    #define TDS_HV_MIN Fld(8,16,AC_FULLB2)//[23:16]
    #define TDS_HV_THR Fld(8,8,AC_FULLB1)//[15:8]
    #define TDS_HV_COR Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_41 (IO_POSTPROC_BASE + 0x104)
    #define TDS_AC_LPF_AUTO Fld(1,24,AC_MSKB3)//[24:24]
    #define TDS_AC_LPF_COE_AUTO_STEP Fld(4,20,AC_MSKB2)//[23:20]
    #define TDS_AC_LPF_COE Fld(4,16,AC_MSKB2)//[19:16]
    #define TDS_AC_LPF_HIGH Fld(8,8,AC_FULLB1)//[15:8]
    #define TDS_AC_LPF_LOW Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_42 (IO_POSTPROC_BASE + 0x108)
    #define TDS_TAP_MODE Fld(1,22,AC_MSKB2)//[22:22]
    #define TDS_TAP_EN Fld(1,21,AC_MSKB2)//[21:21]
    #define TDS_TAP_CLIP_EN Fld(1,20,AC_MSKB2)//[20:20]
    #define TDS_TAP_LIMIT Fld(6,12,AC_MSKW21)//[17:12]
    #define TDS_TAP_RATIO Fld(5,4,AC_MSKW10)//[8:4]
    #define TDS_TAP_SRATIO Fld(4,0,AC_MSKB0)//[3:0]
#define SHARP_43 (IO_POSTPROC_BASE + 0x10C)
    #define TDS_NEG_EN_H Fld(1,31,AC_MSKB3)//[31:31]
    #define TDS_NEG_RATIO_H Fld(5,24,AC_MSKB3)//[28:24]
    #define TDS_NEG_LIMIT_H Fld(8,16,AC_FULLB2)//[23:16]
    #define TDS_NEG_EN_V Fld(1,15,AC_MSKB1)//[15:15]
    #define TDS_NEG_RATIO_V Fld(5,8,AC_MSKB1)//[12:8]
    #define TDS_NEG_LIMIT_V Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_44 (IO_POSTPROC_BASE + 0x110)
    #define TDS_NEG_EN_D Fld(1,15,AC_MSKB1)//[15:15]
    #define TDS_NEG_RATIO_D Fld(5,8,AC_MSKB1)//[12:8]
    #define TDS_NEG_LIMIT_D Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_45 (IO_POSTPROC_BASE + 0x114)
    #define TDS_CLIP_EN_MD Fld(1,31,AC_MSKB3)//[31:31]
    #define TDS_CLIP_TAP_MD Fld(1,30,AC_MSKB3)//[30:30]
    #define TDS_CLIP_RATIO_MD Fld(5,24,AC_MSKB3)//[28:24]
    #define TDS_CLIP_THR_MD Fld(8,16,AC_FULLB2)//[23:16]
    #define TDS_CLIP_EN_LH Fld(1,15,AC_MSKB1)//[15:15]
    #define TDS_CLIP_TAP_LH Fld(1,14,AC_MSKB1)//[14:14]
    #define TDS_CLIP_RATIO_LH Fld(5,8,AC_MSKB1)//[12:8]
    #define TDS_CLIP_THR_LH Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_46 (IO_POSTPROC_BASE + 0x118)
    #define TDS_CLIP_EN_LTI_V Fld(1,31,AC_MSKB3)//[31:31]
    #define TDS_CLIP_TAP_LTI_V Fld(1,30,AC_MSKB3)//[30:30]
    #define TDS_CLIP_RATIO_LTI_V Fld(5,24,AC_MSKB3)//[28:24]
    #define TDS_CLIP_THR_LTI_V Fld(8,16,AC_FULLB2)//[23:16]
    #define TDS_CLIP_EN_HV Fld(1,15,AC_MSKB1)//[15:15]
    #define TDS_CLIP_TAP_HV Fld(1,14,AC_MSKB1)//[14:14]
    #define TDS_CLIP_RATIO_HV Fld(5,8,AC_MSKB1)//[12:8]
    #define TDS_CLIP_THR_HV Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_47 (IO_POSTPROC_BASE + 0x11C)
    #define TDS_YLEV_P000 Fld(8,24,AC_FULLB3)//[31:24]
    #define TDS_YLEV_P064 Fld(8,16,AC_FULLB2)//[23:16]
    #define TDS_YLEV_P128 Fld(8,8,AC_FULLB1)//[15:8]
    #define TDS_YLEV_P192 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_48 (IO_POSTPROC_BASE + 0x120)
    #define TDS_YLEV_P256 Fld(8,24,AC_FULLB3)//[31:24]
    #define TDS_YLEV_P320 Fld(8,16,AC_FULLB2)//[23:16]
    #define TDS_YLEV_P384 Fld(8,8,AC_FULLB1)//[15:8]
    #define TDS_YLEV_P448 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_49 (IO_POSTPROC_BASE + 0x124)
    #define TDS_YLEV_P512 Fld(8,24,AC_FULLB3)//[31:24]
    #define TDS_YLEV_P576 Fld(8,16,AC_FULLB2)//[23:16]
    #define TDS_YLEV_P640 Fld(8,8,AC_FULLB1)//[15:8]
    #define TDS_YLEV_P704 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_4A (IO_POSTPROC_BASE + 0x128)
    #define TDS_YLEV_P768 Fld(8,24,AC_FULLB3)//[31:24]
    #define TDS_YLEV_P832 Fld(8,16,AC_FULLB2)//[23:16]
    #define TDS_YLEV_P896 Fld(8,8,AC_FULLB1)//[15:8]
    #define TDS_YLEV_P960 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_4B (IO_POSTPROC_BASE + 0x12C)
    #define TDS_YLEV_P1024 Fld(8,24,AC_FULLB3)//[31:24]
    #define TDS_YLEV_ALPHA Fld(6,16,AC_MSKB2)//[21:16]
    #define TDS_YLEV_SEL Fld(1,15,AC_MSKB1)//[15:15]
    #define TDS_YLEV_EN Fld(1,14,AC_MSKB1)//[14:14]
#define SHARP_4C (IO_POSTPROC_BASE + 0x130)
    #define TDS_VERT_TAP_APT_EN Fld(1,31,AC_MSKB3)//[31:31]
    #define TDS_VERT_TAP_APT_SLOPE Fld(6,24,AC_MSKB3)//[29:24]
    #define TDS_VERT_TAP_APT_EDGE Fld(6,18,AC_MSKB2)//[23:18]
    #define TDS_VERT_TAP_APT_DIFF Fld(6,12,AC_MSKW21)//[17:12]
    #define TDS_VERT_TAP_APT_BACK Fld(6,6,AC_MSKW10)//[11:6]
#define SHARP_4D (IO_POSTPROC_BASE + 0x134)
    #define TDS_HORIZ_TAP_APT_EN Fld(1,31,AC_MSKB3)//[31:31]
    #define TDS_HORIZ_TAP_APT_SLOPE Fld(6,24,AC_MSKB3)//[29:24]
    #define TDS_HORIZ_TAP_APT_EDGE Fld(6,18,AC_MSKB2)//[23:18]
    #define TDS_HORIZ_TAP_APT_DIFF Fld(6,12,AC_MSKW21)//[17:12]
    #define TDS_HORIZ_TAP_APT_BACK_0 Fld(6,6,AC_MSKW10)//[11:6]
    #define TDS_HORIZ_TAP_APT_BACK_1 Fld(6,0,AC_MSKB0)//[5:0]
#define SHARP_4E (IO_POSTPROC_BASE + 0x138)
    #define TDS_HORIZ_TAP_APT_BACK_2 Fld(6,26,AC_MSKB3)//[31:26]
    #define TDS_HORIZ_TAP_APT_BACK_3 Fld(6,20,AC_MSKW32)//[25:20]
    #define TDS_HORIZ_TAP_APT_BACK_H2 Fld(6,14,AC_MSKW21)//[19:14]
    #define TDS_HORIZ_TAP_APT_EDGE_H2 Fld(6,8,AC_MSKB1)//[13:8]
#define SHARP_4F (IO_POSTPROC_BASE + 0x13C)
    #define SHARPNESS_ATPG_CT Fld(1,1,AC_MSKB0)//[1:1]
    #define SHARPNESS_ATPG_OB Fld(1,0,AC_MSKB0)//[0:0]
#define SHARP_50 (IO_POSTPROC_BASE + 0x140)
    #define SHP_LTI_HL_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_LTI_HL_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_LTI_HL_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_LTI_HL_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_51 (IO_POSTPROC_BASE + 0x144)
    #define SHP_LTI_HL_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_LTI_HL_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_LTI_HL_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_LTI_HL_Y4 Fld(8,0,AC_FULLB0)//[7:0]

//Page SHARPNESS_2
#define SHARP_52 (IO_POSTPROC_BASE + 0x148)
    #define SHP_LTI_HL_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define SHP_LTI_HL_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_LTI_HL_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_53 (IO_POSTPROC_BASE + 0x14C)
    #define SHP_LTI_HL_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_LTI_HL_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_54 (IO_POSTPROC_BASE + 0x150)
    #define SHP_LTI_HH_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_LTI_HH_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_LTI_HH_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_LTI_HH_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_55 (IO_POSTPROC_BASE + 0x154)
    #define SHP_LTI_HH_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_LTI_HH_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_LTI_HH_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_LTI_HH_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_56 (IO_POSTPROC_BASE + 0x158)
    #define SHP_LTI_HH_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define SHP_LTI_HH_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_LTI_HH_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_57 (IO_POSTPROC_BASE + 0x15C)
    #define SHP_LTI_HH_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_LTI_HH_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_58 (IO_POSTPROC_BASE + 0x160)
    #define SHP_LTI_V_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_LTI_V_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_LTI_V_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_LTI_V_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_59 (IO_POSTPROC_BASE + 0x164)
    #define SHP_LTI_V_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_LTI_V_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_LTI_V_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_LTI_V_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_5A (IO_POSTPROC_BASE + 0x168)
    #define SHP_LTI_V_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define SHP_LTI_V_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_LTI_V_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_5B (IO_POSTPROC_BASE + 0x16C)
    #define SHP_LTI_V_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_LTI_V_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define SHARP_5C (IO_POSTPROC_BASE + 0x170)
    #define TDS_CLIP_EN_LTI_H2 Fld(1,31,AC_MSKB3)//[31:31]
    #define TDS_CLIP_TAP_LTI_H2 Fld(1,30,AC_MSKB3)//[30:30]
    #define TDS_CLIP_RATIO_LTI_H2 Fld(5,24,AC_MSKB3)//[28:24]
    #define TDS_CLIP_THR_LTI_H2 Fld(8,16,AC_FULLB2)//[23:16]
    #define TDS_CLIP_EN_LTI_H1 Fld(1,15,AC_MSKB1)//[15:15]
    #define TDS_CLIP_TAP_LTI_H1 Fld(1,14,AC_MSKB1)//[14:14]
    #define TDS_CLIP_RATIO_LTI_H1 Fld(5,8,AC_MSKB1)//[12:8]
    #define TDS_CLIP_THR_LTI_H1 Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_5D (IO_POSTPROC_BASE + 0x174)
    #define TDS_CLIP_EN Fld(1,15,AC_MSKB1)//[15:15]
    #define TDS_CLIP_TAP Fld(1,14,AC_MSKB1)//[14:14]
    #define TDS_CLIP_RATIO Fld(5,8,AC_MSKB1)//[12:8]
    #define TDS_CLIP_THR Fld(8,0,AC_FULLB0)//[7:0]
#define SHARP_5E (IO_POSTPROC_BASE + 0x178)
    #define SHP_RESERVED Fld(32,0,AC_FULLDW)//[31:0]


//Page CDS_1
#define CDS_00 (IO_POSTPROC_BASE + 0x600)
    #define CDS1_EN Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS1_MODE_SEL Fld(1,28,AC_MSKB3)//[28:28]
    #define CDS1_ALPHA_1 Fld(12,16,AC_MSKW32)//[27:16]
    #define CDS1_D_THETA Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_D_RADIUS Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_01 (IO_POSTPROC_BASE + 0x604)
    #define CDS1_THETA_C1 Fld(10,22,AC_MSKW32)//[31:22]
    #define CDS1_RADIUS_C1 Fld(10,12,AC_MSKW21)//[21:12]
    #define CDS1_BETA Fld(12,0,AC_MSKW10)//[11:0]
#define CDS_02 (IO_POSTPROC_BASE + 0x608)
    #define CDS1_THETA_C2 Fld(10,22,AC_MSKW32)//[31:22]
    #define CDS1_RADIUS_C2 Fld(10,12,AC_MSKW21)//[21:12]
    #define CDS1_MAX_RADIUS_GAIN Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_03 (IO_POSTPROC_BASE + 0x60C)
    #define CDS1_ALPHA Fld(12,20,AC_MSKW32)//[31:20]
    #define CDS1_EDGE_EN Fld(1,19,AC_MSKB2)//[19:19]
    #define CDS1_EDGE_THRESHOLD Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_EDGE_SLOPE Fld(6,0,AC_MSKB0)//[5:0]
#define CDS_04 (IO_POSTPROC_BASE + 0x610)
    #define CDS1_CONF_GAIN Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_LPF_STRENGTH Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_LPF_EN Fld(1,15,AC_MSKB1)//[15:15]
    #define CDS1_MAX_THETA_GAIN Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_06 (IO_POSTPROC_BASE + 0x618)
    #define CDS1_H1_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_H1_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_H1_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_H1_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_07 (IO_POSTPROC_BASE + 0x61C)
    #define CDS1_H1_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_H1_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_H1_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_H1_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_08 (IO_POSTPROC_BASE + 0x620)
    #define CDS1_H1_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS1_H1_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_H1_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_09 (IO_POSTPROC_BASE + 0x624)
    #define CDS1_H1_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_H1_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_0A (IO_POSTPROC_BASE + 0x628)
    #define CDS1_H2_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_H2_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_H2_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_H2_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_0B (IO_POSTPROC_BASE + 0x62C)
    #define CDS1_H2_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_H2_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_H2_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_H2_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_0C (IO_POSTPROC_BASE + 0x630)
    #define CDS1_H2_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS1_H2_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_H2_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_0D (IO_POSTPROC_BASE + 0x634)
    #define CDS1_H2_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_H2_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_0E (IO_POSTPROC_BASE + 0x638)
    #define CDS1_H3_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_H3_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_H3_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_H3_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_0F (IO_POSTPROC_BASE + 0x63C)
    #define CDS1_H3_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_H3_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_H3_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_H3_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_10 (IO_POSTPROC_BASE + 0x640)
    #define CDS1_H3_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS1_H3_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_H3_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_11 (IO_POSTPROC_BASE + 0x644)
    #define CDS1_H3_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_H3_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_12 (IO_POSTPROC_BASE + 0x648)
    #define CDS1_V1_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_V1_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_V1_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_V1_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_13 (IO_POSTPROC_BASE + 0x64C)
    #define CDS1_V1_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_V1_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_V1_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_V1_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_14 (IO_POSTPROC_BASE + 0x650)
    #define CDS1_V1_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS1_V1_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_V1_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_15 (IO_POSTPROC_BASE + 0x654)
    #define CDS1_V1_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_V1_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_16 (IO_POSTPROC_BASE + 0x658)
    #define CDS1_V2_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_V2_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_V2_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_V2_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_17 (IO_POSTPROC_BASE + 0x65C)
    #define CDS1_V2_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_V2_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_V2_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_V2_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_18 (IO_POSTPROC_BASE + 0x660)
    #define CDS1_V2_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS1_V2_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_V2_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_19 (IO_POSTPROC_BASE + 0x664)
    #define CDS1_V2_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_V2_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_1A (IO_POSTPROC_BASE + 0x668)
    #define CDS1_V3_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_V3_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_V3_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_V3_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_1B (IO_POSTPROC_BASE + 0x66C)
    #define CDS1_V3_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_V3_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_V3_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_V3_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_1C (IO_POSTPROC_BASE + 0x670)
    #define CDS1_V3_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS1_V3_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_V3_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_1D (IO_POSTPROC_BASE + 0x674)
    #define CDS1_V3_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_V3_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_1E (IO_POSTPROC_BASE + 0x678)
    #define CDS1_D1_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_D1_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_D1_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_D1_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_1F (IO_POSTPROC_BASE + 0x67C)
    #define CDS1_D1_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_D1_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_D1_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_D1_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_20 (IO_POSTPROC_BASE + 0x680)
    #define CDS1_D1_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS1_D1_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_D1_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_21 (IO_POSTPROC_BASE + 0x684)
    #define CDS1_D1_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_D1_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_22 (IO_POSTPROC_BASE + 0x688)
    #define CDS1_D2_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_D2_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_D2_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_D2_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_23 (IO_POSTPROC_BASE + 0x68C)
    #define CDS1_D2_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_D2_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_D2_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_D2_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_24 (IO_POSTPROC_BASE + 0x690)
    #define CDS1_D2_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS1_D2_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_D2_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_25 (IO_POSTPROC_BASE + 0x694)
    #define CDS1_D2_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_D2_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_26 (IO_POSTPROC_BASE + 0x698)
    #define CDS1_D3_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_D3_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_D3_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_D3_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_27 (IO_POSTPROC_BASE + 0x69C)
    #define CDS1_D3_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS1_D3_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS1_D3_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS1_D3_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_28 (IO_POSTPROC_BASE + 0x6A0)
    #define CDS1_D3_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS1_D3_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_D3_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_29 (IO_POSTPROC_BASE + 0x6A4)
    #define CDS1_D3_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS1_D3_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_2A (IO_POSTPROC_BASE + 0x6A8)
    #define CDS2_EN Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS2_MODE_SEL Fld(1,28,AC_MSKB3)//[28:28]
    #define CDS2_ALPHA_1 Fld(12,16,AC_MSKW32)//[27:16]
    #define CDS2_D_THETA Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_D_RADIUS Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_2B (IO_POSTPROC_BASE + 0x6AC)
    #define CDS2_THETA_C1 Fld(10,22,AC_MSKW32)//[31:22]
    #define CDS2_RADIUS_C1 Fld(10,12,AC_MSKW21)//[21:12]
    #define CDS2_BETA Fld(12,0,AC_MSKW10)//[11:0]
#define CDS_2C (IO_POSTPROC_BASE + 0x6B0)
    #define CDS2_THETA_C2 Fld(10,22,AC_MSKW32)//[31:22]
    #define CDS2_RADIUS_C2 Fld(10,12,AC_MSKW21)//[21:12]
    #define CDS2_MAX_RADIUS_GAIN Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_2D (IO_POSTPROC_BASE + 0x6B4)
    #define CDS2_ALPHA Fld(12,20,AC_MSKW32)//[31:20]
    #define CDS2_EDGE_EN Fld(1,19,AC_MSKB2)//[19:19]
    #define CDS2_EDGE_THRESHOLD Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_EDGE_SLOPE Fld(6,0,AC_MSKB0)//[5:0]
#define CDS_2E (IO_POSTPROC_BASE + 0x6B8)
    #define CDS2_CONF_GAIN Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_LPF_STRENGTH Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_LPF_EN Fld(1,15,AC_MSKB1)//[15:15]
    #define CDS2_MAX_THETA_GAIN Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_30 (IO_POSTPROC_BASE + 0x6C0)
    #define CDS2_H1_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_H1_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_H1_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_H1_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_31 (IO_POSTPROC_BASE + 0x6C4)
    #define CDS2_H1_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_H1_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_H1_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_H1_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_32 (IO_POSTPROC_BASE + 0x6C8)
    #define CDS2_H1_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS2_H1_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_H1_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_33 (IO_POSTPROC_BASE + 0x6CC)
    #define CDS2_H1_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_H1_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_34 (IO_POSTPROC_BASE + 0x6D0)
    #define CDS2_H2_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_H2_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_H2_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_H2_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_35 (IO_POSTPROC_BASE + 0x6D4)
    #define CDS2_H2_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_H2_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_H2_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_H2_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_36 (IO_POSTPROC_BASE + 0x6D8)
    #define CDS2_H2_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS2_H2_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_H2_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_37 (IO_POSTPROC_BASE + 0x6DC)
    #define CDS2_H2_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_H2_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_38 (IO_POSTPROC_BASE + 0x6E0)
    #define CDS2_H3_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_H3_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_H3_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_H3_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_39 (IO_POSTPROC_BASE + 0x6E4)
    #define CDS2_H3_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_H3_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_H3_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_H3_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_3A (IO_POSTPROC_BASE + 0x6E8)
    #define CDS2_H3_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS2_H3_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_H3_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_3B (IO_POSTPROC_BASE + 0x6EC)
    #define CDS2_H3_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_H3_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_3C (IO_POSTPROC_BASE + 0x6F0)
    #define CDS2_V1_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_V1_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_V1_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_V1_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_3D (IO_POSTPROC_BASE + 0x6F4)
    #define CDS2_V1_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_V1_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_V1_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_V1_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_3E (IO_POSTPROC_BASE + 0x6F8)
    #define CDS2_V1_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS2_V1_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_V1_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_3F (IO_POSTPROC_BASE + 0x6FC)
    #define CDS2_V1_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_V1_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_40 (IO_POSTPROC_BASE + 0x700)
    #define CDS2_V2_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_V2_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_V2_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_V2_Y2 Fld(8,0,AC_FULLB0)//[7:0]

//Page CDS_2
#define CDS_41 (IO_POSTPROC_BASE + 0x704)
    #define CDS2_V2_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_V2_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_V2_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_V2_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_42 (IO_POSTPROC_BASE + 0x708)
    #define CDS2_V2_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS2_V2_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_V2_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_43 (IO_POSTPROC_BASE + 0x70C)
    #define CDS2_V2_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_V2_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_44 (IO_POSTPROC_BASE + 0x710)
    #define CDS2_V3_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_V3_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_V3_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_V3_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_45 (IO_POSTPROC_BASE + 0x714)
    #define CDS2_V3_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_V3_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_V3_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_V3_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_46 (IO_POSTPROC_BASE + 0x718)
    #define CDS2_V3_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS2_V3_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_V3_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_47 (IO_POSTPROC_BASE + 0x71C)
    #define CDS2_V3_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_V3_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_48 (IO_POSTPROC_BASE + 0x720)
    #define CDS2_D1_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_D1_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_D1_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_D1_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_49 (IO_POSTPROC_BASE + 0x724)
    #define CDS2_D1_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_D1_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_D1_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_D1_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_4A (IO_POSTPROC_BASE + 0x728)
    #define CDS2_D1_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS2_D1_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_D1_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_4B (IO_POSTPROC_BASE + 0x72C)
    #define CDS2_D1_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_D1_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_4C (IO_POSTPROC_BASE + 0x730)
    #define CDS2_D2_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_D2_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_D2_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_D2_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_4D (IO_POSTPROC_BASE + 0x734)
    #define CDS2_D2_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_D2_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_D2_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_D2_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_4E (IO_POSTPROC_BASE + 0x738)
    #define CDS2_D2_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS2_D2_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_D2_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_4F (IO_POSTPROC_BASE + 0x73C)
    #define CDS2_D2_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_D2_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_50 (IO_POSTPROC_BASE + 0x740)
    #define CDS2_D3_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_D3_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_D3_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_D3_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_51 (IO_POSTPROC_BASE + 0x744)
    #define CDS2_D3_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS2_D3_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS2_D3_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS2_D3_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_52 (IO_POSTPROC_BASE + 0x748)
    #define CDS2_D3_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS2_D3_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_D3_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_53 (IO_POSTPROC_BASE + 0x74C)
    #define CDS2_D3_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS2_D3_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_54 (IO_POSTPROC_BASE + 0x750)
    #define CDS3_EN Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS3_MODE_SEL Fld(1,28,AC_MSKB3)//[28:28]
    #define CDS3_ALPHA_1 Fld(12,16,AC_MSKW32)//[27:16]
    #define CDS3_D_THETA Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_D_RADIUS Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_55 (IO_POSTPROC_BASE + 0x754)
    #define CDS3_THETA_C1 Fld(10,22,AC_MSKW32)//[31:22]
    #define CDS3_RADIUS_C1 Fld(10,12,AC_MSKW21)//[21:12]
    #define CDS3_BETA Fld(12,0,AC_MSKW10)//[11:0]
#define CDS_56 (IO_POSTPROC_BASE + 0x758)
    #define CDS3_THETA_C2 Fld(10,22,AC_MSKW32)//[31:22]
    #define CDS3_RADIUS_C2 Fld(10,12,AC_MSKW21)//[21:12]
    #define CDS3_MAX_RADIUS_GAIN Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_57 (IO_POSTPROC_BASE + 0x75C)
    #define CDS3_ALPHA Fld(12,20,AC_MSKW32)//[31:20]
    #define CDS3_EDGE_EN Fld(1,19,AC_MSKB2)//[19:19]
    #define CDS3_EDGE_THRESHOLD Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_EDGE_SLOPE Fld(6,0,AC_MSKB0)//[5:0]
#define CDS_58 (IO_POSTPROC_BASE + 0x760)
    #define CDS3_CONF_GAIN Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_LPF_STRENGTH Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_LPF_EN Fld(1,15,AC_MSKB1)//[15:15]
    #define CDS3_MAX_THETA_GAIN Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_59 (IO_POSTPROC_BASE + 0x764)
    #define CDS3_H1_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_H1_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_H1_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_H1_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_5A (IO_POSTPROC_BASE + 0x768)
    #define CDS3_H1_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_H1_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_H1_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_H1_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_5B (IO_POSTPROC_BASE + 0x76C)
    #define CDS3_H1_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS3_H1_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_H1_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_5C (IO_POSTPROC_BASE + 0x770)
    #define CDS3_H1_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_H1_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_5D (IO_POSTPROC_BASE + 0x774)
    #define CDS3_H2_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_H2_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_H2_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_H2_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_5E (IO_POSTPROC_BASE + 0x778)
    #define CDS3_H2_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_H2_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_H2_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_H2_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_5F (IO_POSTPROC_BASE + 0x77C)
    #define CDS3_H2_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS3_H2_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_H2_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_60 (IO_POSTPROC_BASE + 0x780)
    #define CDS3_H2_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_H2_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_61 (IO_POSTPROC_BASE + 0x784)
    #define CDS3_H3_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_H3_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_H3_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_H3_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_62 (IO_POSTPROC_BASE + 0x788)
    #define CDS3_H3_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_H3_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_H3_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_H3_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_63 (IO_POSTPROC_BASE + 0x78C)
    #define CDS3_H3_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS3_H3_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_H3_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_64 (IO_POSTPROC_BASE + 0x790)
    #define CDS3_H3_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_H3_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_65 (IO_POSTPROC_BASE + 0x794)
    #define CDS3_V1_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_V1_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_V1_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_V1_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_66 (IO_POSTPROC_BASE + 0x798)
    #define CDS3_V1_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_V1_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_V1_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_V1_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_67 (IO_POSTPROC_BASE + 0x79C)
    #define CDS3_V1_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS3_V1_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_V1_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_68 (IO_POSTPROC_BASE + 0x7A0)
    #define CDS3_V1_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_V1_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_69 (IO_POSTPROC_BASE + 0x7A4)
    #define CDS3_V2_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_V2_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_V2_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_V2_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_6A (IO_POSTPROC_BASE + 0x7A8)
    #define CDS3_V2_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_V2_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_V2_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_V2_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_6B (IO_POSTPROC_BASE + 0x7AC)
    #define CDS3_V2_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS3_V2_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_V2_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_6C (IO_POSTPROC_BASE + 0x7B0)
    #define CDS3_V2_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_V2_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_6D (IO_POSTPROC_BASE + 0x7B4)
    #define CDS3_V3_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_V3_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_V3_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_V3_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_6E (IO_POSTPROC_BASE + 0x7B8)
    #define CDS3_V3_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_V3_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_V3_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_V3_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_6F (IO_POSTPROC_BASE + 0x7BC)
    #define CDS3_V3_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS3_V3_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_V3_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_70 (IO_POSTPROC_BASE + 0x7C0)
    #define CDS3_V3_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_V3_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_71 (IO_POSTPROC_BASE + 0x7C4)
    #define CDS3_D1_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_D1_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_D1_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_D1_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_72 (IO_POSTPROC_BASE + 0x7C8)
    #define CDS3_D1_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_D1_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_D1_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_D1_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_73 (IO_POSTPROC_BASE + 0x7CC)
    #define CDS3_D1_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS3_D1_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_D1_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_74 (IO_POSTPROC_BASE + 0x7D0)
    #define CDS3_D1_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_D1_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_75 (IO_POSTPROC_BASE + 0x7D4)
    #define CDS3_D2_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_D2_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_D2_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_D2_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_76 (IO_POSTPROC_BASE + 0x7D8)
    #define CDS3_D2_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_D2_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_D2_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_D2_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_77 (IO_POSTPROC_BASE + 0x7DC)
    #define CDS3_D2_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS3_D2_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_D2_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_78 (IO_POSTPROC_BASE + 0x7E0)
    #define CDS3_D2_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_D2_S34 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_79 (IO_POSTPROC_BASE + 0x7E4)
    #define CDS3_D3_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_D3_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_D3_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_D3_Y2 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_7A (IO_POSTPROC_BASE + 0x7E8)
    #define CDS3_D3_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define CDS3_D3_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define CDS3_D3_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define CDS3_D3_Y4 Fld(8,0,AC_FULLB0)//[7:0]
#define CDS_7B (IO_POSTPROC_BASE + 0x7EC)
    #define CDS3_D3_BYPASS_CP4 Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS3_D3_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_D3_S12 Fld(14,0,AC_MSKW10)//[13:0]
#define CDS_7C (IO_POSTPROC_BASE + 0x7F0)
    #define CDS_ATPG_CT Fld(1,31,AC_MSKB3)//[31:31]
    #define CDS_ATPG_OB Fld(1,30,AC_MSKB3)//[30:30]
    #define CDS3_D3_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define CDS3_D3_S34 Fld(14,0,AC_MSKW10)//[13:0]

	// Define AC Curve Fld
	#define SHP_X1 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_Y1 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_X2 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_Y2 Fld(8,0,AC_FULLB0)//[7:0]
    #define SHP_X3 Fld(8,24,AC_FULLB3)//[31:24]
    #define SHP_Y3 Fld(8,16,AC_FULLB2)//[23:16]
    #define SHP_X4 Fld(8,8,AC_FULLB1)//[15:8]
    #define SHP_Y4 Fld(8,0,AC_FULLB0)//[7:0]
    #define SHP_S01 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_S12 Fld(14,0,AC_MSKW10)//[13:0]
    #define SHP_S23 Fld(14,16,AC_MSKW32)//[29:16]
    #define SHP_S34 Fld(14,0,AC_MSKW10)//[13:0]

//Page CTIR
#define CTIR_00 (IO_POSTPROC_BASE + 0x280)
    #define CTIR_HUE_TIE Fld(1,28,AC_MSKB3)//[28:28]
    #define CTIR_FLPF Fld(1,12,AC_MSKB1)//[12:12]
    #define CTIR_FLPF_SEL Fld(1,11,AC_MSKB1)//[11:11]
    #define CTIR_DX_SGN Fld(1,9,AC_MSKB1)//[9:9]
    #define CTIR_PRT_ENA Fld(1,6,AC_MSKB0)//[6:6]
    #define CTIR_SGN_PRT Fld(1,5,AC_MSKB0)//[5:5]
    #define CTIR_HD Fld(1,4,AC_MSKB0)//[4:4]
    #define CTIR_INK Fld(1,3,AC_MSKB0)//[3:3]
    #define CTIR_ENA Fld(1,0,AC_MSKB0)//[0:0]
#define CTIR_01 (IO_POSTPROC_BASE + 0x284)
    #define CTIR_LPF3 Fld(1,26,AC_MSKB3)//[26:26]
    #define CTIR_LPF3_SEL Fld(2,24,AC_MSKB3)//[25:24]
    #define CTIR_LPF2 Fld(1,22,AC_MSKB2)//[22:22]
    #define CTIR_LPF2_SEL Fld(2,20,AC_MSKB2)//[21:20]
    #define CTIR_LPF1 Fld(1,18,AC_MSKB2)//[18:18]
    #define CTIR_LPF1_SEL Fld(2,16,AC_MSKB2)//[17:16]
    #define CTIR_FIX_SZ Fld(3,12,AC_MSKB1)//[14:12]
    #define CTIR_FIX Fld(1,11,AC_MSKB1)//[11:11]
    #define CTIR_SEXT_LARGE Fld(1,10,AC_MSKB1)//[10:10]
    #define CTIR_SEXT Fld(1,9,AC_MSKB1)//[9:9]
    #define CTIR_SGN Fld(1,8,AC_MSKB1)//[8:8]
    #define CTIR_SGN_TH Fld(8,0,AC_FULLB0)//[7:0]
#define CTIR_02 (IO_POSTPROC_BASE + 0x288)
    #define CTIR_U_STB_OFST2 Fld(8,24,AC_FULLB3)//[31:24]
    #define CTIR_U_STB_GAIN Fld(8,16,AC_FULLB2)//[23:16]
    #define CTIR_U_STB_OFST1 Fld(8,8,AC_FULLB1)//[15:8]
    #define CTIR_U_WND_SZ Fld(3,0,AC_MSKB0)//[2:0]
#define CTIR_03 (IO_POSTPROC_BASE + 0x28C)
    #define CTIR_V_STB_OFST2 Fld(8,24,AC_FULLB3)//[31:24]
    #define CTIR_V_STB_GAIN Fld(8,16,AC_FULLB2)//[23:16]
    #define CTIR_V_STB_OFST1 Fld(8,8,AC_FULLB1)//[15:8]
    #define CTIR_V_WND_SZ Fld(3,0,AC_MSKB0)//[2:0]
#define CTIR_04 (IO_POSTPROC_BASE + 0x290)
    #define CTIR_FLAT_OFST2 Fld(8,24,AC_FULLB3)//[31:24]
    #define CTIR_FLAT_GAIN Fld(8,16,AC_FULLB2)//[23:16]
    #define CTIR_FLAT_OFST1 Fld(8,8,AC_FULLB1)//[15:8]
    #define CTIR_FLAT_MODE Fld(1,6,AC_MSKB0)//[6:6]
    #define CTIR_FLAT_TIE Fld(1,5,AC_MSKB0)//[5:5]
    #define CTIR_FLAT_BYPASS Fld(1,4,AC_MSKB0)//[4:4]
    #define CTIR_FLAT_SZ Fld(3,0,AC_MSKB0)//[2:0]
#define CTIR_05 (IO_POSTPROC_BASE + 0x294)
    #define CTIR_COR Fld(8,0,AC_FULLB0)//[7:0]
#define CTIR_07 (IO_POSTPROC_BASE + 0x29C)
    #define CTIR_ATPG_CT Fld(1,31,AC_MSKB3)//[31:31]
    #define CTIR_ATPG_OB Fld(1,30,AC_MSKB3)//[30:30]

//Page MISC
#define SP_MASK_00 (IO_POSTPROC_BASE + 0x340)
    #define CH1_H_DMWINDOW_END Fld(16,16,AC_FULLW32)//[31:16]
    #define CH1_H_DMWINDOW_START Fld(16,0,AC_FULLW10)//[15:0]
#define SP_MASK_01 (IO_POSTPROC_BASE + 0x344)
    #define CH1_V_DMWINDOW_END Fld(16,16,AC_FULLW32)//[31:16]
    #define CH1_V_DMWINDOW_START Fld(16,0,AC_FULLW10)//[15:0]
#define TDPROC_MISC_00 (IO_POSTPROC_BASE + 0x350)
    #define PPCM_SUB_PATGEN_VSE Fld(1,31,AC_MSKB3)//[31:31]
    #define ECTI_DEMO_SWAP Fld(1,26,AC_MSKB3)//[26:26]
    #define ECTI_DEMO_ENA Fld(1,25,AC_MSKB3)//[25:25]
    #define TDS_DEMO_SWAP Fld(1,24,AC_MSKB3)//[24:24]
    #define TDS_DEMO_ENA Fld(1,23,AC_MSKB2)//[23:23]
    #define TDPROC_BYPASS_ALL Fld(1,22,AC_MSKB2)//[22:22]
    #define NO_VERTICAL_SHARP Fld(1,20,AC_MSKB2)//[20:20]
    #define TDPROC_PATGEN_VSEL Fld(1,19,AC_MSKB2)//[19:19]
    #define TDPROC_PATGEN_USEL Fld(1,18,AC_MSKB2)//[18:18]
    #define TDPROC_PATGEN_YSEL Fld(1,17,AC_MSKB2)//[17:17]
    #define PATGEN_CTRL_EN Fld(1,16,AC_MSKB2)//[16:16]
    #define PATGEN_HVSEL Fld(1,12,AC_MSKB1)//[12:12]
    #define TDPROC_PATGEN_DATA_EN Fld(1,11,AC_MSKB1)//[11:11]
    #define TDPROC_PATGEN_MODE Fld(3,8,AC_MSKB1)//[10:8]
    #define TDPROC_C_SHP_DSR_DLY_SEL Fld(4,4,AC_MSKB0)//[7:4]
    //#define LINEBUF_4SRS_EN Fld(1,3,AC_MSKB0)//[3:3]
    #define TDPROC_DGB Fld(3,0,AC_MSKB0)//[2:0]
#define TDPROC_MISC_01 (IO_POSTPROC_BASE + 0x354)
    #define C_SHP_DSR_EN Fld(1,31,AC_MSKB3)//[31:31]
    #define TDPROC_RND_LD Fld(1,30,AC_MSKB3)//[30:30]
    #define TDPRCO_RND_SEED Fld(30,0,AC_MSKDW)//[29:0]
#define TDPROC_MISC_02 (IO_POSTPROC_BASE + 0x358)
    #define TDPROC_VSW Fld(16,16,AC_FULLW32)//[31:16]
    #define TDPROC_VPORCH Fld(16,0,AC_FULLW10)//[15:0]
#define TDPROC_MISC_03 (IO_POSTPROC_BASE + 0x35C)
    #define TDPROC_HSW Fld(16,16,AC_FULLW32)//[31:16]
    #define TDPROC_HPORCH Fld(16,0,AC_FULLW10)//[15:0]
#define TDPROC_MISC_04 (IO_POSTPROC_BASE + 0x360)
    #define TDPROC_PICH Fld(16,16,AC_FULLW32)//[31:16]
    #define TDPROC_PICW Fld(16,0,AC_FULLW10)//[15:0]
#define TDPROC_MISC_05 (IO_POSTPROC_BASE + 0x364)
    #define TDPROC_INK_YPOS Fld(16,16,AC_FULLW32)//[31:16]
    #define TDPROC_INK_XPOS Fld(16,0,AC_FULLW10)//[15:0]
#define TDPROC_MISC_06 (IO_POSTPROC_BASE + 0x368)
    #define CH1_LCRC_EN Fld(1,31,AC_MSKB3)//[31:31]
    #define CH1_RCRC_EN Fld(1,30,AC_MSKB3)//[30:30]
    #define CH1_Y_CRC_MASK Fld(10,20,AC_MSKW32)//[29:20]
    #define CH1_CB_CRC_MASK Fld(10,10,AC_MSKW21)//[19:10]
    #define CH1_CR_CRC_MASK Fld(10,0,AC_MSKW10)//[9:0]
#define TDPROC_MISC_07 (IO_POSTPROC_BASE + 0x36C)
    #define CH1_CRC_CLIP_H_END Fld(13,16,AC_MSKW32)//[28:16]
    #define CH1_CRC_CLIP_H_START Fld(13,0,AC_MSKW10)//[12:0]
#define TDPROC_MISC_08 (IO_POSTPROC_BASE + 0x370)
    #define CH1_CRC_CLIP_V_END Fld(12,16,AC_MSKW32)//[27:16]
    #define CH1_CRC_CLIP_V_START Fld(12,0,AC_MSKW10)//[11:0]
#define TDPROC_MISC_09 (IO_POSTPROC_BASE + 0x374)
    #define CH1_CRC_RESULT Fld(32,0,AC_FULLDW)//[31:0]
#define TDPROC_MISC_0D (IO_POSTPROC_BASE + 0x384)
    #define CH2_CRC_RESULT Fld(32,0,AC_FULLDW)//[31:0]
#define TDPROC_MISC_0E (IO_POSTPROC_BASE + 0x388)
    #define CH2_CRC_STILL_CNT Fld(16,16,AC_FULLW32)//[31:16]
    #define CH1_CRC_STILL_CNT Fld(16,0,AC_FULLW10)//[15:0]
#define TDPROC_MISC_0F (IO_POSTPROC_BASE + 0x38C)
    #define CORE_RST Fld(1,31,AC_MSKB3)//[31:31]
    #define DISPRCNTEN Fld(1,29,AC_MSKB3)//[29:29]
    #define CRCIN_SEL Fld(4,24,AC_MSKB3)//[27:24]
    #define CH1_CRC_STILL_MAX Fld(8,8,AC_FULLB1)//[15:8]
    #define C_BYPASS_DISP_R Fld(1,5,AC_MSKB0)//[5:5]
    #define C_CRC_STILL_CNT_SEL Fld(1,4,AC_MSKB0)//[4:4]
    #define CH1_CRC_STILL_TRG Fld(1,2,AC_MSKB0)//[2:2]
    #define MISC_ATPG_CT Fld(1,1,AC_MSKB0)//[1:1]
    #define MISC_ATPG_OB Fld(1,0,AC_MSKB0)//[0:0]

//Page CBE
#define CBE_00 (IO_POSTPROC_BASE + 0x2C0)
    #define CBEENABLE Fld(1,31,AC_MSKB3)//[31:31]
    #define CBEINKMODE Fld(4,24,AC_MSKB3)//[27:24]
    #define CBE_THR_K7X3_IT3 Fld(7,16,AC_MSKB2)//[22:16]
    #define CBE_W_IT3 Fld(7,8,AC_MSKB1)//[14:8]
    #define CBE_W_IT5 Fld(7,0,AC_MSKB0)//[6:0]
#define CBE_01 (IO_POSTPROC_BASE + 0x2C4)
    #define CBE_THR_K7X3_IT5 Fld(7,8,AC_MSKB1)//[14:8]
    #define CBE_THR_K5X3_IT5 Fld(7,0,AC_MSKB0)//[6:0]
#define CBE_02 (IO_POSTPROC_BASE + 0x2C8)
    #define CBE_THR_K5X3_IT3 Fld(7,8,AC_MSKB1)//[14:8]
    #define CBE_THR_K3X3_IT3 Fld(7,0,AC_MSKB0)//[6:0]
#define CBE_05 (IO_POSTPROC_BASE + 0x2D4)
    #define CBE_ATPG_OB Fld(1,31,AC_MSKB3)//[31:31]
    #define CBE_ATPG_CT Fld(1,30,AC_MSKB3)//[30:30]
    #define BYPASS_CBE Fld(1,2,AC_MSKB0)//[2:2]
    #define CBE_DEMO Fld(1,1,AC_MSKB0)//[1:1]
    #define CBE_DEMO_INV Fld(1,0,AC_MSKB0)//[0:0]
	//Page EDF
#define EDF_00 (IO_POSTPROC_BASE + 0x400)
    #define EDF_GAIN_EN Fld(1,31,AC_MSKB3)//[31:31]
    #define EDF_SEL Fld(1,30,AC_MSKB3)//[30:30]
    #define EDF_NEG_WGT Fld(5,8,AC_MSKB1)//[12:8]
#define EDF_01 (IO_POSTPROC_BASE + 0x404)
    #define EDF_FLAT_TH Fld(6,25,AC_MSKB3)//[30:25]
    #define EDF_DETAIL_RISE_TH Fld(6,18,AC_MSKB2)//[23:18]
    #define EDF_DETAIL_FALL_TH Fld(9,9,AC_MSKW21)//[17:9]
    #define EDF_EDGE_TH Fld(9,0,AC_MSKW10)//[8:0]
#define EDF_02 (IO_POSTPROC_BASE + 0x408)
    #define EDF_FLAT_SLOPE Fld(3,24,AC_MSKB3)//[26:24]
    #define EDF_DETAIL_RISE_SLOPE Fld(3,16,AC_MSKB2)//[18:16]
    #define EDF_DETAIL_FALL_SLOPE Fld(5,8,AC_MSKB1)//[12:8]
    #define EDF_EDGE_SLOPE Fld(5,0,AC_MSKB0)//[4:0]
#define EDF_03 (IO_POSTPROC_BASE + 0x40C)
    #define EDF_EDGE_MAG_TH Fld(5,24,AC_MSKB3)//[28:24]
    #define EDF_EDGE_MAG_SLOPE Fld(5,16,AC_MSKB2)//[20:16]
    #define EDF_EDGE_MONO_TH Fld(7,8,AC_MSKB1)//[14:8]
    #define EDF_EDGE_MONO_SLOPE Fld(4,0,AC_MSKB0)//[3:0]
#define EDF_04 (IO_POSTPROC_BASE + 0x410)
    #define EDF_EDGE_TREND_TH Fld(6,24,AC_MSKB3)//[29:24]
    #define EDF_EDGE_TREND_SLOPE Fld(5,16,AC_MSKB2)//[20:16]
    #define EDF_EDGE_TREND_FLAT_MAG Fld(5,8,AC_MSKB1)//[12:8]
#define EDF_05 (IO_POSTPROC_BASE + 0x414)
    #define EDF_BLD_WGT_TREND Fld(8,16,AC_FULLB2)//[23:16]
    #define EDF_BLD_WGT_MONO Fld(8,8,AC_FULLB1)//[15:8]
    #define EDF_BLD_WGT_MAG Fld(8,0,AC_FULLB0)//[7:0]
#define EDF_06 (IO_POSTPROC_BASE + 0x418)
    #define EDF_FLAT_GAIN_H Fld(8,16,AC_FULLB2)//[23:16]
    #define EDF_FLAT_GAIN_M Fld(8,8,AC_FULLB1)//[15:8]
    #define EDF_FLAT_GAIN_L Fld(8,0,AC_FULLB0)//[7:0]
#define EDF_07 (IO_POSTPROC_BASE + 0x41C)
    #define EDF_DETAIL_GAIN_H Fld(8,16,AC_FULLB2)//[23:16]
    #define EDF_DETAIL_GAIN_M Fld(8,8,AC_FULLB1)//[15:8]
    #define EDF_DETAIL_GAIN_L Fld(8,0,AC_FULLB0)//[7:0]
#define EDF_08 (IO_POSTPROC_BASE + 0x420)
    #define EDF_EDGE_GAIN_H Fld(8,16,AC_FULLB2)//[23:16]
    #define EDF_EDGE_GAIN_M Fld(8,8,AC_FULLB1)//[15:8]
    #define EDF_EDGE_GAIN_L Fld(8,0,AC_FULLB0)//[7:0]
#define EDF_09 (IO_POSTPROC_BASE + 0x424)
    #define EDF_EDGE_GAIN_H_NEG Fld(8,16,AC_FULLB2)//[23:16]
    #define EDF_EDGE_GAIN_M_NEG Fld(8,8,AC_FULLB1)//[15:8]
    #define EDF_EDGE_GAIN_L_NEG Fld(8,0,AC_FULLB0)//[7:0]
#define EDF_0F (IO_POSTPROC_BASE + 0x428)
    #define EDF_ATPG_CT Fld(1,1,AC_MSKB0)//[1:1]
    #define EDF_ATPG_OB Fld(1,0,AC_MSKB0)//[0:0]
    //Fake HD
#define MDP_FREQ_ANLZ_00 (IO_POSTPROC_BASE + 0x0450)
    #define FA_EN Fld(1,31,AC_MSKB3)//[31:31]
    #define FA_MODE_SEL_H Fld(1,30,AC_MSKB3)//[30:30]
    #define FA_MODE_SEL_V Fld(1,29,AC_MSKB3)//[29:29]
    #define FA_HD_ROI_H Fld(8,16,AC_FULLB2)//[23:16]
    #define FA_HD_ROI_V Fld(8,8,AC_FULLB1)//[15:8]
#define MDP_FREQ_ANLZ_01 (IO_POSTPROC_BASE + 0x0454)
    #define FA_COR_H Fld(8,8,AC_FULLB1)//[15:8]
    #define FA_COR_V Fld(8,0,AC_FULLB0)//[7:0]
#define MDP_FREQ_ANLZ_02 (IO_POSTPROC_BASE + 0x0458)
    #define FA_H1_SUM Fld(32,0,AC_FULLDW)//[31:0]
#define MDP_FREQ_ANLZ_03 (IO_POSTPROC_BASE + 0x045C)
    #define FA_H1_CNT Fld(24,0,AC_MSKDW)//[23:0]
#define MDP_FREQ_ANLZ_04 (IO_POSTPROC_BASE + 0x0460)
    #define FA_H2_SUM Fld(32,0,AC_FULLDW)//[31:0]
#define MDP_FREQ_ANLZ_05 (IO_POSTPROC_BASE + 0x0464)
    #define FA_H2_CNT Fld(24,0,AC_MSKDW)//[23:0]
#define MDP_FREQ_ANLZ_06 (IO_POSTPROC_BASE + 0x0468)
    #define FA_H3_SUM Fld(32,0,AC_FULLDW)//[31:0]
#define MDP_FREQ_ANLZ_07 (IO_POSTPROC_BASE + 0x046C)
    #define FA_H3_CNT Fld(24,0,AC_MSKDW)//[23:0]
#define MDP_FREQ_ANLZ_08 (IO_POSTPROC_BASE + 0x0470)
    #define FA_V1_SUM Fld(32,0,AC_FULLDW)//[31:0]
#define MDP_FREQ_ANLZ_09 (IO_POSTPROC_BASE + 0x0474)
    #define FA_V1_CNT Fld(24,0,AC_MSKDW)//[23:0]
#define MDP_FREQ_ANLZ_10 (IO_POSTPROC_BASE + 0x0478)
    #define FA_V2_SUM Fld(32,0,AC_FULLDW)//[31:0]
#define MDP_FREQ_ANLZ_11 (IO_POSTPROC_BASE + 0x047C)
    #define FA_V2_CNT Fld(24,0,AC_MSKDW)//[23:0]
#define MDP_FREQ_ANLZ_12 (IO_POSTPROC_BASE + 0x0480)
    #define FA_V3_SUM Fld(32,0,AC_FULLDW)//[31:0]
#define MDP_FREQ_ANLZ_13 (IO_POSTPROC_BASE + 0x0484)
    #define FA_V3_CNT Fld(24,0,AC_MSKDW)//[23:0]
#define MDP_FREQ_ANLZ_14 (IO_POSTPROC_BASE + 0x0488)
    #define FA_H1_SUM_INIT Fld(32,0,AC_FULLDW)//[31:0]
#define MDP_FREQ_ANLZ_15 (IO_POSTPROC_BASE + 0x048C)
    #define FA_H1_CNT_INIT Fld(24,0,AC_MSKDW)//[23:0]
#define MDP_FREQ_ANLZ_16 (IO_POSTPROC_BASE + 0x0490)
    #define FA_H2_SUM_INIT Fld(32,0,AC_FULLDW)//[31:0]
#define MDP_FREQ_ANLZ_17 (IO_POSTPROC_BASE + 0x0494)
    #define FA_H2_CNT_INIT Fld(24,0,AC_MSKDW)//[23:0]
#define MDP_FREQ_ANLZ_18 (IO_POSTPROC_BASE + 0x0498)
    #define FA_H3_SUM_INIT Fld(32,0,AC_FULLDW)//[31:0]
#define MDP_FREQ_ANLZ_19 (IO_POSTPROC_BASE + 0x049C)
    #define FA_H3_CNT_INIT Fld(24,0,AC_MSKDW)//[23:0]
#define MDP_FREQ_ANLZ_20 (IO_POSTPROC_BASE + 0x04A0)
    #define FA_V1_SUM_INIT Fld(32,0,AC_FULLDW)//[31:0]
#define MDP_FREQ_ANLZ_21 (IO_POSTPROC_BASE + 0x04A4)
    #define FA_V1_CNT_INIT Fld(24,0,AC_MSKDW)//[23:0]
#define MDP_FREQ_ANLZ_22 (IO_POSTPROC_BASE + 0x04A8)
    #define FA_V2_SUM_INIT Fld(32,0,AC_FULLDW)//[31:0]
#define MDP_FREQ_ANLZ_23 (IO_POSTPROC_BASE + 0x04AC)
    #define FA_V2_CNT_INIT Fld(24,0,AC_MSKDW)//[23:0]
#define MDP_FREQ_ANLZ_24 (IO_POSTPROC_BASE + 0x04B0)
    #define FA_V3_SUM_INIT Fld(32,0,AC_FULLDW)//[31:0]
#define MDP_FREQ_ANLZ_25 (IO_POSTPROC_BASE + 0x04B4)
    #define FA_V3_CNT_INIT Fld(24,0,AC_MSKDW)//[23:0]
#define MDP_FREQ_ANLZ_26 (IO_POSTPROC_BASE + 0x04B8)
    #define FA_ATPG_CT Fld(1,31,AC_MSKB3)//[31:31]
    #define FA_ATPG_OB Fld(1,30,AC_MSKB3)//[30:30]
    #define INPUT_HSIZE Fld(13,13,AC_MSKDW)//[25:13]
    #define INPUT_VSIZE Fld(13,0,AC_MSKW10)//[12:0]

	//Page SRS
#define STA_AXI_DRAMIF_0 (IO_POSTPROC_BASE + 0xA90)
    #define STA_AXI_DRAMIF_DEBUG0 Fld(32,0,AC_FULLDW)//[31:0]
#define STA_AXI_DRAMIF_1 (IO_POSTPROC_BASE + 0xA94)
    #define STA_AXI_DRAMIF_DEBUG1 Fld(32,0,AC_FULLDW)//[31:0]
#define STA_AXI_DRAMIF_2 (IO_POSTPROC_BASE + 0xA98)
    #define STA_AXI_DRAMIF_DEBUG3 Fld(32,0,AC_FULLDW)//[31:0]
#define STA_AXI_DRAMIF_3 (IO_POSTPROC_BASE + 0xA9C)
    #define STA_AXI_DRAMIF_DEBUG4 Fld(32,0,AC_FULLDW)//[31:0]
#define STA_AXI_DRAMIF_4 (IO_POSTPROC_BASE + 0xAA0)
    #define STA_AXI_READ_DEBUG0 Fld(32,0,AC_FULLDW)//[31:0]
#define STA_AXI_DRAMIF_5 (IO_POSTPROC_BASE + 0xAA4)
    #define STA_AXI_READ_DEBUG1 Fld(32,0,AC_FULLDW)//[31:0]
#define STA_AXI_DRAMIF_6 (IO_POSTPROC_BASE + 0xAA8)
    #define STA_AXI_READ_DEBUG2 Fld(32,0,AC_FULLDW)//[31:0]
#define BGG3D_IRQ_REG (IO_POSTPROC_BASE + 0xAAC)
    #define C_BGG3D_IRQ_REG Fld(32,0,AC_FULLDW)//[31:0]
#define BGG3D_IRQ_REG2 (IO_POSTPROC_BASE + 0xAB0)
    #define C_BGG3D_IRQ_REG2 Fld(32,0,AC_FULLDW)//[31:0]
#define BGG3D_AXI_REG (IO_POSTPROC_BASE + 0xAB4)
    #define C_BGG3D_AXI_REG Fld(32,0,AC_FULLDW)//[31:0]
#define BGG3D_AXI_REG2 (IO_POSTPROC_BASE + 0xAB8)
    #define C_BGG3D_AXI_REG2 Fld(32,0,AC_FULLDW)//[31:0]
#define BGG3D_MERGE_REG (IO_POSTPROC_BASE + 0xABC)
    #define C_BGG3D_MERGE_REG Fld(32,0,AC_FULLDW)//[31:0]
#define BGG3D_MERGE_REG2 (IO_POSTPROC_BASE + 0xAC0)
    #define C_BGG3D_MERGE_REG2 Fld(32,0,AC_FULLDW)//[31:0]
#define AXI_DRAM_CTRL (IO_POSTPROC_BASE + 0xAC4)
    #define C_MFG_MEM_REG_FCTRL_EN Fld(1,10,AC_MSKB1)//[10:10]
    #define C_MFG_MEM_DEPTH_VAL Fld(6,4,AC_MSKW10)//[9:4]
    #define C_MFG_MEM_SLV_SYNC_SEL Fld(2,2,AC_MSKB0)//[3:2]
    #define C_MFG_MEM_MST_SYNC_SEL Fld(2,0,AC_MSKB0)//[1:0]
#define SRS_CTRL (IO_POSTPROC_BASE + 0xAC8)
    #define STA_VSYNC_FALL Fld(1,31,AC_MSKB3)//[31:31]
    #define C_SRS_MON_OUT_SEL Fld(1,30,AC_MSKB3)//[30:30]
    #define C_SRS_FSAMPLE_EN Fld(1,29,AC_MSKB3)//[29:29]
    #define C_SRS_SW_RST Fld(3,7,AC_MSKW10)//[9:7]
    #define C_SRS_DISABLE Fld(1,6,AC_MSKB0)//[6:6]
    #define C_SRS_DEBUG_SEL Fld(3,3,AC_MSKB0)//[5:3]
    #define C_SRS_INT_CLR Fld(1,2,AC_MSKB0)//[2:2]
    #define C_SRS_BYPASS Fld(1,1,AC_MSKB0)//[1:1]
    #define C_SRS_CLK_EN Fld(1,0,AC_MSKB0)//[0:0]
#define SRS_STATUS0 (IO_POSTPROC_BASE + 0xACC)
    #define STA_REQ_CNT Fld(11,20,AC_MSKW32)//[30:20]
    #define STA_ARVALID_CNT Fld(11,0,AC_MSKW10)//[10:0]
#define SRS_STATUS1 (IO_POSTPROC_BASE + 0xAD0)
    #define STA_RVALID_CNT Fld(13,16,AC_MSKW32)//[28:16]
    #define STA_DLE_CNT Fld(13,0,AC_MSKW10)//[12:0]
#define SRS_STATUS2 (IO_POSTPROC_BASE + 0xAD4)
    #define C_DLE_CNT_POINTER Fld(13,16,AC_MSKW32)//[28:16]
    #define STA_RLAST_CNT Fld(11,0,AC_MSKW10)//[10:0]
#define SRS_STATUS3 (IO_POSTPROC_BASE + 0xAD8)
    #define STA_DRAM_RDAT0 Fld(32,0,AC_FULLDW)//[31:0]
#define SRS_STATUS4 (IO_POSTPROC_BASE + 0xADC)
    #define STA_DRAM_RDAT1 Fld(32,0,AC_FULLDW)//[31:0]
#define SRS_STATUS5 (IO_POSTPROC_BASE + 0xAE0)
    #define STA_DRAM_RDAT2 Fld(32,0,AC_FULLDW)//[31:0]
#define SRS_STATUS6 (IO_POSTPROC_BASE + 0xAE4)
    #define STA_DRAM_RDAT3 Fld(32,0,AC_FULLDW)//[31:0]
#define SRS_STATUS7 (IO_POSTPROC_BASE + 0xAE8)
    #define STA_DRAM_RDAT_CHECK_SUM Fld(32,0,AC_FULLDW)//[31:0]
#define SRS_ROM_CTRL0 (IO_POSTPROC_BASE + 0xAEC)
    #define C_AUPC_ROM_SIGNATURE Fld(32,0,AC_FULLDW)//[31:0]
#define SRS_ROM_CTRL1 (IO_POSTPROC_BASE + 0xAF0)
    #define STA_AUPC_ROM_DATA_OUT Fld(32,0,AC_FULLDW)//[31:0]
#define SRS_RESERVED (IO_POSTPROC_BASE + 0xAF4)
    #define C_SRS_RESERVED Fld(32,0,AC_FULLDW)//[31:0]
#define SRS_ATPG (IO_POSTPROC_BASE + 0xAFC)
    #define SRS_ATPG_OB Fld(1,1,AC_MSKB0)//[1:1]
    #define SRS_ATPG_CT Fld(1,0,AC_MSKB0)//[0:0]
#define SRS_FPGA_TEST_0 (IO_POSTPROC_BASE + 0xFA0)
    #define C_DRAM_TEST_WDAT0 Fld(32,0,AC_FULLDW)//[31:0]
#define SRS_FPGA_TEST_1 (IO_POSTPROC_BASE + 0xFA4)
    #define C_DRAM_TEST_WDAT1 Fld(32,0,AC_FULLDW)//[31:0]
#define SRS_FPGA_TEST_2 (IO_POSTPROC_BASE + 0xFA8)
    #define C_DRAM_TEST_WDAT2 Fld(32,0,AC_FULLDW)//[31:0]
#define SRS_FPGA_TEST_3 (IO_POSTPROC_BASE + 0xFAC)
    #define C_DRAM_TEST_WDAT3 Fld(32,0,AC_FULLDW)//[31:0]
#define SRS_FPGA_TEST_4 (IO_POSTPROC_BASE + 0xFB0)
    #define C_DRAM_TEST_ADR Fld(32,0,AC_FULLDW)//[31:0]
#define SRS_FPGA_TEST_5 (IO_POSTPROC_BASE + 0xFB4)
    #define C_DRAM_FPGA_RD_EN Fld(1,2,AC_MSKB0)//[2:2]
    #define C_DRAM_TEST_RW Fld(1,1,AC_MSKB0)//[1:1]
    #define C_DRAM_TEST_TRIG Fld(1,0,AC_MSKB0)//[0:0]
#define SRS_STATUS8 (IO_POSTPROC_BASE + 0xFB8)
    #define STA_SRS_HEIGHT Fld(12,20,AC_MSKW32)//[31:20]
    #define STA_SRS_WIDTH Fld(12,0,AC_MSKW10)//[11:0]
#define SRS_STATUS9 (IO_POSTPROC_BASE + 0xFBC)
    #define STA_SRS_DUMP_V Fld(10,20,AC_MSKW32)//[29:20]
    #define STA_SRS_DUMP_U Fld(10,10,AC_MSKW21)//[19:10]
    #define STA_SRS_DUMP_Y Fld(10,0,AC_MSKW10)//[9:0]
#define SRS_STATUS_CTRL (IO_POSTPROC_BASE + 0xFC0)
    #define C_SRS_POS_Y Fld(12,20,AC_MSKW32)//[31:20]
    #define C_SRS_POS_X Fld(12,0,AC_MSKW10)//[11:0]
#define SRS_STATUS_A (IO_POSTPROC_BASE + 0xFC4)
    #define STA_VS_FPORCH Fld(10,20,AC_MSKW32)//[29:20]
    #define STA_VS_BPORCH Fld(10,10,AC_MSKW21)//[19:10]
    #define STA_VS_BLANK_LINE Fld(10,0,AC_MSKW10)//[9:0]
#define SRS_STATUS_B (IO_POSTPROC_BASE + 0xFC8)
    #define STA_HS_FPORCH Fld(10,20,AC_MSKW32)//[29:20]
    #define STA_HS_BPORCH Fld(10,10,AC_MSKW21)//[19:10]
    #define STA_HS_BLANK_LINE Fld(10,0,AC_MSKW10)//[9:0]
#define SRS_STATUS_C (IO_POSTPROC_BASE + 0xFCC)
    #define STA_SRS_HMASK_WIDTH Fld(12,0,AC_MSKW10)//[11:0]

//SRS IP register
 //Page SRS_CTRL
#define VSYNC_LATCH_00 (SRS_BASE + 0x000)
    #define VCPINH Fld(1,0,AC_MSKB0)//[0:0]
#define VSYNC_LATCH_01 (SRS_BASE + 0x004)
    #define VCPCOM Fld(1,0,AC_MSKB0)//[0:0]
#define SRS_MODE (SRS_BASE + 0x100)
    #define SRS_DISABLE Fld(1,24,AC_MSKB3)//[24:24]
    #define MODESRS Fld(1,16,AC_MSKB2)//[16:16]
    #define MODE3D Fld(1,8,AC_MSKB1)//[8:8]
    #define RATIO Fld(2,0,AC_MSKB0)//[1:0]
#define SRS_3D_LINE_OFFSET (SRS_BASE + 0x104)
    #define VOFFSET2D Fld(7,16,AC_MSKB2)//[22:16]
    #define PRVOFFSET0 Fld(7,8,AC_MSKB1)//[14:8]
    #define PRVOFFSET1 Fld(7,0,AC_MSKB0)//[6:0]
#define PROCESS_AREA_00 (SRS_BASE + 0x108)
    #define MODEFILT Fld(1,24,AC_MSKB3)//[24:24]
    #define MODECOPY Fld(1,16,AC_MSKB2)//[16:16]
    #define AREAPROCY Fld(2,8,AC_MSKB1)//[9:8]
    #define AREAPROCC Fld(2,0,AC_MSKB0)//[1:0]
#define PROCESS_AREA_01 (SRS_BASE + 0x10C)
    #define H_START_POS Fld(13,16,AC_MSKW32)//[28:16]
    #define V_START_POS Fld(13,0,AC_MSKW10)//[12:0]
#define PROCESS_AREA_02 (SRS_BASE + 0x110)
    #define H_ACT_HEIGHT Fld(13,16,AC_MSKW32)//[28:16]
    #define V_ACT_HEIGHT Fld(13,0,AC_MSKW10)//[12:0]
#define DATABASE_CTRL (SRS_BASE + 0x200)
    #define DBREADEN Fld(1,24,AC_MSKB3)//[24:24]
    #define DBREQINTVL Fld(4,16,AC_MSKB2)//[19:16]
    #define DBBANK Fld(4,0,AC_MSKB0)//[3:0]
#define DATABASE_ADDR_00 (SRS_BASE + 0x204)
    #define DBADDR00 Fld(32,0,AC_FULLDW)//[31:0]
#define DATABASE_ADDR_01 (SRS_BASE + 0x208)
    #define DBADDR01 Fld(32,0,AC_FULLDW)//[31:0]
#define DATABASE_ADDR_02 (SRS_BASE + 0x20C)
    #define DBADDR02 Fld(32,0,AC_FULLDW)//[31:0]
#define DATABASE_ADDR_03 (SRS_BASE + 0x210)
    #define DBADDR03 Fld(32,0,AC_FULLDW)//[31:0]
#define DATABASE_ADDR_04 (SRS_BASE + 0x214)
    #define DBADDR04 Fld(32,0,AC_FULLDW)//[31:0]
#define DATABASE_ADDR_05 (SRS_BASE + 0x218)
    #define DBADDR05 Fld(32,0,AC_FULLDW)//[31:0]
#define DATABASE_ADDR_06 (SRS_BASE + 0x21C)
    #define DBADDR06 Fld(32,0,AC_FULLDW)//[31:0]
#define DATABASE_ADDR_07 (SRS_BASE + 0x220)
    #define DBADDR07 Fld(32,0,AC_FULLDW)//[31:0]
#define DATABASE_ADDR_08 (SRS_BASE + 0x224)
    #define DBADDR08 Fld(32,0,AC_FULLDW)//[31:0]
#define DATABASE_ADDR_09 (SRS_BASE + 0x228)
    #define DBADDR09 Fld(32,0,AC_FULLDW)//[31:0]
#define DATABASE_ADDR_0A (SRS_BASE + 0x22C)
    #define DBADDR10 Fld(32,0,AC_FULLDW)//[31:0]
#define DATABASE_ADDR_0B (SRS_BASE + 0x230)
    #define DBADDR11 Fld(32,0,AC_FULLDW)//[31:0]
#define DATABASE_ADDR_0C (SRS_BASE + 0x234)
    #define DBADDR12 Fld(32,0,AC_FULLDW)//[31:0]
#define DATABASE_ADDR_0D (SRS_BASE + 0x238)
    #define DBADDR13 Fld(32,0,AC_FULLDW)//[31:0]
#define DATABASE_ADDR_0E (SRS_BASE + 0x23C)
    #define DBADDR14 Fld(32,0,AC_FULLDW)//[31:0]
#define DATABASE_ADDR_0F (SRS_BASE + 0x240)
    #define DBADDR15 Fld(32,0,AC_FULLDW)//[31:0]
    
    //Page SRS_PIC_
#define SRS_GAIN (SRS_BASE + 0x300)
    #define EXT_GAIN Fld(8,16,AC_FULLB2)//[23:16]
    #define NOISE_REDUCTION Fld(8,8,AC_FULLB1)//[15:8]
    #define R_GAIN Fld(8,0,AC_FULLB0)//[7:0]
#define CMIX (SRS_BASE + 0x304)
    #define CMIXGAIN Fld(8,24,AC_FULLB3)//[31:24]
    #define CMIXDRMIN Fld(8,16,AC_FULLB2)//[23:16]
    #define CMIXRATIOMIN Fld(8,8,AC_FULLB1)//[15:8]
    #define CIMXRATIOMAX Fld(8,0,AC_FULLB0)//[7:0]
#define VOLE_00 (SRS_BASE + 0x308)
    #define VOLEDRMIN Fld(8,16,AC_FULLB2)//[23:16]
    #define VOLERATIOMIN Fld(8,8,AC_FULLB1)//[15:8]
    #define VOLERATIOMAX Fld(8,0,AC_FULLB0)//[7:0]
#define VOLE_01 (SRS_BASE + 0x30C)
    #define VOLEDRMIN2 Fld(8,24,AC_FULLB3)//[31:24]
    #define VOLERATIOMIN2 Fld(8,16,AC_FULLB2)//[23:16]
    #define VOLEDRGRD2 Fld(16,0,AC_FULLW10)//[15:0]
#define CMIX_VOLE (SRS_BASE + 0x310)
    #define CMIXDRGRD Fld(16,16,AC_FULLW32)//[31:16]
    #define VOLEDRGRD Fld(16,0,AC_FULLW10)//[15:0]
#define PIC_CTRL (SRS_BASE + 0x314)
    #define GAIN_PNON Fld(1,16,AC_MSKB2)//[16:16]
    #define GRADON Fld(1,8,AC_MSKB1)//[8:8]
    #define FREQON Fld(1,0,AC_MSKB0)//[0:0]
#define PIC_CTRL_00 (SRS_BASE + 0x318)
    #define GAIN_P000 Fld(8,24,AC_FULLB3)//[31:24]
    #define GAIN_P032 Fld(8,16,AC_FULLB2)//[23:16]
    #define GAIN_P064 Fld(8,8,AC_FULLB1)//[15:8]
    #define GAIN_P096 Fld(8,0,AC_FULLB0)//[7:0]
#define PIC_CTRL_01 (SRS_BASE + 0x31C)
    #define GAIN_P128 Fld(8,24,AC_FULLB3)//[31:24]
    #define GAIN_P160 Fld(8,16,AC_FULLB2)//[23:16]
    #define GAIN_P192 Fld(8,8,AC_FULLB1)//[15:8]
    #define GAIN_P224 Fld(8,0,AC_FULLB0)//[7:0]
#define PIC_CTRL_02 (SRS_BASE + 0x320)
    #define GAIN_P256 Fld(8,24,AC_FULLB3)//[31:24]
    #define GAIN_N000 Fld(8,16,AC_FULLB2)//[23:16]
    #define GAIN_N032 Fld(8,8,AC_FULLB1)//[15:8]
    #define GAIN_N064 Fld(8,0,AC_FULLB0)//[7:0]
#define PIC_CTRL_03 (SRS_BASE + 0x324)
    #define GAIN_N096 Fld(8,24,AC_FULLB3)//[31:24]
    #define GAIN_N128 Fld(8,16,AC_FULLB2)//[23:16]
    #define GAIN_N160 Fld(8,8,AC_FULLB1)//[15:8]
    #define GAIN_N192 Fld(8,0,AC_FULLB0)//[7:0]
#define PIC_CTRL_04 (SRS_BASE + 0x328)
    #define GAIN_N224 Fld(8,24,AC_FULLB3)//[31:24]
    #define GAIN_N256 Fld(8,16,AC_FULLB2)//[23:16]
#define RING_SUPPERESSION_00 (SRS_BASE + 0x330)
    #define FREQTHXMOD Fld(1,31,AC_MSKB3)//[31:31]
    #define FREQTHX Fld(7,24,AC_MSKB3)//[30:24]
    #define FREQGAIN3 Fld(8,16,AC_FULLB2)//[23:16]
    #define FREQGAIN2 Fld(8,8,AC_FULLB1)//[15:8]
    #define FREQGAIN1 Fld(8,0,AC_FULLB0)//[7:0]
#define RING_SUPPERESSION_01 (SRS_BASE + 0x32C)
    #define FREQTH4 Fld(8,24,AC_FULLB3)//[31:24]
    #define FREQTH3 Fld(8,16,AC_FULLB2)//[23:16]
    #define FREQTH2 Fld(8,8,AC_FULLB1)//[15:8]
    #define FREQTH1 Fld(8,0,AC_FULLB0)//[7:0]
#define GRADATION_SMOOTH (SRS_BASE + 0x334)
    #define GRADTHOFST Fld(4,24,AC_MSKB3)//[27:24]
    #define GRADTHGAIN Fld(4,16,AC_MSKB2)//[19:16]
    #define GRADTHLIMIT Fld(7,8,AC_MSKB1)//[14:8]
    #define GRADGAIN Fld(4,0,AC_MSKB0)//[3:0]
    
    //Page SRS_TEST
#define TEST_00 (SRS_BASE + 0x400)
    #define TPN_DRGAIN Fld(4,24,AC_MSKB3)//[27:24]
    #define TPN_DRTH Fld(8,16,AC_FULLB2)//[23:16]
    #define TPN_RGAIN Fld(4,8,AC_MSKB1)//[11:8]
    #define TPN_GGAIN Fld(4,0,AC_MSKB0)//[3:0]
#define TEST_01 (SRS_BASE + 0x404)
    #define ATPN_TIMES Fld(3,24,AC_MSKB3)//[26:24]
    #define ATPN_ROFSTLIM Fld(6,16,AC_MSKB2)//[21:16]
    #define ATPN_DIFGAIN Fld(8,8,AC_FULLB1)//[15:8]
    #define ATPN_DIFMIN Fld(8,0,AC_FULLB0)//[7:0]
#define TEST_02 (SRS_BASE + 0x408)
    #define DIFSUM Fld(16,0,AC_FULLW10)//[15:0]
#define TEST_03 (SRS_BASE + 0x40C)
    #define DLVCNT Fld(4,0,AC_MSKB0)//[3:0]
    
    //Page SRS_ERROR_DET
#define ERROR_CLEAR (SRS_BASE + 0xF00)
    #define C_SRS00ERR Fld(1,0,AC_MSKB0)//[0:0]
    #define C_SRS01ERR Fld(1,1,AC_MSKB0)//[1:1]
    #define C_SRS02ERR Fld(1,2,AC_MSKB0)//[2:2]
    #define C_SRS03ERR Fld(1,3,AC_MSKB0)//[3:3]
    #define C_SRS04ERR Fld(1,4,AC_MSKB0)//[4:4]
    #define C_SRS05ERR Fld(1,5,AC_MSKB0)//[5:5]
    #define C_SRS06ERR Fld(1,6,AC_MSKB0)//[6:6]
    #define C_SRS07ERR Fld(1,7,AC_MSKB0)//[7:7]
#define ERROR_DETECT (SRS_BASE + 0xF04)
    #define SRS00ERR Fld(1,0,AC_MSKB0)//[0:0]
    #define SRS01ERR Fld(1,1,AC_MSKB0)//[1:1]
    #define SRS02ERR Fld(1,2,AC_MSKB0)//[2:2]
    #define SRS03ERR Fld(1,3,AC_MSKB0)//[3:3]
    #define SRS04ERR Fld(1,4,AC_MSKB0)//[4:4]
    #define SRS05ERR Fld(1,5,AC_MSKB0)//[5:5]
    #define SRS06ERR Fld(1,6,AC_MSKB0)//[6:6]
    #define SRS07ERR Fld(1,7,AC_MSKB0)//[7:7]
#endif

