/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
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 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
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 * LGPLv2.1 License
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 * Copyright(C) 2019 MediaTek Inc.
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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 * BSD LICENSE
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 * Copyright(C) 2019 MediaTek Inc.
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 * are met:
 *
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/*-----------------------------------------------------------------------------
 *
 * $Author: brianpc.huang $
 * $Date: 2015/05/29 $
 * $RCSfile: atd_if.h,v $ 
 * $Revision: #1 $
 *
 *---------------------------------------------------------------------------*/

/** @file atd_if.h 
 *  NA tuner analog pi primitive API 
 */

#ifndef ATD_IF_H
#define ATD_IF_H

//-----------------------------------------------------------------------------
// Include files
//-----------------------------------------------------------------------------
#include "x_typedef.h"
#include "fe_tuner_common_if.h"
#include "tuner_interface_if.h"
//-----------------------------------------------------------------------------
// Configurations
//-----------------------------------------------------------------------------


//-----------------------------------------------------------------------------
// Constant definitions
//-----------------------------------------------------------------------------


//-----------------------------------------------------------------------------
// Type definitions
//-----------------------------------------------------------------------------

typedef VOID *PATD_SPECIFIC_CTX;


#ifndef tuner_break_fct
#define tuner_break_fct
typedef INT32     (*x_break_fct)(void *pArg);
#endif

typedef struct _ATD_CTX_T
{
// Hardware Configure
    UINT8           I2cAddress;
    UINT32         u4Frequency;             /* carrier frequency (in KHz)   */
    UINT8           u1SubSysIdx;
// Status
    UINT16	    u2VOPCpo;
    INT32	    s4Cfo;
    UINT8           u1ControlStatus;
    UINT8           u1VIFLock;
    BOOL            fgPRALock;
    BOOL            fgCRLock;
    BOOL            fgCheckCR;
    BOOL            fgDemodReset;
    BOOL            fgAutoSearch;
    BOOL            fgAFT;
    BOOL            fgAudScan;
    UINT8           u1PF;
    UINT8           u1UpChkCnt;
    UINT8           u1UpNakCnt;
    UINT8           u1UpMisCnt;
    UINT8           u1TunerType;

    INT8    s1RFmin;
    INT8    s1IFmin;

    //GEN_TUNER_CTX_T sTunerCtx;
    //void            *psI2cCtx;
    HANDLE_T          hHostCmdLock;  // Semaphore
    HANDLE_T          hRegLock;      // Semaphore
    HANDLE_T          hLogLock;      // Semaphore
    BOOL            fgDemodInitFlag;
    HANDLE_T          hDemodAcq;     // Semaphore

    VOID        *pDigiTunerCtx;
    x_break_fct isBreak;
//    VOID        *isBreak;
    VOID        *pvBreakArg;
    //THREAD_T        t_monitor_thread;

    ITUNER_CTX_T *pTCtx;

    
} ATD_CTX_T;


typedef struct _ATD_PD_CTX_T
{
// ATD PI context
    void*        sAtdPiCtx;
// Hardware Configure
    UINT32      Frequency;                  /* Carrier frequency (in Hz) */
    UINT8       u1VIFLock;
    UINT8       u1TunerAcqType;
    UINT8       u1SubSysIdx;
    UINT32      u4TvSubSysMask;
    UINT8       ucTvSysGroupNum;
    UINT32      *pu4TvSysGroup;
    VOID        *psTunerAnaAttr;
// Glue-layer variables
    HANDLE_T    hHalLock;  //sema
    UINT32      u4DrvCustTunerCtrl;
    UINT32      u4AcqFrequency;
    BOOL        fgBreakMonitor;
    BOOL        fgPIMoniStatus; //1: doing monitor 0:not doing monitor
    BOOL        fgDisStatus;
} ATD_PD_CTX_T, *PATD_PD_CTX_T;


//-----------------------------------------------------------------------------
// Macro definitions
//-----------------------------------------------------------------------------


enum
{
    ATV_CONN_MODE_CHAN_CHANGE = 0,
    ATV_CONN_MODE_CHAN_SCAN,
    ATV_CONN_MODE_FINE_TUNE,
    ATV_CONN_MODE_FM_RADIO,
    ATV_CONN_MODE_NUM
};        




#endif /* ATD_IF_H */

