/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/

/*-----------------------------------------------------------------------------
 *
 * $Author: brianpc.huang $
 * $Date: 2015/05/29 $
 * $RCSfile: vdp_drvif.h,v $
 * $Revision: #1 $
 *
 *---------------------------------------------------------------------------*/

/** @file vdp_drvif.h
 *  Brief of file vdp_drvif.h.
 *  Details of file vdp_drvif.h (optional).
 */

#ifndef VDP_DRVIF_H
#define VDP_DRVIF_H


//-----------------------------------------------------------------------------
// Include files
//-----------------------------------------------------------------------------

#include "vdp_if.h"
#include "fbm_drvif.h"
#include "pmx_if.h"
#include "x_os.h"
#include "x_hal_5381.h"


//-----------------------------------------------------------------------------
// Type definitions
//-----------------------------------------------------------------------------

// Video plane capability
#define VDP_CAP_OUTPUT_AUX          (1 << 0)
#define VDP_CAP_QV                  (1 << 1)
#define VDP_CAP_DEINT               (1 << 2)
#define VDP_CAP_ENHANCE             (1 << 3)
#define VDP_CAP_420_CM              (1 << 4)
#define VDP_CAP_32BIT_CM            (1 << 5)

/* video cinema mode */
#define VDP_SV_CN_AUTO              0
#define VDP_SV_CN_OFF               1
#define VDP_SV_CN_MOVIE             2
#define VDP_SV_CN_MAX               3

/* video demo mode */
typedef enum 
{
    VDP_PQ_DEMO_OFF = 0,             
    VDP_PQ_DEMO_ON_RIGHT,            
    VDP_PQ_DEMO_ON_LEFT,
    VDP_PQ_DEMO_STILL_REC,
    VDP_PQ_DEMO_MOVING_REC,
    VDP_PQ_DEMO_MODE_NUM
} VDP_DEMO_MODE;

/* video di mode */
#define VDP_DI_AUTO_MODE            0
#define VDP_DI_MODE_1               1
#define VDP_DI_MODE_2               2
#define VDP_DI_MODE_3               3
#define VDP_DI_MODE_4               4
#define VDP_DI_MODE_MAX             5

/* video edge mode */
#define VDP_SV_V_EDGE_OFF           0
#define VDP_SV_V_EDGE_LOW           1
#define VDP_SV_V_EDGE_HIGH          2
#define VDP_SV_V_EDGE_MAX           3

// Video Plane Call Back Error
#define VDP_CB_ERR                  (0x80000000)

// Display Mode
#define VDP_SCPOS_DISPMODE_OFF    0
#define VDP_SCPOS_DISPMODE_AUTO    1
#define VDP_SCPOS_DISPMODE_MANUAL   2
#define VDP_SCPOS_PSCAN_DISPMODE   3
#define VDP_SCPOS_MJC_DISPMODE   4
#define VDP_SCPOS_LINESYNC_DISPMODE 5
#define VDP_SCPOS_HYBRID_MODE       6     //added for Gazelle hybrid mode
#define VDP_SCPOS_DISPMODE_UNKNOWN  7


// 10 Bit mode
#define VDP_SCPOS_10BitMode  10
#define VDP_SCPOS_8BitMode  8

/** Brief of EVDP_VIDEO_INPUT_SOURCE_T
 *  Video Input Source (VIS) type
 */
typedef enum _EVDP_VIDEO_INPUT_SOURCE_T
{
    EVDP_VIS_AVC_COMP_VIDEO = 0,
    EVDP_VIS_AVC_S_VIDEO,
    EVDP_VIS_AVC_Y_PB_PR,
    EVDP_VIS_AVC_VGA,
    EVDP_VIS_AVC_SCART,
    EVDP_VIS_AVC_DVI,
    EVDP_VIS_AVC_HDMI,
    EVDP_VIS_TUNER_DIGITAL,
    EVDP_VIS_TUNER_ANALOG,
    
    EVDP_VIS_MAX
} EVDP_VIDEO_INPUT_SOURCE_T;


/** Brief of VDP_COLOR_GAIN_T
 *  Video plane color gain.
 */
typedef struct
{
    UINT8 ucAuto;
    UINT16 ucRgain;
    UINT16 ucGgain;
    UINT16 ucBgain;
} VDP_COLOR_GAIN_T;

/** Brief of VDP_OUT_INFO_T
 *  Video plane output parameter.
 */
typedef struct
{
    UCHAR ucPmxId;
    UCHAR ucPmxMode;
    UCHAR ucPrg;
    UCHAR ucFrameRate;
    UCHAR ucDoubleClk;
    UCHAR ucInputFrameRate;     // For Clock Configuration
    UINT32 u4Width;
    UINT32 u4Height;
    UINT32 u4TotalWidth;
    UINT32 u4TotalHeight;
    UINT32 u4ClkMode;
} VDP_OUT_INFO_T;

/** Brief of VDP_CONF_T
 *  Video plane configuration.
 */
typedef struct
{
    UCHAR ucVdpEnable;
    UCHAR ucEnable;
    UCHAR ucB2rId;
    UCHAR ucStatus;

    UCHAR ucMode;
    UCHAR ucFreeze;
    UCHAR ucNonlinear;
    UCHAR ucNonlinearScope;
    UINT32 u4NonlinarEndFactor;

 //   UCHAR ucDispMode;
    UCHAR ucBobMode;

    // Input port (frame buffer group ID)
    UCHAR ucInputPort[VDP_MAX_INPORT_NS];
    UCHAR ucMasterPort;

    //UCHAR ucPauseMm;
    UCHAR ucNoOverScan;
    UCHAR ucEarlyDisp;

    UCHAR ucColorDescrip;
    UCHAR ucColourPrimary;                    
    UCHAR ucTransCharacter;                    
    UCHAR ucMatrixCoeff;                    
    
    // (source/output) region
    VDP_REGION_T rSrcRegion;
    VDP_REGION_T rOutRegion;
    VDP_REGION_T rDolbySrcRegion;
    VDP_REGION_T rDolbyOutRegion;
    VDP_OUT_INFO_T rOutInfo;
    VDP_OVERSCAN_REGION_T rOverScan;

    // output max width/height (MT5371 Limitation)
    UINT32 u4MaxOutWidth;
    UINT32 u4MaxOutHeight;

    // source information
    UINT32 u4SrcLineSize;
    UINT32 u4SrcWidth;
    UINT32 u4SrcHeight;
    UINT32 u4AspectRatio;
    UINT32 u4FrameRate;
    UINT32 u4QpAvg;
    UINT32 u4Afd;

    // hardware debug
    UCHAR ucColorMode;
    UCHAR ucAcsFrame;
    UCHAR ucSrcFrame;
    UCHAR ucAcsAuto;
    UCHAR ucPhyTop;
    UCHAR ucAcsTop;
    UINT32 u4AddrY;
    UINT32 u4AddrC;

    UINT32 u4BgColor;            // YCbCr

    UINT32 u4MpegWidth;
    UINT32 u4MpegHeight;

    UINT32 u4FrmCropTop;
    UINT32 u4FrmCropBtm;

    BOOL  fgBypssEnabe;
    HANDLE_T hMutex;
    
    UINT32 u4AttachedSrcId; // For playmgr usge while calling back to it

    BOOL fgCropping;
    UINT32 u4CropX;
    UINT32 u4CropY;
    UINT32 u4CropWidth;
    UINT32 u4CropHeight;

    UINT32 u4AspectRatioWidth;
    UINT32 u4AspectRatioHeight;
    UINT32 u4AspectRatioIdc;

    UINT32 u4VdpLogFilter;
} VDP_CONF_T;

typedef struct _VDP_SC_DATA_INFO
{
    UINT32 u4LineStart;
    UINT32 u4LineCount;
    UINT8 bYMax;
    UINT8 bYMin;
    UINT8 bUMax;
    UINT8 bUMin;
    UINT8 bVMax;
    UINT8 bVMin;
} VDP_SC_DATA_INFO;


//-----------------------------------------------------------------------------
// Inter-file functions
//-----------------------------------------------------------------------------

//-----------------------------------------------------------------------------
// Public functions
//-----------------------------------------------------------------------------

EXTERN UINT32 VDP_SetNonlinear(UCHAR ucVdpId, UCHAR ucNonlinear);

EXTERN UINT32 VDP_SetNonlinearScope(UCHAR ucVdpId, UCHAR ucNonlinear);

EXTERN UINT32 VDP_SetNonlinearFactor(UCHAR ucVdpId, UCHAR ucScpoe, UINT32 u4Factor);

EXTERN UINT32 VDP_GetNonlinearFactor(UCHAR ucVdpId, UCHAR *pucScpoe, UINT32 *pu4Factor);

EXTERN UINT32 VDP_SetManualNonLinear(UCHAR ucVdpId, VDP_NONLINEAR_PRM_T rNonlinearPrm);

EXTERN UINT32 VDP_SetAutoNonLinear(UCHAR ucVdpId, VDP_AUTO_NONLINEAR_PRM_T rAutoNonlinearPrm);

EXTERN UINT32 VDP_SetNewNonlinearOnOff(UCHAR ucVdpId, UCHAR ucOnOff);

EXTERN UINT32 VDP_SetNewNonLinear(UCHAR ucVdpId, VDP_NEW_NONLINEAR_PRM_T rNonlPrm);

EXTERN UINT32 VDP_Set121Map(UCHAR ucVdpId, UCHAR ucEn);
EXTERN UINT32 VDP_Get121Map(UCHAR ucVdpId);
EXTERN UINT32 VDP_Set121MapHPos(UCHAR ucVdpId, UINT16 u2HPos);

EXTERN UINT32 VDP_SetDynamiceScaler(UCHAR ucVdpId, UCHAR ucOnOff, UINT32 u4ResponseTime);

EXTERN UINT32 VDP_SetLBoxDetection(UCHAR ucVdpId, UCHAR ucOnOff, UINT8 bFixed);

EXTERN UINT32 VDP_SetSrcSize(UCHAR ucVdpId, UINT32 u4SrcWidth, UINT32 u4SrcHeight);        // for CLI test

EXTERN UINT32 VDP_GetNonlinear(UCHAR ucVdpId, UCHAR* pucNonlinear);

EXTERN UINT32 VDP_GetNonlinearScope(UCHAR ucVdpId, UCHAR* pucNonlinear);

EXTERN UINT32 VDP_SetNonLinear_Cust(UCHAR ucVdpId, BOOL bAuto, UINT32 u4StartFactor, UINT32 u4Slope,  UINT32 u4MidPoint,UINT32 u4StopFactor);

EXTERN UINT32 VDP_ForceWriteOff(UINT32 u4VdpId, UINT8 u1OnOff);

EXTERN UINT32 VDP_GetSrcSize(UCHAR ucVdpId, UINT32* pu4SrcLineSize, UINT32* pu4SrcWidth, UINT32* pu4SrcHeight);

EXTERN VDP_CONF_T* VDP_GetConf(UCHAR ucVdpId);

EXTERN UINT32 VDP_DispStatusNotify(UINT8 ucVdpId, UINT8 bStatus);

EXTERN UINT32 VDP_TDNaviStatusNotify(UINT32 u4VdpId, UINT32 u43DTag);

EXTERN UINT32 VDP_VideoUnmuteNotify(UINT8 ucVdpId, UINT8 bStatus);

#if 1 //5387	
EXTERN UINT32 VDP_SourceChangeNotify(UINT8 bPath);
#else
EXTERN UINT32 VDP_SourceChangeNotify(UCHAR ucVdpId, VDP_SOURCE_INFO_T rVdpSrcInfo);
#endif


EXTERN UINT32 VDP_DrvSrcRangeChgNotify(UINT8 bPath, VDP_REGION_T rVdpSrcRegion);
EXTERN UINT32 VDP_DrvOutputRangeChgNotify(UINT8 bPath, VDP_REGION_T rVdpOutRegion);
#ifndef CC_S_PLATFORM
EXTERN UINT32 VDP_Drv3DModeChgNotify(UINT8 bPath, VDP_3D_MODE_CHG_INFO_T rMode,UINT8 u1BeforeAfter);
#else
EXTERN UINT32 VDP_Drv3DModeChgNotify(UINT8 u13dMode);
#endif
EXTERN void vDrvDISetPiexelMotionThres(UINT8 u1VdpId);

EXTERN void vDrvDICombMeasure(UINT8 u1VdpId);

EXTERN void _VDP_vDrvDITrickModeOnOff(UINT8 u1VdpId, UINT8 u1OnOff);

EXTERN void _VDP_vDrvDIFilmModeOnOff(UINT8 u1VdpId, UINT8 u1OnOff);

EXTERN UINT32 VDP_SendSCPOSOutsizeSRMEvent(UCHAR ucVdpId);

//EXTERN void VDP_SpecialVGA(UCHAR ucEnable);

EXTERN void VDP_MutexLock(void);

EXTERN void VDP_MutexUnlock(void);

EXTERN HANDLE_T VDP_GetMutex(void);

#ifdef DIVX_PLUS_CER
#ifdef CC_B2R_CHAPTER_CHG
EXTERN BOOL VDP_SetChpterEnable(VDP_CHAPTER_T*    prChapter);
#endif
#endif

EXTERN UCHAR VDP_GetB2rId(UCHAR ucVdpId);
EXTERN UCHAR VDP_GetVdpIds(UCHAR ucB2rId, UCHAR* pucVdpIds);
EXTERN UCHAR VDP_GetVdpId(UCHAR ucB2rId);
//-----------------------------------------------------------------------------
/**
 * @brief u4ScpipForceDispOff , currently for TVE use
 * @param  u4VdpId: video path
 * @param  u4OnOff: SV_TRUE(Display off), SV_FALSE (Display Normal)
 * @retval void
 */
//-----------------------------------------------------------------------------
EXTERN void VDP_SetDisplayOff_Ext(UINT32 u4Path, UINT32 u4DispOffModule,UINT32 u4OnOff);
EXTERN void VDP_SetDisplayOff(UINT32 u4Path, UINT32 u4OnOff);

#if 0 // def CC_MT5392B
EXTERN void vDrvMJCDynOnOff(UINT8 bOnOff);
extern UINT8 bDrvMJCGetFrameDelay(void);
#endif

EXTERN void VDP_XdataInit(void);
EXTERN void VDP_XdataSetSrcRegion(UINT32 u4VdpId, VDP_REGION_T rSrcRegion);
EXTERN void VDP_XdataSetOutRegion(UINT32 u4VdpId, VDP_REGION_T rOutRegion);
EXTERN void VDP_XdataSetOverscan(UINT32 u4VdpId, VDP_OVERSCAN_REGION_T rOverscanRegion);
EXTERN void VDP_XdataSetDispmode(UINT32 u4VdpId, UINT32 u4Mode);
EXTERN void VDP_XdataSetScaler10Bit(UINT32 u4VdpId, UINT32 u4Mode);
EXTERN void VDP_XdataSet121Map(UCHAR ucVdpId, UINT32 ucEn);
EXTERN void VDP_XdataSetNewNonlEn(UCHAR ucVdpId, UINT32 ucEn);
EXTERN void VDP_XdataSetNewNonlPrm(UCHAR ucVdpId, VDP_NEW_NONLINEAR_PRM_T rNonlPrm);

//-----------------------------------------------------------------------------
// Type definitions
//-----------------------------------------------------------------------------

/** Brief of HAL_5371_MDDI_14_FIELD_T
 */
typedef struct
{
    UINT32 fgBgYUV420                      :    1;
    UINT32 fgBg420Frame                    :    1;
    UINT32 u4BgDramSegment                 :    2;
    UINT32 fgBgOldInterp                   :    1;
    UINT32 fgBgOldStore                    :    1;
    UINT32 fgBgNo420Set                    :    1;
    UINT32 fgBgUseB2rVsync                 :    1;

    UINT32 fgBgSelB2rVsyncEnd              :    1;
    UINT32 u4BgDelayB2rVsync               :    3;
    UINT32 u4BgRotateB2Rptr                :    2;
    UINT32 u4BgShift32Dnt                  :    2;

    UINT32 u4PSkip                         :    11;
    UINT32 fgNone1                         :    1;
    UINT32 fgBgInv420Backup                :    1;
    UINT32 fgBgInv22Det                    :    1;
    UINT32 fgBgInv22Sel                    :    1;
    UINT32 fgBgShift32Dir                  :    1;
} HAL_5371_MDDI_14_FIELD_T;

/** Brief of HAL_5371_MDDI_14_UNION_T
 */
typedef union
{
    UINT32 u4Reg;
    HAL_5371_MDDI_14_FIELD_T rField;
} HAL_5371_MDDI_14_UNION_T;


/** Brief of HAL_5371_MDDI_1C_FIELD_T
 */
typedef struct
{
    UINT32 fgVDOEN                          :    1;
    UINT32 fgAPTR                           :    1;
    UINT32 fgHDEN                           :    1;
    UINT32 fgSUBX                           :    1;
    UINT32 fgNone1                          :    1;
    UINT32 fgVSYNC_P                        :    1;
    UINT32 fgHSYNC_P                        :    1;
    UINT32 fgRUND_80                        :    1;

    UINT32 fgFS_RST                         :    1;
    UINT32 fgACTP                           :    1;
    UINT32 fgMA3F                           :    1;
    UINT32 fgAPD                            :    1;
    UINT32 fgERRD                           :    1;
    UINT32 fgAPF                            :    1;
    UINT32 fgF1EDGE                         :    1;
    UINT32 fgF1FLD                          :    1;

    UINT32 fgPROT                           :    1;
    UINT32 fgWRST                           :    1;
    UINT32 fgSTILL                          :    1;
    UINT32 fgWREND                          :    1;
    UINT32 fgPROTH1                         :    1;
    UINT32 fgDISP3                          :    1;
    UINT32 fgPROTH2                         :    1;
    UINT32 fgPROTCOORD                      :    1;

    UINT32 fgTST0                           :    1;
    UINT32 fgTST1                           :    1;
    UINT32 fgTST2                           :    1;
    UINT32 fgTST3                           :    1;
    UINT32 fgTST4                           :    1;
    UINT32 fgTST5                           :    1;
    UINT32 fgTST6                           :    1;
    UINT32 fgTST7                           :    1;
} HAL_5371_MDDI_1C_FIELD_T;

/** Brief of HAL_5371_MDDI_1C_UNION_T
 */
typedef union
{
    UINT32 u4Reg;
    HAL_5371_MDDI_1C_FIELD_T rField;
} HAL_5371_MDDI_1C_UNION_T;


/** Brief of HAL_5371_MDDI_3C_FIELD_T
 */
typedef struct
{
    UINT32 u4Reserved1                     :    15;
    UINT32 fg32Seq                         :    1;
    UINT32 fgSceneChg                      :    1;
    UINT32 fgBadEdit                       :    1;
    UINT32 fg22Seq                         :    1;
    UINT32 u4Reserved2                     :    13;
} HAL_5371_MDDI_3C_FIELD_T;

/** Brief of HAL_5371_MDDI_3C_UNION_T
 */
typedef union
{
    UINT32 u4Reg;
    HAL_5371_MDDI_3C_FIELD_T rField;
} HAL_5371_MDDI_3C_UNION_T;

//-----------------------------------------------------------------------------
// Other constants
//-----------------------------------------------------------------------------

#define VDP_MDDI_BOB_CHANGE_TIME            (8)

#define MDDI_1080_WIDTH                     1920
#define MDDI_1080_HEIGHT                    1080

#define MDDI_720P_WIDTH                     1280
#define MDDI_720P_HEIGHT                    720

#define MDDI_NTSC_WIDTH                     720
#define MDDI_NTSC_HEIGHT                    480

#define MDDI_PAL_WIDTH                      720
#define MDDI_PAL_HEIGHT                     576

#define MDDI_HPSD_UNIT                      (0x800)

#define MDDI_PSCAN_LIMITATION               (95)



#define MDDI_MDDI_HPDS		0
#define MDDI_VDOIN_HPDS		1

#define MDDI_DRAM_32MB		0
#define MDDI_DRAM_64MB		1

typedef enum
{
    VDP_LOG_DBG_MSK_REGION       = 0,
    VDP_LOG_DBG_MSK_OUTR         , // 1
    VDP_LOG_DBG_MSK_SRCR         , // 2
    VDP_LOG_DBG_MSK_OVSN         , // 3
    VDP_LOG_DBG_MSK_MODE         , // 4
    VDP_LOG_DBG_MSK_DISP         , // 5
    VDP_LOG_DBG_MSK_MEMC_ISR     , // 6
    VDP_LOG_DBG_MSK_DELAY        , // 7
    VDP_LOG_DBG_MSK_POS          , // 8
    VDP_LOG_DBG_MSK_TRK          , // 9
    VDP_LOG_DBG_MSK_VRR          , // 10
    VDP_LOG_DBG_MSK_FSC_ISR      , // 11
    VDP_LOG_DBG_MSK_MIB_ISR      , // 12
    VDP_LOG_DBG_MSK_BYP          , // 13
    VDP_LOG_DBG_MSK_MEMC_CTRL    , // 14
    VDP_LOG_DBG_MSK_VB1_CTRLBIT  , // 15
    VDP_LOG_DBG_MSK_DATARATE     , // 16
    VDP_LOG_DBG_MSK_TRIG         , // 17
    VDP_LOG_DBG_MSK_META         , // 18
    VDP_LOG_DBG_MSK_INVALID 
}VDP_LOG_DBG_MSK_T;

EXTERN INT32 VDP_LogChkMsk(UCHAR ucVdpId, VDP_LOG_DBG_MSK_T u4Mask);
EXTERN INT32 VDP_FilterLog(UCHAR ucVdpId, UCHAR ucEnable, VDP_LOG_DBG_MSK_T u4Mask);


#endif    // VDP_DRVIF_H

