/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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 *****************************************************************************/

 /*************************************************************************
 *
 * Filename:
 * ---------
 *   $Workfile: drv_regen.h $
 *
 * Project:
 * --------
 *
 *
 * Description:
 * ------------
 *
 *
 * Author:
 * -------
 *
 *
 * Last changed:
 * -------------
 * $Author: brianpc.huang $
 *
 * $Date: 2015/05/29 $
 *
 * $Revision: #1 $
*************************************************************************/
#ifndef _DRV_REGEN_H_
#define _DRV_REGEN_H_
#include "drv_scaler.h"

#define REGEN_WA1_FOR_MIB_HEIGHT
//#define REGEN_BOTH_IN_PREREGEN_AND_FSCREGEN //oryx no need this,because Oryx Fsc regen in 444 domain
#define REGEN_IN_FSC_FOR_PSCANDISPMODE_PAL
extern UINT8 bREGENModeChanged[VDP_MAX_NS];

typedef struct
{
    UINT8 bREGENModeChanged;
    VRM_INFO_T regenIn;
    VRM_INFO_T regenOut;
	UINT32 u4InputWidth;			        //input width(pixel based)
	UINT32 u4InputHeight;                   //input height(pixel based)
	UINT32 u4OutputX;			            //output X(pixel based)
	UINT32 u4OutputY;                       //output Y(pixel based)
	UINT32 u4OutputWidth;                   //output Width(pixel based)
	UINT32 u4OutputHeight;	                //output Height(pixel based)    
}REGEN_INFO_T;

typedef enum
{
    REGEN_MODULE_PRE_REGEN,
    REGEN_MODULE_FSC_REGEN,
    REGEN_MODULE_MONOUT_REGEN,
}REGEN_MODULE_E;

typedef enum{
    REGEN_IN_FMT_2D=0,
    REGEN_IN_FMT_FP=2,
    REGEN_IN_FMT_FS=3,
    REGEN_IN_FMT_TB=4,
    REGEN_IN_FMT_SS=8,
    REGEN_IN_FMT_RD=10,
    REGEN_IN_FMT_QC=11,
    REGEN_IN_FMT_LI=12,
    REGEN_IN_FMT_PR=13,
    REGEN_IN_FMT_CI=14,
    REGEN_IN_FMT_CB=15
}REGEN_IN_FMT;

#define REGEN_WRITE_FLD(reg,value,fld) vIO32WriteFldAlign(reg, value, fld)
#define REGEN_READ_FLD(reg,fld) IO32ReadFldAlign(reg,fld)
#define getRegenInfo(bPath,mod) ((mod == REGEN_MODULE_PRE_REGEN)? &_regenInfo[bPath==SV_VP_TNR?SV_VP_PIP+1:bPath]: &_fscRegenInfo[bPath==SV_VP_PIP?bPath:SV_VP_MAIN])

void vRegenSwInit(UINT8 bPath,REGEN_MODULE_E mod);
void vRegenHwInit(UINT8 bPath,REGEN_MODULE_E mod); 
void vRegenSetModeChanged(UINT8 bPath,REGEN_MODULE_E mod);
UINT8 fgRegenIsModeChanged(UINT8 bPath,REGEN_MODULE_E mod);
void vRegenClearModeChanged(UINT8 bPath,REGEN_MODULE_E mod);
void vRegenLoop(UINT8 bPath,REGEN_MODULE_E mod);

UINT32 u4RegenGetInHeight(UINT8 bPath,REGEN_MODULE_E mod);
UINT32 u4RegenGetInWidth(UINT8 bPath,REGEN_MODULE_E mod);
UINT32 u4RegenGetOutHeight(UINT8 bPath,REGEN_MODULE_E mod);
UINT32 u4RegenGetOutWidth(UINT8 bPath,REGEN_MODULE_E mod);
UINT32 u4RegenGetVstart(UINT8 bPath,REGEN_MODULE_E mod);

void vRegenSetInputResolutionReg(UINT32 u4VdpId, REGEN_MODULE_E mod,UINT32 u4InW, UINT32 u4InH);
void vRegenSetOutputResolutionReg(UINT32 u4VdpId, REGEN_MODULE_E mod, UINT32 u4InW, UINT32 u4InH);
void vRegenSetLStartReg(UINT32 u4VdpId, REGEN_MODULE_E mod, UINT32 u4StaH, UINT32 u4StaV);
void vRegenSetRStartReg(UINT32 u4VdpId, REGEN_MODULE_E mod, UINT32 u4StaH, UINT32 u4StaV);
void vRegenSetRegenEnableReg(UINT8 bPath, REGEN_MODULE_E mod, UINT8 bOnOff);
void vRegenSetClipEnableReg(UINT8 bPath, REGEN_MODULE_E mod, UINT8 bOnOff); 
void vRegenClearSetResOutput(UINT8 bPath, REGEN_MODULE_E mod);
void vRegenClearSetResInput(UINT8 bPath, REGEN_MODULE_E mod);
UINT8 bRegenGetSetResOutputStatus(UINT8 bPath, REGEN_MODULE_E mod);
UINT8 bRegenGetSetResInputStatus(UINT8 bPath, REGEN_MODULE_E mod);
void vRegenSetRegenInFormat(UINT8 bPath, REGEN_MODULE_E mod,REGEN_IN_FMT eInFmt);

void vRegenSetImport(UINT8 bPath,REGEN_MODULE_E mod);
void vRegenSetResolutionMode(UINT8 bPath, REGEN_MODULE_E mod, UINT8 bOnOff);
void vRegenSetResolutionInTriSel(UINT8 bPath, REGEN_MODULE_E mod, UINT8 bOnOff);
void vRegenSetResolutionBypass(UINT8 bPath, REGEN_MODULE_E mod, UINT8 bBypass);

void vDrvRegenClrSetRes(UINT8 u1VdpId, REGEN_MODULE_E mod, SET_RES_STATUS_TYPE_E eStatusType);
BOOL bDrvRegenIsSetResDone(UINT8 u1VdpId, REGEN_MODULE_E mod, SET_RES_STATUS_TYPE_E eStatusType);
void vDrvRegenInOutStatusDump(UINT8 bPath,REGEN_MODULE_E mod);
UINT32 vRegenGetRegenOutClk(UINT8 bPath,REGEN_MODULE_E mod);
#endif
