#ifndef EEPROM_LAYOUT_H
#define EEPROM_LAYOUT_H

//----------------------------------------------------------------------------
// HDCP EEPROM customization
//----------------------------------------------------------------------------
/* 
Start Address (Size):
    HDCP:           0x000 (320 Bytes)
    DTV Driver:     0x140 ( 96 Bytes)
    NPTV Driver:    0x1A0 (448 Bytes)
    Custom Driver:  0x360 ( 64 Bytes)
    VGA EDID:       0x3A0 (256 Bytes)
    HDMI EDID:      0x4A0 (272 Bytes)
    MW:             0x5B0 (144 Bytes)
    AP:             0x640 (--- Bytes)
*/
#define DRVCUST_EEPROM_HDMI_HDCP_OFFSET     ((UINT32)0)
#define DRVCUST_EEPROM_HDMI_HDCP_SIZE       ((UINT32)320)

#define DRVCUST_EEPROM_DTV_DRIVER_OFFSET    ((UINT32)(DRVCUST_EEPROM_HDMI_HDCP_OFFSET + DRVCUST_EEPROM_HDMI_HDCP_SIZE))
#define DRVCUST_EEPROM_DTV_DRIVER_SIZE      ((UINT32)96)

#define DRVCUST_EEPROM_NPTV_DRIVER_OFFSET   ((UINT32)(DRVCUST_EEPROM_DTV_DRIVER_OFFSET + DRVCUST_EEPROM_DTV_DRIVER_SIZE))
#define DRVCUST_EEPROM_NPTV_DRIVER_SIZE     ((UINT32)448)

#define DRVCUST_EEPROM_CUSTOM_DRIVER_OFFSET ((UINT32)(DRVCUST_EEPROM_NPTV_DRIVER_OFFSET + DRVCUST_EEPROM_NPTV_DRIVER_SIZE))
#define DRVCUST_EEPROM_CUSTOM_DRIVER_SIZE   ((UINT32)64)

#define DRVCUST_EEPROM_VGA_EDID_OFFSET	    ((UINT32)DRVCUST_EEPROM_CUSTOM_DRIVER_OFFSET + DRVCUST_EEPROM_CUSTOM_DRIVER_SIZE)
#define DRVCUST_VGA_EDID_SIZE               ((UINT32)256)
#define DRVCUST_VGA_EDID_STORAGE_SIZE	    ((UINT32)DRVCUST_VGA_EDID_SIZE)

#define DRVCUST_EEPROM_HDMI_EDID_OFFSET     ((UINT32)(DRVCUST_EEPROM_VGA_EDID_OFFSET + DRVCUST_VGA_EDID_STORAGE_SIZE))
#define DRVCUST_HDMI_EDID_SIZE              ((UINT32)256) 
#define DRVCUST_HDMI_EDID_STORAGE_SIZE	    ((UINT32)DRVCUST_HDMI_EDID_SIZE+16) /* 16 for PhyAddr, actually need 4 only */

#define DRVCUST_EEPROM_DRIVER_SIZE          ((UINT32)(DRVCUST_EEPROM_HDMI_EDID_OFFSET + DRVCUST_HDMI_EDID_STORAGE_SIZE))

#define DRVCUST_EEPROM_MW_OFFSET            ((UINT32)(DRVCUST_EEPROM_HDMI_EDID_OFFSET + DRVCUST_HDMI_EDID_STORAGE_SIZE))
#define DRVCUST_EEPROM_MW_SIZE              ((UINT32)144)
#define DRVCUST_EEPROM_MW_DRIVER_SIZE       ((UINT32)DRVCUST_EEPROM_MW_SIZE)

/*
    Notice:
        HDCP2.x is moved to flash (Partition: Miracast HDCP).
        The defiend area here is just for SW compatible and is NOT actually RESERVED in EEPROM.
        But for avoiding un-expected writing or usage, I overlap this area with PQ's WB data.
        Linux: 0x3200, Android: 0xA200
*/
#ifdef CC_DUALLOADER_SUPPORT
#define DRVCUST_EEPROM_HDCP2X_OFFSET        ((UINT32)4) //change this
#else
#define DRVCUST_EEPROM_HDCP2X_OFFSET		((UINT32)25)
#endif
#define DRVCUST_EEPROM_HDCP2X_SIZE			((UINT32)800)
#define	DRVCUST_EEPROM_HDCP2X_STORAGE_SIZE  ((UINT32)DRVCUST_EEPROM_HDCP2X_SIZE)

#ifdef CC_ENABLE_REBOOT_REASON
#ifndef DRVCUST_EEPROM_ANDROID_OTA_SIZE
#define DRVCUST_EEPROM_ANDROID_OTA_SIZE     ((UINT32)16)
#endif

#ifndef DRVCUST_EEPROM_ANDROID_OTA_OFFSET
#define DRVCUST_EEPROM_ANDROID_OTA_OFFSET   ((UINT32)0x800)
#endif
#endif

#define DRVCUST_EEPROM_EXTEND_OFFSET		((UINT32)0x4000)
#define DRVCUST_EEPROM_EXTEND_SIZE			((UINT32)1024)

#define DRVCUST_EEPROM_EMMC_USB_RECOVERY_OFFSET ((UINT32)0x7BE)   /*1 byte only, in APP space */

#define DRVCUST_EEPROM_AUTOTEST_UPGRADED_PKG_OFFSET  ((UINT32)0x7BD)   /*1 byte only, in APP space, applied when AUTO_TEST=true */

#endif /*EEPROM_LAYOUT_H*/
