/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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 *****************************************************************************/

/*-----------------------------------------------------------------------------
 *
 * $Author: brianpc.huang $
 * $Date: 2015/05/29 $
 * $RCSfile: vga_auto.h,v $
 * $Revision: #1 $
 *
 *---------------------------------------------------------------------------*/


#ifndef _VGA_AUTO_H_
#define _VGA_AUTO_H_

/******************************************************************************
 * Header Files
 *****************************************************************************/
#include "typedef.h"

/******************************************************************************
 * Macro, Type Definition, and Variable Declaratoin
 *****************************************************************************/
 // vga debug flag
/*#define VGA_AUTO_DBG_MSG  	1
#define VGA_AUTO_UI_DBG	1
#define VGA_AUTO_CLK_DBG	1
#define VGA_AUTO_PHASE_DBG 1
#define VGA_AUTO_POS_DBG	1   */

#define NOTIFY_PROGRESS 1
#define VGA_AUTO_SPEEDUP 1
#define VGA_TIMEDELAY_DBG 0

#define VGA_AUTO_CLK_SKIP_TABLE_HTOTAL  0
//#define  VGA_HV_AUTO_CENTER 1

#define fgIsAutoFlgSet(arg) ((_bAutoFlag & (arg)) > 0)
#define vSetAutoFlg(arg) (_bAutoFlag |= (arg))
#define vClrAutoFlg(arg) (_bAutoFlag &= (~(arg)))

#define SP0_AUTO_POSITION (0x1)
#define SP0_AUTO_PHASE (0x1<<1)
#define SP0_AUTO_CLOCK (0x1<<2)
#define SP0_AUTO_POSSET (0x1 << 3)
#define SP0_AUTO_ALL (0x0F)
#define SP1_AUTO_POSITION (0x1<<4)
#define SP1_AUTO_PHASE (0x1<<5)
#define SP1_AUTO_CLOCK (0x1<<6)
#define SP1_AUTO_ALL (0x70)


#define BDTHRSH 86 //modified for 5372,gbsh,20060523
//#define VGA_H_OFST 2 // 1 modify by gellmann for 1600x1200
#define VGA_H_OFST 1 // for mt5360 by Tadd
#define VGA_V_OFST 2 // add 1 for omux align , minus 1 for hdtv align
#define VGA_CLK_PH_THRE 0x4000

#define LogS(x) DBG_Printf(DBG_AUTO, x "\n")
#define LogSB(str,w) DBG_Printf(DBG_AUTO, str "\t%d\t(0x%04x)\n",(unsigned char)w,(unsigned char)w)
#define LogSW(str,w) DBG_Printf(DBG_AUTO, str "\t%d\t(0x%04x)\n",(unsigned int)w,(unsigned int)w)
#define LogD(w) DBG_Printf(DBG_AUTO, "\t%d\t(0x%08x)\n",(unsigned int)w,(unsigned int)w)

//SP0
#define SP0_H 1
#define SP0_V  (1<<1)
#define IsSp0SetAuto(flg)   ((_fgIsAuto0PosFlg&(flg))>0)
#define vSetSp0Auto(flg)    (_fgIsAuto0PosFlg |= (flg))
#define vClrSp0Auto(flg)	(_fgIsAuto0PosFlg &= (~(flg)))
#define vSetSP0AutoState(bState)	(_bVdoSP0AutoState = bState)
#define bGetSP0AutoState()	(_bVdoSP0AutoState)


enum {
	AUTO_FINISHED,
	AUTO_CONTINUED
};

enum {
	MIX_STA,
	PSNE_ONLY	
};

enum {
	PSNE1_ADD,
	PSNE2_ADD,
	PSNE4_ADD,
	PSNE8_ADD	
};

//---------------------------------------
// for global variable initialization
extern UINT8   _bAutoFlag;
extern UINT8   _bVdoSP0AutoState;

extern UINT16   _wVgaClock;

extern UINT8   _bVgaDelayCnt;

extern UINT16   _wVgaVStart; 
extern UINT16   _wVgaVEnd;  
extern UINT16   _wVgaHStart;
extern UINT16   _wVgaHEnd;
//extern UINT8   _bBDChnIdx  ;

extern UINT8   _fgIsAuto0PosFlg;
extern UINT8 _bWaitHwRdy ;
extern UINT8	_bCurPhase;
extern UINT8  _bBestPhase;
extern UINT32	_dBestSum;

//---------------------------------------

extern void vVdoSP0AutoState(void) ;
extern void vDrvVGASetPhase(UINT8 bVal) ;
extern void vDrvSetHPosition(UINT16 wValue);
extern void vDrvSetVPosition(UINT16 wValue);
extern BOOL fgDrvAutoEepWriteWord(UINT16 wAddr, UINT16 wData) ;
extern void vVgaAutoInit(void)  ;
extern void vVgaAutoPosInit(void);

//#if VGA_AUTO_SPEEDUP
extern UINT8 _bAutoISR ;
extern void vVgaAutoClkIsr(void) ;
//    extern void vYPbPrPhaseIsr(void) ; //YPbPr Auto Phase 2006/11/07
//    extern void vVgaPhaseIsr(void) ;
//#endif

#endif
