/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/


#include"x_hal_5381.h"


#define IO_IRTX_BASE (IO_VIRT + 0x29000)


//Page IRTX
#if defined(CC_MT5895)
//add for build pass
//3Dglass, abandoned
#define IRTX_IRTX1CFG (IO_IRTX_BASE + 0x600)
    #define FLD_IRTX1_RIGHTPOSEDGE Fld(1,19,AC_MSKB2)//[19:19]
    #define FLD_IRTX1_SONY_MODE Fld(1,18,AC_MSKB2)//[18:18]
    #define FLD_IRTX1_REAL_MODE Fld(1,17,AC_MSKB2)//[17:17]
    #define FLD_IRTX1_OPEN_DR Fld(1,16,AC_MSKB2)//[16:16]
    #define FLD_IRTX1_DATA_INV Fld(1,15,AC_MSKB1)//[15:15]
    #define FLD_IRTX1_DELAY_TYPE Fld(1,14,AC_MSKB1)//[14:14]
    #define FLD_IRTX1_IROS Fld(1,13,AC_MSKB1)//[13:13]
    #define FLD_IRTX1_BITNUM Fld(5,8,AC_MSKB1)//[12:8]
    #define FLD_IRTX1_IRINV Fld(1,7,AC_MSKB0)//[7:7]
    #define FLD_IRTX1_EXT_MODE Fld(1,6,AC_MSKB0)//[6:6]
    #define FLD_IRTX1_HW_MODE Fld(1,5,AC_MSKB0)//[5:5]
    #define FLD_IRTX1_IGNORE_LEFT Fld(1,4,AC_MSKB0)//[4:4]
    #define FLD_IRTX1_IGNORE_RIGHT Fld(1,3,AC_MSKB0)//[3:3]
    #define FLD_IRTX1_L0H_VALUE Fld(1,2,AC_MSKB0)//[2:2]
    #define FLD_IRTX1_L1L_VALUE Fld(1,1,AC_MSKB0)//[1:1]
    #define FLD_IRTX1_STRT Fld(1,0,AC_MSKB0)//[0:0]
#define IRTX_IRTX1D (IO_IRTX_BASE + 0x604)
    #define FLD_IRTX1_DATA Fld(32,0,AC_FULLDW)//[31:0]
#define IRTX_IRTX1_L0H (IO_IRTX_BASE + 0x608)
    #define FLD_IRTX1_L0H Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX1_L0L (IO_IRTX_BASE + 0x60C)
    #define FLD_IRTX1_L0L Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX1_L1H (IO_IRTX_BASE + 0x610)
    #define FLD_IRTX1_L1H Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX1_L1L (IO_IRTX_BASE + 0x614)
    #define FLD_IRTX1_L1L Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX1_SYNCH (IO_IRTX_BASE + 0x618)
    #define FLD_IRTX1_SYNCH Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX1_SYNCL (IO_IRTX_BASE + 0x61C)
    #define FLD_IRTX1_SYNCL Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX1MT (IO_IRTX_BASE + 0x620)
    #define FLD_IRTX1_CDT Fld(16,16,AC_FULLW32)//[31:16]
    #define FLD_IRTX1_CWT Fld(16,0,AC_FULLW10)//[15:0]
#define IRTX_IRTX1LOD (IO_IRTX_BASE + 0x624)
    #define FLD_IRTX1_LO_DATA Fld(32,0,AC_FULLDW)//[31:0]
#define IRTX_IRTX1LCD (IO_IRTX_BASE + 0x628)
    #define FLD_IRTX1_LC_DATA Fld(32,0,AC_FULLDW)//[31:0]
#define IRTX_IRTX1ROD (IO_IRTX_BASE + 0x62C)
    #define FLD_IRTX1_RO_DATA Fld(32,0,AC_FULLDW)//[31:0]
#define IRTX_IRTX1RCD (IO_IRTX_BASE + 0x630)
    #define FLD_IRTX1_RC_DATA Fld(32,0,AC_FULLDW)//[31:0]
#define IRTX_IRTX1EXTL (IO_IRTX_BASE + 0x634)
    #define FLD_IRTX1_EXTL_DATA Fld(32,0,AC_FULLDW)//[31:0]
#define IRTX_IRTX1EXTR (IO_IRTX_BASE + 0x638)
    #define FLD_IRTX1_EXTR_DATA Fld(32,0,AC_FULLDW)//[31:0]
#define IRTX_IRTX1SWD (IO_IRTX_BASE + 0x66C)
    #define FLD_IRTX1_SW_DELAY Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX1HWLOD (IO_IRTX_BASE + 0x670)
    #define FLD_IRTX1_HW_LODELAY Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX1HWLCD (IO_IRTX_BASE + 0x674)
    #define FLD_IRTX1_HW_LCDELAY Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX1HWROD (IO_IRTX_BASE + 0x678)
    #define FLD_IRTX1_HW_RODELAY Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX1HWRCD (IO_IRTX_BASE + 0x67C)
    #define FLD_IRTX1_HW_RCDELAY Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX1PHASE (IO_IRTX_BASE + 0x680)
    #define FLD_IRTX1_SONY_PHASE Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX1WIDTH (IO_IRTX_BASE + 0x684)
    #define FLD_IRTX1_SONY_WIDTH Fld(24,0,AC_MSKDW)//[23:0]
//--------------------------------------------------------------------
#define IRTX_IRTX2CFG (IO_IRTX_BASE + 0x640)
    #define FLD_OPEN_DRAIN Fld(1,16,AC_MSKB2)//[16:16]
    #define FLD_DATA_INV Fld(1,15,AC_MSKB1)//[15:15]
    #define FLD_IRTX2_BITNUM Fld(7,8,AC_MSKB1)//[14:8]
    #define FLD_IRTX2_IRINV Fld(1,7,AC_MSKB0)//[7:7]
    #define FLD_IRTX2_IROS Fld(1,6,AC_MSKB0)//[6:6]
    #define FLD_IRTX2_RODR Fld(1,5,AC_MSKB0)//[5:5]
    #define FLD_IRTX2_BODR Fld(1,4,AC_MSKB0)//[4:4]
    #define FLD_IRTX2_SWO Fld(1,3,AC_MSKB0)//[3:3]
    #define FLD_IRTX2_MODE Fld(2,1,AC_MSKB0)//[2:1]
    #define FLD_IRTX2_STRT Fld(1,0,AC_MSKB0)//[0:0]
#define IRTX_IRTX2D0 (IO_IRTX_BASE + 0x644)
    #define FLD_IRTX2_R3 Fld(8,24,AC_FULLB3)//[31:24]
    #define FLD_IRTX2_R2 Fld(8,16,AC_FULLB2)//[23:16]
    #define FLD_IRTX2_R1 Fld(8,8,AC_FULLB1)//[15:8]
    #define FLD_IRTX2_R0 Fld(8,0,AC_FULLB0)//[7:0]
#define IRTX_IRTX2D1 (IO_IRTX_BASE + 0x648)
    #define FLD_IRTX2_R7 Fld(8,24,AC_FULLB3)//[31:24]
    #define FLD_IRTX2_R6 Fld(8,16,AC_FULLB2)//[23:16]
    #define FLD_IRTX2_R5 Fld(8,8,AC_FULLB1)//[15:8]
    #define FLD_IRTX2_R4 Fld(8,0,AC_FULLB0)//[7:0]
#define IRTX_IRTX2D2 (IO_IRTX_BASE + 0x64C)
    #define FLD_IRTX2_R11 Fld(8,24,AC_FULLB3)//[31:24]
    #define FLD_IRTX2_R10 Fld(8,16,AC_FULLB2)//[23:16]
    #define FLD_IRTX2_R9 Fld(8,8,AC_FULLB1)//[15:8]
    #define FLD_IRTX2_R8 Fld(8,0,AC_FULLB0)//[7:0]
#define IRTX_IRTX2_L0H (IO_IRTX_BASE + 0x650)
    #define FLD_IRTX2_L0H Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX2_L0L (IO_IRTX_BASE + 0x654)
    #define FLD_IRTX2_L0L Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX2_L1H (IO_IRTX_BASE + 0x658)
    #define FLD_IRTX2_L1H Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX2_L1L (IO_IRTX_BASE + 0x65C)
    #define FLD_IRTX2_L1L Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX2SYNCH (IO_IRTX_BASE + 0x660)
    #define FLD_IRTX2_SYNCH Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX2SYNCL (IO_IRTX_BASE + 0x664)
    #define FLD_IRTX2_SYNCL Fld(24,0,AC_MSKDW)//[23:0]
#define IRTX_IRTX2MT (IO_IRTX_BASE + 0x668)
    #define FLD_IRTX2_CDT Fld(16,16,AC_FULLW32)//[31:16]
    #define FLD_IRTX2_CWT Fld(16,0,AC_FULLW10)//[15:0]
#endif

