/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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 *****************************************************************************/

/*-----------------------------------------------------------------------------
 *
 * $Author: brianpc.huang $
 * $Date: 2015/05/29 $
 * $RCSfile: spdif_if.h,v $
 * $Revision: #1 $
 *
 *---------------------------------------------------------------------------*/

/** @file spdif_if.h
 *  Brief of file spdif_if.h.
 *  Details of file spdif_if.h (optional).
 */

#ifndef _SPDIF_IF_H_
#define _SPDIF_IF_H_

// *********************************************************************
// Type definitions
// *********************************************************************
typedef struct _SPDIF_IN_FLAG_T
{
  /* BYTE 0 */
  UINT32 fgSpdifChk:1;
  UINT32 fgSpdifLock:1;
  UINT32 fgChkTimeOut:1;
  UINT32 fgAUDION:1;
  UINT32 Freq:4;
  /* BYTE 1 */
  UINT32 fgPEM:1;
  UINT32 Reserve:23;
} SPDIF_IN_FLAG_T;

// *********************************************************************
// Constant definitions
// *********************************************************************

#define RTJ_16BIT                   0x00
#define RTJ_18BIT                   0x01
#define RTJ_20BIT                   0x02
#define RTJ_24BIT                   0x03
#define I2S_16BIT                   0x04
#define I2S_18BIT                   0x05
#define I2S_20BIT                   0x06
#define I2S_24BIT                   0x07
#define LTJ_16BIT                   0x08
#define LTJ_18BIT                   0x09
#define LTJ_20BIT                   0x0A
#define LTJ_24BIT                   0x0B


#define FS256_16K                   0x00
#define FS256_22K                   0x01
#define FS256_24K                   0x02
#define FS256_32K                   0x03
#define FS256_44K                   0x04
#define FS256_48K                   0x05
#define FS256_64K                   0x06
#define FS256_88K                   0x07
#define FS256_96K                   0x08
#define FS256_176K                  0x09
#define FS256_192K                  0x0A
#define FS512_44K                   0x0B

#define FS384_16K                   0x00
#define FS384_22K                   0x01
#define FS384_24K                   0x02
#define FS384_32K                   0x03
#define FS384_44K                   0x04
#define FS384_48K                   0x05
#define FS384_64K                   0x06
#define FS384_88K                   0x07
#define FS384_96K                   0x08
#define FS384_176K                  0x09
#define FS384_192K                  0x0A
#define FS768_44K                   0x0B


#define AK4114_DEV_ADDR    0x10
// setting sif clk
#define SIF_CLK_DIV 0x100

// for Audion Sampling rate
#define AFS512_48K                  0
#define AFS256_96K                  1
#define AFS128_192K                 2

#define DSP_AIN_DISABLE     0x00
#define DSP_AIN_SPDIF       0x01
#define DSP_AIN_LINE        0x03
#define DSP_AIN_AUDION      0x04
#define DSP_AIN_PEM         0x08

#define DSP_AIN_FREQ_MASK   0xf0
#define DSP_AIN_FREQ44_1K   0x00
#define DSP_AIN_FREQ48K     0x20
#define DSP_AIN_FREQ32K     0x30
#define DSP_AIN_FREQ88_2K   0x80
#define DSP_AIN_FREQ96K     0xa0
#define DSP_AIN_FREQ176_4K  0xc0
#define DSP_AIN_FREQ192K    0xe0

//  for karaoke scoring
#define  DSP_KSCORE_OFF      0x0
#define  DSP_KSCORE_ON       0x1
#define  DSP_KSCORE_RESET    0x2
#define  DSP_KSCORE_MAXSCORE 100
#define  DSP_KSCORE_MINSCORE 0

// for voice detection
#define  DSP_VOCDTKN_ON      0x1
#define  DSP_VOCDTKN_OFF     0x0
#define DSP_VOCDTKN_MAN_TH   0x02

// for ADAC_CMD_AIN_SEL
#define AIN_SEL_OFF                 0x00
#define AIN_SEL_D0                  0x10
#define AIN_SEL_D1                  0x11
#define AIN_SEL_D2                  0x12
#define AIN_SEL_D3                  0x13
#define AIN_SEL_L0                  0x20
#define AIN_SEL_L1                  0x21
#define AIN_SEL_L2                  0x22
#define AIN_SEL_L3                  0x23

#define SR_AIN_FLAG         0x04
#define SR_ADAC_ST          0x05

// *********************************************************************
// Export API
// *********************************************************************
void vSpdifDataFormat(BYTE bDataFormat);
void vSpdifChgMCLK(BYTE bSampleRate);
UINT8 bSpdifDetSmpRate(void);
BOOL fgSpdifDetPreEmphasis(void);
BOOL fgSpdifDetAudioBitOut(void);
void vSpdifDeEmphasisEN(BYTE bEnable);
void vSpdifPWN(BYTE bEnable);
void vSpdifChInSel(BYTE bCh);
void vSpdifClkMode(BYTE bClkMode);
void vSpdifINT0(BYTE bUlockEn , BYTE bPAREn);

/** SPDIF Transciver Initial Routine.
 *
 *  @retval void
 */
extern void SPDIF_InInit(void);

/** SPDIF lock check.
 *
 *  @retval void
 */
extern BOOL SPDIF_InLockCheck(void);

/** Rigister data dump.
 *
 *  @retval void
 */
extern void SPDIF_InRegisterDump(void);

/** SPDIF in channel select.
 *
 *  @param[in]     u1Ch   "0":RX0,"1":RX1,"2":RX2,"3":RX3.
 *
 *  @retval void
 */
extern void SPDIF_InChSel(UINT8 u1Ch);

/** SPDIF in enable.
 *
 *  @param[in]     fgEnable   "TRUE" for enable, "FALSE" for power down.
 *
 *  @retval void
 */
extern void SPDIF_InEnable(BOOL fgEnable);

#endif  //_SPDIF_IF_H_

