/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License 
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public 
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/
#ifndef __MT53__MT53_H__
#define __MT53__MT53_H__

#include <linux/fb.h>

#include <directfb.h>

#include <fusion/shm/pool.h>

#include <core/layers.h>
#include <core/screens.h>
#include <core/surface_pool.h>

#include "mt53_fb.h"

#include "surfacemanager.h"

#include <gfx_cmdque.h>
#include <gfx_if.h>

#ifndef FB_ACCEL_MEDIATEK_53XX
#define FB_ACCEL_MEDIATEK_53XX 5300
#endif

#define MT53_PRIMARY_SUPPORTED_OPTIONS (DLOP_ALPHACHANNEL | DLOP_OPACITY | DLOP_SRC_COLORKEY)

#ifndef DEFAULT_LAYER_WIDTH
#define DEFAULT_LAYER_WIDTH 960
#endif
#ifndef DEFAULT_LAYER_HEIGHT
#define DEFAULT_LAYER_HEIGHT 540
#endif
#define MT53_PRIMARY_DEFAULT_WIDTH DEFAULT_LAYER_WIDTH
#define MT53_PRIMARY_DEFAULT_HEIGHT DEFAULT_LAYER_HEIGHT

#define MT53_MAX_OSD_PLANE     (MT53_LAYER_MAX)
#define MT53_PMX_MAX_INPORT_NS 0x8

#if DIRECT_INTERFACE_DBG_DELTA
#define MT53_MAX_DBG_DELTA              (DDDT_MAX)
#else
#define MT53_MAX_DBG_DELTA              (0x1)
#endif
#define MT53_DBG_DELTA_ENABLE           (0x1)


typedef struct {
     long long   u8_dfb_delta_time;
     long long   u8_cnt;
} MT53_DBG_DELTA_T;
#ifdef DFB_INPUT_FILER_EN

#define MT53_MAX_PARTICIPANTS           (20)
typedef struct
{
    FusionCall  call;
    bool        mark;
	bool        inputfilter;
    int         pid;
}mt53_participant_t;
#endif
typedef struct {
     CoreSurfacePool           *pool;

     FusionSHMPoolShared       *shmpool;

     SurfaceManager            *manager;
     SurfaceManager            *manager_fbm;
     SurfaceManager            *manager_3dmm;
     SurfaceManager            *manager_vdp;
     SurfaceManager            *manager_crsr;
     #ifdef CC_B2R44K2K_SUPPORT
     unsigned int               m_B2R44K2KFlags;
     #endif
#ifdef DFB_INPUT_FILER_EN
	 mt53_participant_t         participants[MT53_MAX_PARTICIPANTS];
	 int                        participant_number;
	 DFBInputEvent              input_event;
#endif
     unsigned int               u4_dbg_lvl;
     MT53_DBG_DELTA_T           a_dbg_delta[MT53_MAX_DBG_DELTA];
} MT53Shared;

typedef struct 
{
    MT53Shared                 *shared;
    CoreDFB                    *core;
    int                        fd;
    struct fb_fix_screeninfo  fix;
    void                       *mem;

    struct mt53fb_imagebuffer  imagebuf;
    struct mt53fb_imagebuffer  imagebuf2;
    struct mt53fb_imagebuffer  vdpbuf;
    struct mt53fb_imagebuffer  t_fbm[E_OAD_BUF_MAX];
    struct mt53fb_imagebuffer  t_crsr;
#ifdef CC_B2R44K2K_SUPPORT
    struct mt53fb_imagebuffer  m_B2RDfbBuf[B2R_BUFFER_NUM];
    struct B2R44K2K_Buffer     m_B2RSysBuf[B2R_BUFFER_NUM];
#endif  
#ifdef DFB_INPUT_FILER_EN

    DFBInputFilter input_filter;
#endif  
} MT53;

typedef struct {
     /* file descriptor from /dev/fb0 */
     int                    fd;

     /* mapping of shared command queue control structure and DMA region */
     volatile GFX_CMDQUE_T *shm_cmd_que;
     volatile UINT64       *cmd_que_buf;

     int num_plane;
     
     CoreScreen              *screen;     

     CoreLayer *layer1;
     CoreLayer *layer2;
     CoreLayer *layer3; 
     CoreLayer *layer_vdp;
     CoreLayer *cursor;
     CoreLayer *layer_vdp2;
#ifdef CC_B2R44K2K_SUPPORT
     CoreLayer *m_ContainerLayer;
#endif
} MT53DriverData;


#define PMX_MAIN    0 // VDP1
#define PMX_PIP     1 // VDP2
#define PMX_OSD1    2 // VDP3
#define PMX_OSD2    3 // VDP4
#define PMX_OSD3    4 // VDP5
#define PMX_MAX_INPORT_NS 5


#ifdef CC_HW_WINDOW_SUPPORT

typedef struct
{
    int magic;
}MT53RegionData;

#endif


typedef struct 
{
    MT53LayerID            layer;
    /*CC_DFB_SUPPORT_VDP_LAYER   */  
    int pitch;
    int height;
    unsigned char _3dmode;    
    unsigned int u4CropBottomOffset;
    unsigned int u4CropTopOffset;
    unsigned int u4CropLeftOffset;
    unsigned int u4CropRightOffset;    
#ifdef CC_HW_WINDOW_SUPPORT
    MT53RegionData *curregion;
#endif  
} MT53LayerData;

typedef struct 
{
     /* validation flags */
     int                    v_flags;

     /* cached/computed values */
     void                  *dst_addr;
     unsigned long          dst_phys;
     unsigned long          dst_pitch;
     DFBSurfacePixelFormat  dst_format;
     unsigned long          dst_bpp;

     void                  *src_addr;
     unsigned long          src_phys;
     unsigned long          src_pitch;
     DFBSurfacePixelFormat  src_format;
     unsigned long          src_bpp;

     DFBColor               color;
     unsigned long          color_pixel;

     u32                    bltopts;

     u32                porterduff;

     u32                       rotateopt;
     u32 src_cbcr_offset;
     u32 dst_cbcr_offset;       
    CoreSurfaceAccessFlags   src_access;
    CoreSurfaceAccessFlags   dst_access;
    EX_DeviceData            ex_data;  
}MT53DeviceData;

//#ifdef GFX_IOMMU_IOVA_SUPPORT
typedef struct 
{
     int             magic;
     int             offset;
     int             pitch;
     int             size;
     void *          u4_addr;
     unsigned int    u4_phy;
     Chunk          *chunk;
     unsigned int    u4_vdo_mem_type;
	 int   pid[E_DSSP_MAX];
     DFB_IOMMU_PIN_RANGE_T pin_range[E_DSSP_MAX];
} MT53AllocationData;
//#endif

extern void mt53_gfx_set_mmu(GFX_MMU_T *pt_this, int fgPhyEn);

extern MT53 *dfb_mt53;

extern const SurfacePoolFuncs   mt53SurfacePoolFuncs;
extern /*const*/ DisplayLayerFuncs  mt53PrimaryLayerFuncs;
extern /*const*/ ScreenFuncs        mt53PrimaryScreenFuncs;
extern void system_mmap_crsr_addr(void);
extern void system_mmap_imagebuf_addr(void);
extern void system_munmap_imagebuf_addr(void);
extern void system_mmap_vdpbuf_addr(void);
extern void system_munmap_vdpbuf_addr(void);
extern void system_munmap_imagebuf2_addr(void);
extern void system_mmap_imagebuf2_addr(void);
extern void system_munmap_check(void);
extern void mt53_fill_rect(unsigned int u4_addr,unsigned int u4_pitch,unsigned int u4_h,int fgPhyEn);

#endif
