/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/

#ifndef MTK_DMX_H
#define MTK_DMX_H

#include "dmx_if.h"

// The input pin set
/*************************************************************
DMX_PINSET_EXT1 = 0x10,          // serial
    //PAD_DEMOD_TSCLK
    //PAD_DEMOD_TSVAL
    //PAD_DEMOD_TSSYNC
    //PAD_DEMOD_TSDATA0

DMX_PINSET_EXT2_0 = 0x30,        // serial
    //PAD_GPIO15 --> TSCLK
    //PAD_GPIO16 --> TSVAL
    //PAD_GPIO17 --> TSSYNC
    //PAD_GPIO18 --> TSDATA0

DMX_PINSET_EXT2_1 = 0x40,        // serial
    //PAD_DEMOD_TSDATA1 -->CLK
    //PAD_DEMOD_TSDATA2 -->VALID
    //PAD_DEMOD_TSDATA3 -->SYNC
    //PAD_DEMOD_TSDATA4 -->DATA0

DMX_PINSET_EXT2_2 = 0x50,        // serial
    //PAD_CI_TSCLK -->CLK
    //PAD_CI_TSVAL -->VALID
    //PAD_CI_TSSYNC -->SYNC
    //PAD_CI_TSDATA0 -->DATA0
    
DMX_PINSET_EXT2_3 = 0x60,        // serial
    //PAD_GPIO38   --> CLK
    //PAD_GPIO39   --> VALID
    //PAD_GPIO40   --> SYNC
    //PAD_GPIO41   --> DATA0

DMX_PINSET_EXT2_5 = 0x80,        // serial
    //PAD_GPIO42   --> CLK
    //PAD_GPIO43   --> VALID
    //PAD_GPIO44   --> SYNC
    //PAD_GPIO48   --> DATA0

DMX_PINSET_EXT3_0 = 0xA0,        // serial
    //PAD_DEMOD_TSDATA1 -->CLK
    //PAD_DEMOD_TSDATA2 -->VALID
    //PAD_DEMOD_TSDATA3 -->SYNC
    //PAD_DEMOD_TSDATA4 -->DATA0

DMX_PINSET_EXT3_1 = 0xB0,        // serial      
    //PAD_GPIO49 -->CLK
    //PAD_GPIO50 -->VALID
    //PAD_GPIO51 -->SYNC
    //PAD_GPIO52 -->DATA0

DMX_PINSET_EXT3_2 = 0xC0,        // serial
    //PAD_GPIO63 -->CLK
    //PAD_GPIO64 -->VALID
    //PAD_GPIO65 -->SYNC
    //PAD_GPIO66 -->DATA0

DMX_PINSET_EXT4 = 0xE0,          // serial
    //PAD_GPIO34 -->CLK
    //PAD_GPIO35 -->VALID
    //PAD_GPIO36 -->SYNC
    //PAD_GPIO37 -->DATA0
**************************************************************/

// Framer Mode
//  DMX_FRAMER_SERIAL: 1 bit data
//  DMX_FRAMER_PARALLEL: 8 bits data
//  DMX_FRAMER_TWOBIT: 2 bits data for MT5135

// Edge Setting
//  DMX_EDGE_POSITIVE: positive edge sampling
//  DMX_EDGE_NEGATIVE: negative edge sampling

// Sync Control
//  DMX_SYNC_INTERNAL: sync by data is 0x47
//  DMX_SYNC_EXTERNAL: sync by sync singal
static const DMX_FRONTEND_CONFIG_T _arMtkFeCfgTable[] =
{
    // Frontend input path 0
	#ifndef CC_DMX_EXT_DEMOD
	{ TRUE, DMX_PINSET_INTERNAL, DMX_FRAMER_PARALLEL, DMX_EDGE_POSITIVE, DMX_SYNC_EXTERNAL},
	#else
	{ TRUE, DMX_PINSET_EXT1, DMX_FRAMER_SERIAL, DMX_EDGE_POSITIVE, DMX_SYNC_INTERNAL},
	#endif
    // Frontend input path 1
    { FALSE, DMX_PINSET_EXT2_0, DMX_FRAMER_PARALLEL, DMX_EDGE_POSITIVE, DMX_SYNC_INTERNAL},
    // PVR path
    { FALSE, DMX_PINSET_INTERNAL, DMX_FRAMER_SERIAL, DMX_EDGE_POSITIVE, DMX_SYNC_INTERNAL},
    // Frontend input path 2
    { FALSE, DMX_PINSET_EXT1, DMX_FRAMER_TWOBIT, DMX_EDGE_POSITIVE, DMX_SYNC_INTERNAL},
};

static const DMX_FRONTEND_CONFIG_T _arMtkFeExtCfgTable[] =
{
    // Frontend input path 0
    { TRUE, DMX_PINSET_EXT1, DMX_FRAMER_SERIAL, DMX_EDGE_POSITIVE, DMX_SYNC_INTERNAL},
    // Frontend input path 1
    { FALSE, DMX_PINSET_EXT2_1, DMX_FRAMER_SERIAL, DMX_EDGE_POSITIVE, DMX_SYNC_INTERNAL},
     // PVR path
    { FALSE, DMX_PINSET_INTERNAL, DMX_FRAMER_SERIAL, DMX_EDGE_POSITIVE, DMX_SYNC_INTERNAL},
    // Frontend input path 1
    { FALSE, DMX_PINSET_INTERNAL, DMX_FRAMER_PARALLEL, DMX_EDGE_POSITIVE, DMX_SYNC_INTERNAL},
};

static const DMX_FRONTEND_CONFIG_T _arMtkFeIntCfgTable[] =
{
    // Frontend input path 0
    { TRUE, DMX_PINSET_INTERNAL, DMX_FRAMER_PARALLEL, DMX_EDGE_POSITIVE, DMX_SYNC_EXTERNAL},
    // Frontend input path 1
    { FALSE, DMX_PINSET_INTERNAL, DMX_FRAMER_PARALLEL, DMX_EDGE_POSITIVE, DMX_SYNC_INTERNAL},
    // PVR path
    { FALSE, DMX_PINSET_INTERNAL, DMX_FRAMER_SERIAL, DMX_EDGE_POSITIVE, DMX_SYNC_INTERNAL},
    // Frontend input path 1
    { FALSE, DMX_PINSET_INTERNAL, DMX_FRAMER_PARALLEL, DMX_EDGE_POSITIVE, DMX_SYNC_INTERNAL},
};


#define DMX_FRONTEND_CONFIG_TABLE     (&_arMtkFeCfgTable)
#define DMX_FRONTEND_CONFIG_SIZE      (sizeof(_arMtkFeCfgTable)/sizeof(DMX_FRONTEND_CONFIG_T))

#define DMX_FRONTEND_EXT_CONFIG_TABLE (&_arMtkFeExtCfgTable)
#define DMX_FRONTEND_EXT_CONFIG_SIZE  (sizeof(_arMtkFeExtCfgTable)/sizeof(DMX_FRONTEND_CONFIG_T))

#define DMX_FRONTEND_INT_CONFIG_TABLE (&_arMtkFeIntCfgTable)
#define DMX_FRONTEND_INT_CONFIG_SIZE  (sizeof(_arMtkFeIntCfgTable)/sizeof(DMX_FRONTEND_CONFIG_T))

static const DMX_SCRAMBLE_CONFIG_T _rMtkDmxScrambleConfig =
{
    DMX_SCRAMBLE_PESSTART_ONLY,   // DMX_SCRAMBLE_TSFLAG_ONLY
    0,                            // If
};

#define DMX_SCRAMBLE_CONFIG_TABLE     (&_rMtkDmxScrambleConfig)

#endif /* MTK_DMX_H */
