/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
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 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
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 * modification, are permitted provided that the following conditions
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 *
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/* MediaTek Inc. (C) 2018. All rights reserved.
 *
 * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
 * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
 * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
 * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
 * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
 * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
 * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
 * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY
 * ACKNOWLEDGES
 * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL
 * PROPER LICENSES
 * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR
 * ANY MEDIATEK
 * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A
 * PARTICULAR
 * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
 * ENTIRE AND
 * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER
 * WILL BE,
 * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
 * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
 * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
 */

#ifndef __X_CM4_IF_H__
#define __X_CM4_IF_H__

#include "x_hal_5381.h"
#include "x_cm4_reg.h"

#define CM4_DEBUG_LOG

#define CM4_IRQ_ARG_0 CMSYS_REG_SHARE12
#define CM4_IRQ_ARG_1 CMSYS_REG_SHARE13
#define CM4_IRQ_ARG_2 CMSYS_REG_SHARE14
#define CM4_IRQ_ARG_3 CMSYS_REG_SHARE15
#define CM4_IRQ_ARG_NUM 4

#define CM4_IRQ_FIRE_TIMEOUT_STEP 500
#define CM4_IRQ_FIRE_TIMEOUT_ITER 100
#define CM4_IRQ_FIRE_TIMEOUT (CM4_IRQ_FIRE_TIMEOUT_STEP * CM4_IRQ_FIRE_TIMEOUT_ITER)
#define MAX_VAD_BUFFER_SIZE     (0x12000)

#define CM4_TAG "[CM4] "

#define CM4_LOG(str, ...) do { \
		LOG(0, CM4_TAG ": %s: " str, __func__,  ##__VA_ARGS__); \
	} while(0)

#ifdef CM4_DEBUG_LOG
#define CM4_DEBUG(str, ...) CM4_LOG(str, ##__VA_ARGS__)
#else
#define CM4_DEBUG(str, ...) do {} while(0)
#endif

#define CM4_swirq_fire(idx) \
	do { \
		if(idx > 2) { \
			CM4_LOG("ERROR: idx > 2\n"); \
			break; \
		} \
		vIO32Write4B(CMSYS_REG_EVENT_CTL, u4IO32Read4B(CMSYS_REG_EVENT_CTL) & ~CMSYS_BIT_EVENT_SWIRQ##idx); \
	} while(0)

#define CM4_swirq_clear(idx) \
	do { \
		if(idx > 2) { \
			CM4_LOG("ERROR: idx > 2\n"); \
			break; \
		} \
		vIO32Write4B(CMSYS_REG_IRQ_CTL, CMSYS_BIT_IRQ_SWIRQ##idx##_CLR); \
	} while(0)


struct CM4_irq_arg {
	UINT32 arg[CM4_IRQ_ARG_NUM];
};

enum CM4_irq_type {
	CM4_IRQ_NONE = 0,
	CM4_IRQ_SET_DSM, // PDWNC Deep Sleep Mode
	CM4_IRQ_SET_DMA_START,
	CM4_IRQ_SET_DMA_END,
	CM4_IRQ_SET_VD_ON,
	CM4_IRQ_SET_VQ_ON,
	CM4_IRQ_SET_BITWIDTH,
	CM4_IRQ_SET_STANDBY_MODE,
	CM4_IRQ_SET_BITSHIFT,
	/* CM4_IRQ_TYPE_NUM must be at the last type of irq_type */
	CM4_IRQ_TYPE_NUM,
	/* If we are ready to send irq to cm4, set this to arg0 */
	CM4_IRQ_READY = CM4_IRQ_TYPE_NUM + 1
};

VOID CM4_AP2CMSYS_irq_fire(struct CM4_irq_arg *arg);
VOID CM4_AP2CMSYS_irq_fire_sync(struct CM4_irq_arg *arg);
VOID CM4_if_init(VOID);
VOID CM4_CMSYS2AP_irq_clear(VOID);
VOID CM4_CMSYS_EVENT_irq_clear(VOID);
VOID CM4_apdma_enable(VOID);
VOID CM4_apdma_irq_clear(VOID);
VOID CM4_apdma_transfer(UPTR src, UPTR dst, UPTR size);
BOOL CM4_apdma_is_irq_clear(VOID);
BOOL CM4_apdma_is_enabled(VOID);
VOID CM4_SetDmaBuffer(UINT32 u416BufferStr, UINT32 u4BufSize);
VOID MainToCm4Action(UINT32 u4ActionType, UINT32 IrqParameters);
void AUD_InitAlsaCaptureDramData(void);
int StartCm4DramDataDump(char* fileName);
void StopCm4DramDataDump(void);
VOID CM4_apdma_disable(VOID);
void Cm4SetVqEnable(BOOL fgEnable);
void Cm4SetStandbyModeEnable(BOOL fgEnable);
void Cm4SetVdStatus(BOOL fgEnable);
BOOL Cm4GetVdStatus(void);
void cm4_write_to_file(struct file *filep, const char *addr, UINT32 size);
void Cm4SetWakeupDump(BOOL fgEnable);
BOOL Cm4GetWakeupDump(void);
void Cm4SetBitShift(UINT32 u4BitShift);
VOID Cm4SetGaEnable(BOOL fgEnable);
BOOL Cm4GetGaStatus(void);
VOID CM4_pm_resume(VOID);
void Cm4GetDmaBufferInfo(UINT32 *pu4Addr);
#endif
