/*
 * This header provides constants for the memory power control
 * present in the RTS39xx SoC
 */

#ifndef _RTS_SYSMEM_H
#define _RTS_SYSMEM_H

#define SYS_ISP_MEM		0
#define SYS_VIDEO_MEM		1
#define SYS_MEM_SD_NAND_SPIC	2
#define SYS_MEM_SD_ETH		3
#define SYS_MEM_SD_CIPHER	4
#define SYS_MEM_SD_AUDIO	5
#define SYS_MEM_SD_H264		6
#define SYS_MEM_SD_H265		7
#define SYS_MEM_SD_U2DEV	8
#define SYS_MEM_SD_SDIO0	9
#define SYS_MEM_SD_SDIO1	10
#define SYS_MEM_SD_GE		11
#define SYS_MEM_SD_RSA		12
#define SYS_MEM_SD_LCDC		13
#define SYS_MEM_SD_MIPITX	14
#define SYS_MEM_SD_JPEG		15
#define SYS_MEM_SD_NN		16
#define SYS_MEM_MAX		17

#endif
