/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/

/*-----------------------------------------------------------------------------
 *
 * $Author$
 * $Date$
 * $RCSfile: drvcust_if.h,v $
 * $Revision$
 *
 *---------------------------------------------------------------------------*/

/** @file drvcust_if.h
 *  Interface of driver customization parameter.
 */


#ifndef DRVCUST_IF_H
#define DRVCUST_IF_H

//-----------------------------------------------------------------------------
// Include files
//-----------------------------------------------------------------------------

#include "x_typedef.h"
#include "x_lint.h"
#include "x_printf.h"
#include "x_util.h"
#include "x_ckgen.h"
#include "../fbm8290/fbm_pool_config.h"

/*----------------------------------------------Platform Option(2k15) start----------------------------------------------------------------------*/

typedef BOOL (* PFN_USR_CCIR_GET_STATUS)(void);
typedef void (* PFN_USR_CCIR_SET_STATUS)(BOOL bBypass);

#ifdef CC_PHP_SUPPORT
extern UINT16 DRVCUST_NVMOptionCodeCheck(UINT32 u4OpAddr,UINT16 u2Mask);
extern UINT8 u1IsUhdDD;
//#define OP_DEBUG 1  /*OP code debug LOG*/
#define OP_COUNT 0x0a
#define OP_BASE (0x3a0)
#define OP1 (OP_BASE) //(0x3a0)
#define OP2 (OP_BASE + 0x2)  	//(0x3a2)
#define OP3 (OP_BASE + 0x4)  	//(0x3a4)
#define OP4 (OP_BASE + 0x6)  	//(0x3a6)
#define OP5 (OP_BASE + 0x8)  	//(0x3a8)
#define OP6 (OP_BASE + 0xa) 	//(0x3aa)
#define OP7 (OP_BASE + 0xc) 	//(0x3ac)
#define OP8 (OP_BASE + 0xe) 	//(0x3ae)
#define OP9 (OP_BASE + 0x10) 	//(0x3b0)
typedef struct
{
	UINT8 rOP1_3D;
	UINT8 rOP4_FLIP_MIRROR;
	UINT8 rOP5_PRODUCT_TYPE;
	UINT8 rOP6_DISPLAY ;
	UINT8 rOP7_CHANNEL_DECODER;
	UINT8 rOP2_UHD ;
	UINT8 rOP5_FRC ;
	UINT8 rOP7_TCONTYPE;
	UINT8 rOP6_PANELFREQUENCY;
	UINT8 rOP6_DNM ;
	UINT8 rOP2_ISF;
	UINT8 rOP2_BACKENDPQ;
	UINT8 rOP5_SOCTYPE;
}rOption_code_state;
extern rOption_code_state rOPCodeState;
	//option code
	/*** mark all because use below items means to read nvm, cause system crash ***/
	#define OP1_3D 					(rOPCodeState.rOP1_3D)
	#define OP4_FLIP_MIRROR 		(DRVCUST_NVMOptionCodeCheck(OP4,0x0003)>>0)  	/*OP4 0~1*/
	#define OP5_PRODUCT_TYPE 		(rOPCodeState.rOP5_PRODUCT_TYPE)
	#define OP6_DISPLAY   			(DRVCUST_NVMOptionCodeCheck(OP6,0x00ff)>>0)   	/*OP6 0~7*/
	#define OP7_CHANNEL_DECODER   	(rOPCodeState.rOP7_CHANNEL_DECODER)  	/*OP7 12~15*/
	#define OP2_UHD					(rOPCodeState.rOP2_UHD)				/*OP2 5~5*/
	#define OP5_FRC 				(rOPCodeState.rOP5_FRC)				/*OP5 8~9*/
	#define OP7_TCONTYPE 			(rOPCodeState.rOP7_TCONTYPE)			/*OP7 7~9*/
	#define OP6_PANELFREQUENCY 		(rOPCodeState.rOP6_PANELFREQUENCY)	/*OP6 12~12*/
	#define OP6_DNM					(rOPCodeState.rOP6_DNM)				/*OP6 8~9*/
	#define OP2_ISF 				(rOPCodeState.rOP2_ISF)				/*OP2 0~0*/
	#define OP2_BACKENDPQ 			(rOPCodeState.rOP2_BACKENDPQ)			/*OP2 6~6*/
	//#define OP5_SOCTYPE 			(rOPCodeState.rOP5_SOCTYPE)			/*OP5 6~7*/	 removed in v1.2 option code

enum
{
	OUTPUT_3D_TYPE_2D,
	OUTPUT_3D_TYPE_3D_PR,//50/60/100/120 LI
	OUTPUT_3D_TYPE_3D_FS,//96/100/120 FS
	OUTPUT_3D_TYPE_3D_ACTIVE_HALF_FS, //fixed 120hz 1920*540 FS, tcon convert to full FS
	OUTPUT_3D_TYPE_3D_ACTIVE_LI,//fixed 60hz LI	, tcon convert 120hz FS
	OUTPUT_3D_TYPE_MAX,
};
enum
{
	MVL_BG2DTV,
	MTK5593UPLUS,
	MTK5593T,
	MTK5593H,
	MTK5593F,
	BOMT5593UPLUS,
	MVL_UHD_Box_BG2DTV,
	ProductType_HTV,
	ProductType_MAX,
};
enum
{
	FRC_NONE=0,
	NT72324,
	NT72333,
	Morning_STAR,
	FRC_MAX,
};
enum
{
	TCON_NORMAL=0,
	LHRH_TCON,
	LBRB_TCON,
	INX8903,
	INX8922,
	INX_FHD_TCON,
	AUO_UHD_50_TCON,
	INX_8905_TCON,
	TCON_TYPE_MAX,
};
enum
{
	FHD=0,
	UHD,
	PANEL_UFHD_MAX,
};
enum
{
	PANEL_FRAMERATE_50HZ=0,
	PANEL_FRAMERATE_100HZ,
	PANEL_FRAMERATE_MAX,
};
enum
{
	MODELTYPE_NT324_EU8K9K=0,
	MODELTYPE_NT333_LT7K_PR,
	MODELTYPE_NT333_LT7K_SG_INX_8903,
	MODELTYPE_NT333_LT7K_SG_INX_8922,
	MODELTYPE_NT333_LT7K_SG_AUO,
	MODELTYPE_5593T_AUO,
	MODELTYPE_5593T_INX_8903,
	MODELTYPE_5593T_INX_8922,
	MODELTYPE_5593H_100HZ,
	MODELTYPE_5593H_50HZ,
	MODELTYPE_5593F,
	MODELTYPE_MAX,
};

//U+ not support mjc because video&OSD seperate output
//NT333 disable mjc
//5593F no mjc
//others' mjc is on decide by DNM
#define DRVCUST_GetMJCSupport\
	((((OP5_PRODUCT_TYPE==MTK5593UPLUS)||(OP5_PRODUCT_TYPE==BOMT5593UPLUS))&&(OP5_FRC==NT72324)&&(OP2_UHD==UHD))\
	?0:(((OP5_PRODUCT_TYPE==MTK5593T)&&(OP5_FRC==NT72333))||(OP5_PRODUCT_TYPE==MTK5593F)\
	?0:(((OP6_DNM>>1)&0x01)||(OP6_DNM&0x01))))
#endif
/*----------------------------------------------Platform Option(2k15) end----------------------------------------------------------------------*/


//-----------------------------------------------------------------------------
// Constant config
//-----------------------------------------------------------------------------
#define FBM_MEM_CFG_MT5387_VERF             (0x5600000)
/*
formula:
support 10bit and UFO
(Ref+dec+lock)*W*H*1.25*1.5 + (Ref+dec)*W*H*1.25/4 + (Ysize/256 + CSize/256)*(6+1+2)
ex.
(4096*2304)*1.5*1.25*(6+2+1) + (4096*2304)*1.25*(6+1)/4 + ((4096*2304*1.25)/256 + (4096*2304*1.25)/512)*9  ~= 0xAC27E00 = 172M
C Total size:
  (4096*2304)*0.5*1.25*9 +( ((4096*2304)*0.5)/512)*9 = 0x32B4400 = 50M
MPEG and MPEG2 average distribution,so
MPEG CSize= MPEG2 Size = 0x195A200 ~= 0x1C80000
Y And MV
(4096*2304)*1*1.25*(6+2+1) + (4096*2304)*1.25*(6+1)/4 + ((4096*2304*1.25)/256)*9 = 0x7955400 = 121M
MPEG and MPEG2 average distribution,so
MPEG YSize= MPEG2 YSize = 0x3CAAA00 ~= 0x3D80000 = 61.5M
other method:
(4096*2304)*1*1.25*6 +  ((4096*2304*1.25)/256)*6 ~=68M
(4096*2304)*1*1.25*3 +  ((4096*2304*1.25)/256)*3 ~=34M +5M(MV) ~= 39M

(4096*2304)*1.25*(6+1)/16 = 0x13B0000/4 ~= 20M/4 = 5M

======================================================================
VP9 10bit and UFO
Y C MV cabac misc total size
1:Y + C including 10bit + UFO
(4096*2304)*1.5*1.25*(11) + ((4096*2304*1.25)/256 + (4096*2304*1.25)/512)*11=0xBA59A00 ~= 187M
MV Size = (1024 * 1024 * 3 / 2) * 2 = 3M
misc size = (0x49000) = 292K
cabac 5M  --subtract it
total size = ~191M
C Total size:
(4096*2304)*0.5*1.25*11 +( ((4096*2304)*0.5)/512)*11 = 0x3DF8C00 ~= 62M
MPEG CSize= MPEG2 Size = 0x1EFC600 ~= 0x1EFE000(8K align) ~= 0x1FFE000 =32M
other method
 MPEG_C 6FB /MPEG2_C 5FB
 (4096*2304)*0.5*1.25*6 +( ((4096*2304)*0.5)/512)*6= 0x21CD800 ~= 0x21DA000(8K align) ~=33.8M~=34M=0x2200000
 (4096*2304)*0.5*1.25*5 +( ((4096*2304)*0.5)/512)*5= 0x1C2B400 ~= 0x1C36000(8K align) ~=28.1M~=29M=0x1D00000
Y And MV misc
(4096*2304)*1*1.25*(11) + ((4096*2304*1.25)/256)*11 + 3*1024*1024 = 0x7F3BC00 ~=0x7F3C000 ~=128M
MPEG and MPEG2 average distribution,so
MPEG YSize= MPEG2 YSize = 0x3F9E000 +1M ~= 0x409E000 = 65M
or the other method:
MPEG 6FB and MPEG2 5FB
(4096*2304)*1*1.25*(6) + ((4096*2304*1.25)/256)*6=0x43C3800 ~=0x43D0000(8k align) ~=67.8M~=68M = 0x4400000
(4096*2304)*1*1.25*(5) + ((4096*2304*1.25)/256)*5=0x3878400  ~=0x3884000(8K align) ~=56.5M+3M(MV)~=60M=0x3C00000
===========================================================================

*/
//#define FBM_SUPPORT_4K_IMGRZ_SEAMLESS
#define FBM_SUPPORT_4K_NPTV_SEAMLESS
#define FBM_4K_MPEG_Y_SIZE  (0x4400000)
#define FBM_4K_MPEG_Y2_SIZE (0x3C00000)
#define FBM_4K_MPEG_Y3_SIZE (0x4400000)
#define FBM_4K_MPEG_Y4_SIZE (0x3C00000)

#define FBM_4K_MPEG_C_SIZE  (0x2200000)
#define FBM_4K_MPEG_C2_SIZE (0x1D00000)
#define FBM_4K_MPEG_C3_SIZE (0x2200000)
#define FBM_4K_MPEG_C4_SIZE (0x1D00000)

#if defined( FBM_SUPPORT_4K_IMGRZ_SEAMLESS) && defined(FBM_SUPPORT_4K_NPTV_SEAMLESS) && !defined (CC_FBM_4K_SEAMLESS_NOT_SUPPORT)
#define FBM_4K_SEAML_SIZE  (0x1B04000)   //0x1B00000(4k seamless:2FB)+0x300000(imgrz temp buffer 1FB In MPEG other 1FB in MPEG2)=0x1E00000
                                         //0x1B00000(4k seamless:2FB) + (2*8K addr align) = 1B04000
#define FBM_4K_SEAML_C_SIZE (0x5A8000)   // 1FB C Size (nptv seamless c size)   //0x5A8000
#elif defined(FBM_SUPPORT_4K_IMGRZ_SEAMLESS) && !defined (CC_FBM_4K_SEAMLESS_NOT_SUPPORT)
#define FBM_4K_SEAML_SIZE  (0x1B04000)
#define FBM_4K_SEAML_C_SIZE (0x0)
#elif defined(FBM_SUPPORT_4K_NPTV_SEAMLESS) && !defined (CC_FBM_4K_SEAMLESS_NOT_SUPPORT)
#define FBM_4K_SEAML_SIZE  (0x280000)
#define FBM_4K_SEAML_C_SIZE (0x140000)
#else
#define FBM_4K_SEAML_SIZE  (0x0)
#define FBM_4K_SEAML_C_SIZE (0x0)
#endif
#if defined(DIVX_PLUS_CER) || defined(CC_NETFLIX_CE3_SUPPORT) || defined(CC_ENABLE_SEAMLESS_FOR_2D) || defined (CC_FBM_SUPPORT_FHD_SEAMLESS)
#define FBM_2K_MPEG_Y_SIZE  (0x3400000) //  0x2280000(Y) + 0xf00000(C) = 0x3180000  + 0x280000(Cabc)=0x3400000
//#define FBM_2K_MPEG_Y_SIZE  (0x3e00000) // sony oryx
#define FBM_2K_SEAML_SIZE (0x900000) //0x600000(seamless 2FB) + 0x300000(imgrz temp buffer 1FB ) = 0x900000
#else
#define FBM_2K_MPEG_Y_SIZE  (0x3400000) // 0x2280000(Y) + 0xf00000(C) = 0x3180000 + 0x280000(Cabc) = 0x3400000
#define FBM_2K_SEAML_SIZE (0)
#endif
#define FBM_2K_MPEG_C_SIZE  (0)
#if defined(CC_FBM_SUPPORT_4K2K)
#define FBM_MPEG_Y_SIZE  (FBM_4K_MPEG_Y_SIZE)
#define FBM_MPEG_C_SIZE (FBM_4K_MPEG_C_SIZE)
#define FBM_MPEG_Y2_SIZE  (FBM_4K_MPEG_Y2_SIZE)
#define FBM_MPEG_C2_SIZE (FBM_4K_MPEG_C2_SIZE)
#define FBM_MPEG_Y3_SIZE  (FBM_4K_MPEG_Y3_SIZE)
#define FBM_MPEG_C3_SIZE (FBM_4K_MPEG_C3_SIZE)
#define FBM_MPEG_Y4_SIZE  (FBM_4K_MPEG_Y4_SIZE)
#define FBM_MPEG_C4_SIZE (FBM_4K_MPEG_C4_SIZE)
#define FBM_SEAML_SIZE (FBM_4K_SEAML_SIZE)
#define FBM_SEAML_C_SIZE (FBM_4K_SEAML_C_SIZE)
#ifdef CC_FBM_US_REGION
#define FBM_LAX1_SIZE (0x2D00000)
#else
#define FBM_LAX1_SIZE (0x2400000)
#endif
#define FBM_LAX2_SIZE (0x0)//(0x2000000+0x400000)
#if defined(CC_FBM_TWO_4K2K)||defined(CC_FBM_FOUR_INST_SUPPORT)
#define FBM_LAX3_SIZE (0x2400000)
#define FBM_LAX4_SIZE (0x0)//(0x2000000+0x400000)
#else
#define FBM_LAX3_SIZE (0x0)
#define FBM_LAX4_SIZE (0x0)//(0x2000000+0x400000)
#endif
#ifdef CC_FBM_US_REGION
#define FBM_LAX2_SHARE_SIZE 0x1680000
#else
#define FBM_LAX2_SHARE_SIZE 0x1200000
#endif
#define FBM_LAX4_SHARE_SIZE 0x1200000
#else
#define FBM_MPEG_Y_SIZE  (FBM_2K_MPEG_Y_SIZE)
#define FBM_MPEG_C_SIZE (FBM_2K_MPEG_C_SIZE)
#define FBM_MPEG_Y2_SIZE  (FBM_2K_MPEG_Y_SIZE)
#define FBM_MPEG_C2_SIZE (FBM_2K_MPEG_C_SIZE)
#define FBM_MPEG_Y3_SIZE  (FBM_2K_MPEG_Y_SIZE)
#define FBM_MPEG_C3_SIZE (FBM_2K_MPEG_C_SIZE)
#define FBM_MPEG_Y4_SIZE  (FBM_2K_MPEG_Y_SIZE)
#define FBM_MPEG_C4_SIZE (FBM_2K_MPEG_C_SIZE)
#define FBM_SEAML_SIZE (FBM_2K_SEAML_SIZE)
#define FBM_SEAML_C_SIZE (0x0)
#define FBM_LAX1_SIZE (0xc00000)
#define FBM_LAX2_SIZE (0xc00000)
#define FBM_LAX3_SIZE (0x0)
#define FBM_LAX4_SIZE (0x0)//(0x2000000+0x400000)
#endif

#if defined(CC_FBM_TWO_4K2K)
#if defined(CC_SVP_SUPPORT)
#define FBM_DMX1_SIZE   (0)
#define FBM_DMX2_SIZE   (0)
#define TZ_DMX1_SIZE   (0x2300000)
#define TZ_DMX2_SIZE   (0x2300000)
#else
#define FBM_DMX1_SIZE   (0x2300000)
#define FBM_DMX2_SIZE   (0x2300000)
#endif
#if defined(CC_SUPPORT_DOLBY_VISION)  //dolby shrink dmx3/4
#define FBM_DMX3_SIZE   (0x0)
#define FBM_DMX4_SIZE   (0x0)
#else
#define FBM_DMX3_SIZE   (0x2300000)
#define FBM_DMX4_SIZE   (0x500000)
#endif
#define FBM_MPEG_Y_POOL_SIZE   (FBM_MPEG_Y_SIZE + FBM_MPEG_Y2_SIZE +FBM_MPEG_Y3_SIZE + FBM_MPEG_Y4_SIZE)
#define FBM_MPEG_C_POOL_SIZE   (FBM_MPEG_C_SIZE + FBM_MPEG_C2_SIZE + FBM_MPEG_C3_SIZE + FBM_MPEG_C4_SIZE)
#if defined(CC_SUPPORT_DOLBY_VISION)  //dolby shrink seamless3/4
#define FBM_SEAML_POOL_SIZE   (FBM_SEAML_SIZE*2)
#define FBM_SEAML_C_POOL_SIZE   (FBM_SEAML_C_SIZE*2)
#else
#define FBM_SEAML_POOL_SIZE   (FBM_SEAML_SIZE*4)
#define FBM_SEAML_C_POOL_SIZE   (FBM_SEAML_C_SIZE*4)
#endif
#define FBM_FEEDER1_SIZE (FBM_FEEDER_4K_POOL_SIZE)
#define FBM_FEEDER2_SIZE (FBM_FEEDER_4K_POOL_SIZE)
#if defined(CC_SUPPORT_DOLBY_VISION)  //dolby shrink feeder3/4
#define FBM_FEEDER3_SIZE (0x0)
#define FBM_FEEDER4_SIZE (0x0)
#else
#define FBM_FEEDER3_SIZE (FBM_FEEDER_4K_POOL_SIZE)
#define FBM_FEEDER4_SIZE (FBM_FEEDER_POOL_SIZE)
#endif
#elif defined(CC_FBM_FOUR_INST_SUPPORT)
#if defined(CC_SVP_SUPPORT)
#define FBM_DMX1_SIZE   (0)
#define FBM_DMX2_SIZE   (0)
#if defined(CC_FBM_SUPPORT_4K2K)
#define TZ_DMX1_SIZE   (0x1400000)
#else
#define TZ_DMX1_SIZE   (0x500000)
#endif
#define TZ_DMX2_SIZE   (0x1400000)
#else
#if defined(CC_FBM_SUPPORT_4K2K)
#define FBM_DMX1_SIZE   (0x1400000)//(0x2300000)
#else
#define FBM_DMX1_SIZE   (0x500000)
#endif
#define FBM_DMX2_SIZE   (0x1400000)//((0x500000)
#endif
#define FBM_DMX3_SIZE   (0x500000)
#define FBM_DMX4_SIZE   (0x500000)
#define FBM_MPEG_Y_POOL_SIZE   (FBM_MPEG_Y_SIZE + FBM_MPEG_Y2_SIZE +FBM_MPEG_Y3_SIZE + FBM_MPEG_Y4_SIZE)
#define FBM_MPEG_C_POOL_SIZE   (FBM_MPEG_C_SIZE + FBM_MPEG_C2_SIZE + FBM_MPEG_C3_SIZE + FBM_MPEG_C4_SIZE)
#define FBM_SEAML_POOL_SIZE   (FBM_SEAML_SIZE*4)
#define FBM_SEAML_C_POOL_SIZE   (FBM_SEAML_C_SIZE*4)
#if defined(CC_FBM_SUPPORT_4K2K)||defined(CC_FBM_SUPPORT_AMAZON_APP)
#define FBM_FEEDER1_SIZE (FBM_FEEDER_4K_POOL_SIZE)
#else
#define FBM_FEEDER1_SIZE (FBM_FEEDER_POOL_SIZE)
#endif
#define FBM_FEEDER2_SIZE (FBM_FEEDER_POOL_SIZE)
#define FBM_FEEDER3_SIZE (FBM_FEEDER_POOL_SIZE)
#define FBM_FEEDER4_SIZE (FBM_FEEDER_POOL_SIZE)
#elif defined(CC_FBM_SUPPORT_4K2K)
#if defined(CC_SVP_SUPPORT)
#define FBM_DMX1_SIZE   (0)
#define FBM_DMX2_SIZE   (0)
#define TZ_DMX1_SIZE   (0x1400000)
#if defined(CC_FBM_TWO_FBP)
#define TZ_DMX2_SIZE   (0x1400000)
#else
#define TZ_DMX2_SIZE   (0)
#endif
#else
#define FBM_DMX1_SIZE   (0x1400000)//(0x2300000)
#if defined(CC_FBM_TWO_FBP)
#define FBM_DMX2_SIZE   (0x1400000)//(0x500000)
#else
#define FBM_DMX2_SIZE   (0)
#endif
#endif
#define FBM_DMX3_SIZE   (0)
#define FBM_DMX4_SIZE   (0)
#define FBM_MPEG_Y_POOL_SIZE   (FBM_MPEG_Y_SIZE + FBM_MPEG_Y2_SIZE)
#define FBM_MPEG_C_POOL_SIZE   (FBM_MPEG_C_SIZE + FBM_MPEG_C2_SIZE)
#define FBM_SEAML_POOL_SIZE   (FBM_SEAML_SIZE*2)
#define FBM_SEAML_C_POOL_SIZE   (FBM_SEAML_C_SIZE*2)
#define FBM_FEEDER1_SIZE (FBM_FEEDER_4K_POOL_SIZE)
#if defined(CC_FBM_TWO_FBP)
#define FBM_FEEDER2_SIZE (FBM_FEEDER_4K_POOL_SIZE)
#else
#define FBM_FEEDER2_SIZE (0)
#endif
#define FBM_FEEDER3_SIZE (0)
#define FBM_FEEDER4_SIZE (0)
#elif defined(CC_FBM_TWO_FBP)
#if defined(CC_SVP_SUPPORT)
#define FBM_DMX1_SIZE   (0)
#define FBM_DMX2_SIZE   (0)
#if defined(CC_FBM_ADD_VFIFO_SIZE)|| defined(CC_SSIF_SUPPORT)
#define TZ_DMX1_SIZE   (0xa00000)
#else
#define TZ_DMX1_SIZE   (0x500000)
#endif
#define TZ_DMX2_SIZE   (0x500000)
#else
#if defined(CC_FBM_ADD_VFIFO_SIZE)|| defined(CC_SSIF_SUPPORT)
#define FBM_DMX1_SIZE   (0xa00000)
#else
#define FBM_DMX1_SIZE   (0x500000)
#endif
#define FBM_DMX2_SIZE   (0x500000)
#endif
#define FBM_DMX3_SIZE   (0)
#define FBM_DMX4_SIZE   (0)
#define FBM_MPEG_Y_POOL_SIZE   (FBM_MPEG_Y_SIZE + FBM_MPEG_Y2_SIZE)
#define FBM_MPEG_C_POOL_SIZE   (FBM_MPEG_C_SIZE + FBM_MPEG_C2_SIZE)
#define FBM_SEAML_POOL_SIZE   (FBM_SEAML_SIZE*2)
#define FBM_SEAML_C_POOL_SIZE   (FBM_SEAML_C_SIZE*2)
#if defined(CC_FBM_SUPPORT_AMAZON_APP)
#define FBM_FEEDER1_SIZE (FBM_FEEDER_4K_POOL_SIZE)
#else
#define FBM_FEEDER1_SIZE (FBM_FEEDER_POOL_SIZE)
#endif
#define FBM_FEEDER2_SIZE (FBM_FEEDER_POOL_SIZE)
#define FBM_FEEDER3_SIZE (0)
#define FBM_FEEDER4_SIZE (0)
#else
#if defined(CC_FBM_ADD_VFIFO_SIZE)|| defined(CC_SSIF_SUPPORT)
#define FBM_DMX1_SIZE   (0xa00000)
#else
#define FBM_DMX1_SIZE   (0x500000)
#endif
#if defined(CC_SVP_SUPPORT)
#define TZ_DMX1_SIZE   (0xa00000)
#define TZ_DMX2_SIZE   (0x500000)
#endif

#define FBM_DMX2_SIZE   (0)
#define FBM_DMX3_SIZE   (0)
#define FBM_DMX4_SIZE   (0)
#define FBM_MPEG_Y_POOL_SIZE   (FBM_MPEG_Y_SIZE)
#define FBM_MPEG_C_POOL_SIZE   (FBM_MPEG_C_SIZE)
#define FBM_SEAML_POOL_SIZE   (FBM_SEAML_SIZE)
#define FBM_SEAML_C_POOL_SIZE   (FBM_SEAML_C_SIZE)
#if defined(CC_FBM_SUPPORT_AMAZON_APP)
#define FBM_FEEDER1_SIZE (FBM_FEEDER_4K_POOL_SIZE)
#else
#define FBM_FEEDER1_SIZE (FBM_FEEDER_POOL_SIZE)
#endif
#define FBM_FEEDER2_SIZE (0)
#define FBM_FEEDER3_SIZE (0)
#define FBM_FEEDER4_SIZE (0)
#endif
#if defined(CC_SVP_SUPPORT)
#define FBM_DMX1_4K_SIZE (0)
#define FBM_DMX2_4K_SIZE (0)
#define FBM_DMX3_4K_SIZE (0)
#else
#define FBM_DMX1_4K_SIZE (0x2300000)
#define FBM_DMX2_4K_SIZE (0x2300000)
#define FBM_DMX3_4K_SIZE (0)
#endif
#define FBM_MPEG1_4K_Y_SIZE (FBM_4K_MPEG_Y_SIZE)
#define FBM_MPEG2_4K_Y_SIZE (FBM_4K_MPEG_Y2_SIZE)
#define FBM_MPEG3_4K_Y_SIZE (0)
#define FBM_MPEG4_4K_Y_SIZE (0)
#define FBM_SEAML1_4K_SIZE (FBM_4K_SEAML_SIZE)
#define FBM_SEAML2_4K_SIZE (FBM_4K_SEAML_SIZE)
#define FBM_SEAML3_4K_SIZE (0)
#define FBM_SEAML4_4K_SIZE (0)
#define FBM_SEAML1_C_4K_SIZE (FBM_4K_SEAML_C_SIZE)
#define FBM_SEAML2_C_4K_SIZE (FBM_4K_SEAML_C_SIZE)
#define FBM_SEAML3_C_4K_SIZE (0)
#define FBM_SEAML4_C_4K_SIZE (0)
#define FBM_MPEG1_4K_C_SIZE (FBM_4K_MPEG_C_SIZE)
#define FBM_MPEG2_4K_C_SIZE (FBM_4K_MPEG_C2_SIZE)
#define FBM_MPEG3_4K_C_SIZE (0)
#define FBM_MPEG4_4K_C_SIZE (0)

#if defined(CC_FBM_ADD_VFIFO_SIZE)|| defined(CC_SSIF_SUPPORT)
#define FBM_DMX1_2K_SIZE (0xa00000)
#else
#define FBM_DMX1_2K_SIZE (0x500000)
#endif
#define FBM_DMX2_2K_SIZE (0x500000)
#define FBM_FEEDER1_4K_SIZE  (FBM_FEEDER_4K_POOL_SIZE)
#define FBM_FEEDER2_4K_SIZE  (FBM_FEEDER_4K_POOL_SIZE)
#define FBM_FEEDER1_2K_SIZE  (FBM_FEEDER_POOL_SIZE)
#define FBM_FEEDER2_2K_SIZE  (FBM_FEEDER_POOL_SIZE)

#define FBM_MPEG1_2K_Y_SIZE  FBM_2K_MPEG_Y_SIZE
#define FBM_MPEG2_2K_Y_SIZE  FBM_2K_MPEG_Y_SIZE
#define FBM_SEAML1_2K_SIZE  FBM_2K_SEAML_SIZE
#define FBM_SEAML2_2K_SIZE  FBM_2K_SEAML_SIZE


#define FBM_MPEG1_2K_C_SIZE  (0x1380000)
#define FBM_MPEG2_2K_C_SIZE  (0x1380000)

#if defined(CC_SUPPORT_4K2K)
#if !defined(CC_SVP_SUPPORT)
	#define FBM_DMX_SIZE_TZ            0
	#define FBM_DMX2_SIZE_TZ           0
#else
	#define FBM_DMX_SIZE_TZ           (TZ_DMX1_SIZE)
	#if defined(CC_FBM_TWO_FBP)
		#define FBM_DMX2_SIZE_TZ      (TZ_DMX2_SIZE)
	#else
		#define FBM_DMX2_SIZE_TZ           0
	#endif
#endif
#endif

#if defined(CC_FBM_SUPPORT_4K2K)
#if defined(CC_MT5891_LINUX_SHRINK)
#define FBM_SCPOS_MAIN_SIZE   (0x3f00000)
#else
#if defined(CC_SUPPORT_TECHNICOLOR_HDR_IDK)
#define FBM_SCPOS_MAIN_SIZE   (0x5E00000)
#else
#define FBM_SCPOS_MAIN_SIZE   (0x5900000)
#endif

#endif
#define FBM_SCPOS_SUB_SIZE   (0x1600000)
#else
#define FBM_SCPOS_MAIN_SIZE   (0x2000000)
#define FBM_SCPOS_SUB_SIZE   (0xb00000)
#endif

#define FBM_SCPOS_MAIN_4K_SIZE   (0x4000000)
#define FBM_SCPOS_SUB_4K_SIZE   (0x1600000)
#define FBM_SCPOS_MAIN_2K_SIZE   (0x1700000)
#define FBM_SCPOS_SUB_2K_SIZE   (0x1600000)


#if defined(CC_FBM_SECURE_FEEDER)
#define FBM_SECURE_FEEDER_4K_SIZE   (0x1000000)
#define FBM_SECURE_FEEDER_2K_SIZE   (0x400000)
#if defined(CC_FBM_SUPPORT_4K2K)
#define FBM_SECURE_FEEDER_SIZE   (FBM_SECURE_FEEDER_4K_SIZE)
#else
#define FBM_SECURE_FEEDER_SIZE   (FBM_SECURE_FEEDER_2K_SIZE)
#endif
#else
#define FBM_SECURE_FEEDER_4K_SIZE   (0)
#define FBM_SECURE_FEEDER_2K_SIZE   (0)
#define FBM_SECURE_FEEDER_SIZE   (0)
#endif


#if defined(CC_SUPPORT_W2DR2R)
#define FBM_W2DR2R_POOL_SIZE   (0x4800000)
#define FBM_W2DR2R_POOL_CHA_SIZE   (0x2400000)
#define FBM_W2DR2R_POOL_Y_SIZE   (0x2400000)
#define FBM_W2DR2R_POOL_2K_SIZE   (0x2400000)
#define FBM_W2DR2R_POOL_2K_Y_SIZE   (0)
#else
#define FBM_W2DR2R_POOL_SIZE   (0)
#define FBM_W2DR2R_POOL_CHA_SIZE   (0)
#define FBM_W2DR2R_POOL_Y_SIZE   (0)
#define FBM_W2DR2R_POOL_2K_SIZE   (0)
#define FBM_W2DR2R_POOL_2K_Y_SIZE   (0)
#endif

// 4096*2160/12*16*4/2 = 22.5MB
#if defined(CC_SUPPORT_W2DR2R)
#define FBM_W2DR2R_V2_POOL_SIZE (0x1680000)
#define FBM_W2DR2R_POOL_V2_Y_SIZE (0x1680000)
#define FBM_W2DR2R_POOL_V2_CR_SIZE (0x1680000)
#else
#define FBM_W2DR2R_V2_POOL_SIZE (0x0)
#define FBM_W2DR2R_POOL_V2_Y_SIZE (0x0)
#define FBM_W2DR2R_POOL_V2_CR_SIZE (0x0)
#endif

#if defined(CC_SUPPORT_W2DR2R)
#define FBM_W2DR2R_V2_TOTAL_SIZE (FBM_W2DR2R_V2_POOL_SIZE+FBM_W2DR2R_POOL_V2_Y_SIZE+FBM_W2DR2R_POOL_V2_CR_SIZE)
#else
#define FBM_W2DR2R_V2_TOTAL_SIZE (0)
#endif

#if defined(CC_FBM_SUPPORT_SRS)
#define FBM_SRS_SIZE   (0x200000)
#else
#define FBM_SRS_SIZE   (0)
#endif

#ifdef CC_S_PLATFORM
#if defined(CC_FBM_SUPPORT_BEIC)
#define FBM_BEIC_BUF_SIZE    (0x5E00000) //16*4 + 30 = 94
#else
#define FBM_BEIC_BUF_SIZE    (0x0)
#endif
#else
#define FBM_BEIC_BUF_SIZE    (0x0)
#endif

#if defined(CC_SUPPORT_CIPLUS14)
#define FBM_REMUX_SIZE   (0x500000)
#else
#define FBM_REMUX_SIZE   (0)
#endif

#ifdef CC_FBM_HW_DEMOD
#define FBM_HW_DEMOD_SIZE 0x500000
#else
#define FBM_HW_DEMOD_SIZE 0
#endif
#if defined(CC_FBM_SUPPORT_GFX)
#define FBM_GFX_SIZE 0x1000000
#else
#define FBM_GFX_SIZE 0
#endif

#if defined(__MODEL_slt__)
#define FBM_SLT_GFX_POOL_SIZE          0x100000
#else
#define FBM_SLT_GFX_POOL_SIZE          0x0
#endif

#if !defined(CC_FBM_FB_IN_CHANNELB)
#define FBM_MTFB_SIZE 0x0
#endif

#if !defined(CC_FBM_DFB_IN_CHANNELC)
#define FBM_MTDFB_SIZE 0x0
#endif

//share memory layout in fbm pool======
#define FBM_SHMEWS_SIZE          (0x6400) //25KB
#define FBM_SHMTSRQUE_SIZE       (0x200000) //2MB
#define FBM_SHMISDBCC_SIZE       (0x7D000) //500KB
#define FBM_SHMSSMA_SIZE         (0x10000) //64KB
#define FBM_SHMVBIF_SIZE         (0x1800) //6KB
#define FBM_SHMATVTS_SIZE         (0x100000) //1MB
#if defined(SYS_MUXER_SUPPORT)
#define FBM_SHMMUXER_SIZE         (0x900000) //9MB
#else
#define FBM_SHMMUXER_SIZE         (0x0) //
#endif
#ifdef CC_S_PLATFORM
#define FBM_THUMBNAIL_SIZE         (0x80000) //512KB
#else
#define FBM_THUMBNAIL_SIZE         (0x20000) //128KB
#endif
#define FBM_SOUNDCLIP_SIZE         (0xB0000) //

#define UART_DMA_SIZE              (0x200000)

#define FBM_FILM_GRAIN_POOL_SIZE (0x40000) // 256k

#define FBM_SHM_TOTAL_SIZE         (FBM_SHMEWS_SIZE+FBM_SHMTSRQUE_SIZE+FBM_SHMISDBCC_SIZE+FBM_SHMSSMA_SIZE+FBM_SHMVBIF_SIZE+FBM_SHMATVTS_SIZE+FBM_SHMMUXER_SIZE+FBM_THUMBNAIL_SIZE+FBM_SOUNDCLIP_SIZE) //
//=====================================
#define FBM_SIZE_FORMULAR_MT5895(x)    ((x  + FBM_TVE_SIZE + FBM_DTCPIP_SIZE  + FBM_SHM_TOTAL_SIZE + FBM_RAMOOPS_SIZE  + FBM_HW_DEMOD_SIZE  + FBM_VENC_POOL_SIZE + FBM_TDCAV_POOL_SIZE + FBM_PQ_3DC_POOL_SIZE  + FBM_DMX_PID_BUF_SIZE  + FBM_VSS_SIZE  + FBM_SCPOS_MAIN_SIZE + FBM_SCPOS_SUB_SIZE + FBM_DSP_SIZE + FBM_DSP_BIN_POOL_SIZE + FBM_SWDMX_SIZE  + FBM_FEEDER1_SIZE + FBM_FEEDER2_SIZE + FBM_FEEDER3_SIZE + FBM_FEEDER4_SIZE + FBM_DRM_BUF_SIZE + FBM_MPEG_Y_POOL_SIZE) + ( FBM_MTFB_SIZE + FBM_LAX1_SIZE + FBM_LAX2_SIZE  + FBM_LAX3_SIZE + FBM_LAX4_SIZE + FBM_GFX_SIZE + FBM_PQ_TOOL_POOL_SIZE + FBM_SECURE_FEEDER_SIZE +  FBM_OD_SIZE  + FBM_JPEVDP_POOL_SIZE + FBM_DMX1_SIZE + FBM_DMX2_SIZE+ FBM_DMX3_SIZE + FBM_DMX4_SIZE  + FBM_SEAML_POOL_SIZE  + FBM_SRS_SIZE) + (FBM_MTDFB_SIZE + FBM_POOL_MJCALL_SIZE + FBM_R2_TOTAL_SIZE + FBM_W2DR2R_V2_TOTAL_SIZE + FBM_JPEG_POOL_SIZE + FBM_PVR_SIZE + FBM_PNG_POOL_SIZE + FBM_MPEG_C_POOL_SIZE+FBM_SEAML_C_POOL_SIZE) + FBM_ATSC30ALP_SIZE + FBM_FD_POOL_SIZE + FBM_HDMI_SHM_SIZE + FBM_SOUND_MODEL_SIZE + FBM_FILM_GRAIN_POOL_SIZE)
#define FBM_SIZE_FORMULAR_MT5895_MJC(x)    ((x  + FBM_TVE_SIZE + FBM_DTCPIP_SIZE  + FBM_SHM_TOTAL_SIZE + FBM_RAMOOPS_SIZE  + FBM_HW_DEMOD_SIZE  + FBM_VENC_POOL_SIZE + FBM_TDCAV_POOL_SIZE + FBM_PQ_3DC_POOL_SIZE  + FBM_DMX_PID_BUF_SIZE  + FBM_VSS_SIZE  + FBM_SCPOS_MAIN_SIZE + FBM_SCPOS_SUB_SIZE + FBM_DSP_SIZE + FBM_DSP_BIN_POOL_SIZE + FBM_SWDMX_SIZE  + FBM_FEEDER1_SIZE + FBM_FEEDER2_SIZE + FBM_FEEDER3_SIZE + FBM_FEEDER4_SIZE + FBM_DRM_BUF_SIZE) + ( FBM_MTFB_SIZE + (FBM_MPEG_Y_SIZE + FBM_MPEG_Y2_SIZE + FBM_MPEG_C_SIZE + FBM_MPEG_C2_SIZE) + FBM_LAX1_SIZE + FBM_LAX2_SIZE + FBM_GFX_SIZE + FBM_PQ_TOOL_POOL_SIZE + FBM_SECURE_FEEDER_SIZE +  FBM_OD_SIZE  + FBM_JPEVDP_POOL_SIZE + FBM_DMX1_SIZE + FBM_DMX2_SIZE+ FBM_DMX3_SIZE + FBM_DMX4_SIZE  + FBM_SEAML_POOL_SIZE  + FBM_SRS_SIZE) + (FBM_MTDFB_SIZE + FBM_POOL_MJCALL_SIZE + FBM_R2_TOTAL_SIZE + FBM_W2DR2R_V2_TOTAL_SIZE + FBM_JPEG_POOL_SIZE + FBM_PVR_SIZE + FBM_PNG_POOL_SIZE + FBM_SEAML_C_POOL_SIZE) + FBM_ATSC30ALP_SIZE + FBM_FD_POOL_SIZE + FBM_HDMI_SHM_SIZE + FBM_SOUND_MODEL_SIZE + FBM_FILM_GRAIN_POOL_SIZE)
#define FBM_SIZE_FORMULAR_MT5895_NOMJC(x)    ((x  + FBM_TVE_SIZE + FBM_DTCPIP_SIZE  + FBM_SHM_TOTAL_SIZE + FBM_RAMOOPS_SIZE  + FBM_HW_DEMOD_SIZE  + FBM_VENC_POOL_SIZE + FBM_TDCAV_POOL_SIZE + FBM_PQ_3DC_POOL_SIZE  + FBM_DMX_PID_BUF_SIZE  + FBM_VSS_SIZE  + FBM_SCPOS_MAIN_SIZE + FBM_SCPOS_SUB_SIZE + FBM_DSP_SIZE + FBM_DSP_BIN_POOL_SIZE + FBM_SWDMX_SIZE  + FBM_FEEDER1_SIZE + FBM_FEEDER2_SIZE + FBM_FEEDER3_SIZE + FBM_FEEDER4_SIZE + FBM_DRM_BUF_SIZE + FBM_MPEG_Y_POOL_SIZE) + ( FBM_MTFB_SIZE + FBM_LAX1_SIZE + FBM_LAX2_SIZE  + FBM_LAX3_SIZE + FBM_LAX4_SIZE + FBM_GFX_SIZE + FBM_PQ_TOOL_POOL_SIZE + FBM_SECURE_FEEDER_SIZE +  FBM_OD_SIZE  + FBM_JPEVDP_POOL_SIZE + FBM_DMX1_SIZE + FBM_DMX2_SIZE+ FBM_DMX3_SIZE + FBM_DMX4_SIZE  + FBM_SEAML_POOL_SIZE  + FBM_SRS_SIZE) + (FBM_MTDFB_SIZE + FBM_W2DR2R_V2_TOTAL_SIZE + FBM_JPEG_POOL_SIZE + FBM_PVR_SIZE + FBM_PNG_POOL_SIZE + FBM_MPEG_C_POOL_SIZE+FBM_SEAML_C_POOL_SIZE) + FBM_ATSC30ALP_SIZE + FBM_FD_POOL_SIZE + FBM_HDMI_SHM_SIZE + FBM_SOUND_MODEL_SIZE + FBM_FILM_GRAIN_POOL_SIZE)

//=====================================
#if !defined(__MODEL_slt__)
#define FBM_SIZE_FORMULAR(x)    ((x  + FBM_TVE_SIZE + FBM_DTCPIP_SIZE  + FBM_SHM_TOTAL_SIZE + FBM_RAMOOPS_SIZE  + FBM_HW_DEMOD_SIZE  + FBM_VENC_POOL_SIZE + FBM_TDCAV_POOL_SIZE + FBM_PQ_3DC_POOL_SIZE  + FBM_DMX_PID_BUF_SIZE  + FBM_VSS_SIZE  + FBM_SCPOS_MAIN_SIZE + FBM_SCPOS_SUB_SIZE + FBM_DSP_SIZE + FBM_DSP_BIN_POOL_SIZE + FBM_SWDMX_SIZE  + FBM_FEEDER1_SIZE + FBM_FEEDER2_SIZE + FBM_FEEDER3_SIZE + FBM_FEEDER4_SIZE + FBM_DRM_BUF_SIZE + FBM_MPEG_Y_POOL_SIZE) + ( FBM_MTFB_SIZE + FBM_POOL_MJC1_SIZE + FBM_POOL_MJC2_SIZE + FBM_POOL_MJC3_SIZE + FBM_POOL_MJC1_C_SIZE + FBM_POOL_MJC2_C_SIZE + FBM_POOL_MJC3_C_SIZE + FBM_LAX1_SIZE + FBM_LAX2_SIZE  + FBM_LAX3_SIZE + FBM_LAX4_SIZE + FBM_GFX_SIZE + FBM_PQ_TOOL_POOL_SIZE + FBM_SECURE_FEEDER_SIZE +  FBM_OD_SIZE  + FBM_JPEVDP_POOL_SIZE + FBM_DMX1_SIZE + FBM_DMX2_SIZE+ FBM_DMX3_SIZE + FBM_DMX4_SIZE  + FBM_SEAML_POOL_SIZE  + FBM_W2DR2R_POOL_SIZE  + FBM_SRS_SIZE) + (FBM_MTDFB_SIZE + FBM_POOL_MJCMV_SIZE   + FBM_W2DR2R_POOL_Y_SIZE + FBM_JPEG_POOL_SIZE + FBM_PVR_SIZE + FBM_PNG_POOL_SIZE + FBM_MPEG_C_POOL_SIZE+FBM_SEAML_C_POOL_SIZE))
#define FBM_SIZE_FORMULAR_4KMAINONLY(x)  ((x + FBM_TVE_SIZE + FBM_SHM_TOTAL_SIZE + FBM_RAMOOPS_SIZE  + FBM_HW_DEMOD_SIZE  + FBM_VENC_POOL_SIZE + FBM_TDCAV_POOL_SIZE + FBM_PQ_3DC_POOL_SIZE  + FBM_DMX_PID_BUF_SIZE  + FBM_VSS_SIZE  + FBM_SCPOS_MAIN_SIZE + FBM_SCPOS_SUB_SIZE + FBM_DSP_SIZE + FBM_DSP_BIN_POOL_SIZE + FBM_SWDMX_SIZE  + FBM_FEEDER1_SIZE + FBM_DRM_BUF_SIZE + FBM_MPEG_Y_SIZE + FBM_MPEG_Y2_SIZE) + ( FBM_MTFB_SIZE + FBM_POOL_MJC1_SIZE + FBM_POOL_MJC2_SIZE + FBM_POOL_MJC3_SIZE + FBM_POOL_MJC1_C_SIZE + FBM_POOL_MJC2_C_SIZE + FBM_POOL_MJC3_C_SIZE + FBM_LAX1_SIZE + FBM_GFX_SIZE + FBM_PQ_TOOL_POOL_SIZE + FBM_SECURE_FEEDER_SIZE +  FBM_OD_SIZE  + FBM_JPEVDP_POOL_SIZE + FBM_DMX1_SIZE  + FBM_SEAML_SIZE + FBM_W2DR2R_POOL_SIZE  + FBM_SRS_SIZE) + (FBM_MTDFB_SIZE + FBM_POOL_MJCMV_SIZE   + FBM_W2DR2R_POOL_Y_SIZE + FBM_JPEG_POOL_SIZE + FBM_PVR_SIZE + FBM_PNG_POOL_SIZE + FBM_MPEG_C_SIZE + FBM_MPEG_C2_SIZE + FBM_SEAML_C_SIZE))

//#define FBM_SIZE_FORMULAR2(x)    (x + FBM_LAX1_SIZE + FBM_LAX2_SIZE + FBM_DRAMHOTBOOTCALIBR_SIZE +FBM_SLT_GFX_POOL_SIZE + FBM_GFX_SIZE + FBM_SECURE_FEEDER_SIZE + FBM_PQ_TOOL_POOL_SIZE + FBM_OD_SIZE + FBM_PNG_POOL_SIZE + FBM_REMUX_SIZE + FBM_JPEVDP_POOL_SIZE + FBM_DMX1_SIZE + FBM_DMX2_SIZE+ FBM_DMX3_SIZE + FBM_DMX4_SIZE + FBM_MPEG_Y_POOL_SIZE + FBM_SEAML_POOL_SIZE + FBM_DIVX_SIZE+ FBM_W2DR2R_POOL_SIZE  + FBM_FEEDER1_SIZE + FBM_FEEDER2_SIZE + FBM_FEEDER3_SIZE + FBM_FEEDER4_SIZE + FBM_SWDMX_SIZE + FBM_DRM_BUF_SIZE + FBM_SRS_SIZE)
//#define FBM_SIZE_FORMULAR3(x)    (x  + FBM_DRAMHOTBOOTCALIBR_SIZE + FBM_MJC_RSV_POOL_SIZE + FBM_MPEG_C_POOL_SIZE+FBM_SEAML_C_POOL_SIZE + FBM_W2DR2R_POOL_Y_SIZE + FBM_VENC_SIZE )
#else
#define FBM_SIZE_FORMULAR(x)    ((x  + 0x1900000 + FBM_TVE_SIZE + FBM_DTCPIP_SIZE  + FBM_SHM_TOTAL_SIZE + FBM_RAMOOPS_SIZE   + FBM_HW_DEMOD_SIZE  + FBM_VENC_POOL_SIZE + FBM_TDCAV_POOL_SIZE + FBM_PQ_3DC_POOL_SIZE  + FBM_DMX_PID_BUF_SIZE  + FBM_VSS_SIZE  + FBM_SCPOS_MAIN_SIZE + FBM_SCPOS_SUB_SIZE + FBM_DSP_SIZE + FBM_DSP_BIN_POOL_SIZE + FBM_SWDMX_SIZE  + FBM_FEEDER1_SIZE + FBM_FEEDER2_SIZE + FBM_FEEDER3_SIZE + FBM_FEEDER4_SIZE + FBM_DRM_BUF_SIZE + FBM_MPEG_Y_POOL_SIZE) + ( FBM_MTFB_SIZE + FBM_POOL_MJC1_SIZE + FBM_POOL_MJC2_SIZE + FBM_POOL_MJC3_SIZE + FBM_POOL_MJC1_C_SIZE + FBM_POOL_MJC2_C_SIZE + FBM_POOL_MJC3_C_SIZE + FBM_LAX1_SIZE + FBM_LAX2_SIZE + FBM_LAX3_SIZE +FBM_LAX4_SIZE + FBM_DRAMHOTBOOTCALIBR_SIZE +FBM_SLT_GFX_POOL_SIZE + FBM_GFX_SIZE + FBM_PQ_TOOL_POOL_SIZE + FBM_SECURE_FEEDER_SIZE +  FBM_OD_SIZE + FBM_REMUX_SIZE + FBM_JPEVDP_POOL_SIZE + FBM_DMX1_SIZE + FBM_DMX2_SIZE+ FBM_DMX3_SIZE + FBM_DMX4_SIZE  + FBM_SEAML_POOL_SIZE  + FBM_DIVX_SIZE+ FBM_W2DR2R_POOL_SIZE  + FBM_SRS_SIZE) + (FBM_MTDFB_SIZE + FBM_POOL_MJCMV_SIZE + FBM_DRAMHOTBOOTCALIBR_SIZE  + FBM_W2DR2R_POOL_Y_SIZE + FBM_JPEG_POOL_SIZE + FBM_PVR_SIZE + FBM_PNG_POOL_SIZE + FBM_MPEG_C_POOL_SIZE+FBM_SEAML_C_POOL_SIZE))
#define FBM_SIZE_FORMULAR_4KMAINONLY(x)  ((x  + FBM_TVE_SIZE + FBM_SHM_TOTAL_SIZE + FBM_RAMOOPS_SIZE  + FBM_HW_DEMOD_SIZE  + FBM_VENC_POOL_SIZE + FBM_TDCAV_POOL_SIZE + FBM_PQ_3DC_POOL_SIZE  + FBM_DMX_PID_BUF_SIZE  + FBM_VSS_SIZE  + FBM_SCPOS_MAIN_SIZE + FBM_SCPOS_SUB_SIZE + FBM_DSP_SIZE + FBM_DSP_BIN_POOL_SIZE + FBM_SWDMX_SIZE  + FBM_FEEDER1_SIZE + FBM_DRM_BUF_SIZE + FBM_MPEG_Y_SIZE + FBM_MPEG_Y2_SIZE) + ( FBM_MTFB_SIZE + FBM_POOL_MJC1_SIZE + FBM_POOL_MJC2_SIZE + FBM_POOL_MJC3_SIZE + FBM_POOL_MJC1_C_SIZE + FBM_POOL_MJC2_C_SIZE + FBM_POOL_MJC3_C_SIZE + FBM_LAX1_SIZE + FBM_GFX_SIZE + FBM_PQ_TOOL_POOL_SIZE + FBM_SECURE_FEEDER_SIZE +  FBM_OD_SIZE  + FBM_JPEVDP_POOL_SIZE + FBM_DMX1_SIZE  + FBM_SEAML_SIZE + FBM_W2DR2R_POOL_SIZE  + FBM_SRS_SIZE) + (FBM_MTDFB_SIZE + FBM_POOL_MJCMV_SIZE   + FBM_W2DR2R_POOL_Y_SIZE + FBM_JPEG_POOL_SIZE + FBM_PVR_SIZE + FBM_PNG_POOL_SIZE + FBM_MPEG_C_SIZE + FBM_MPEG_C2_SIZE + FBM_SEAML_C_SIZE))
//#define FBM_SIZE_FORMULAR2(x)    (x + FBM_LAX1_SIZE + FBM_LAX2_SIZE + FBM_DRAMHOTBOOTCALIBR_SIZE + FBM_SLT_GFX_POOL_SIZE + FBM_GFX_SIZE + FBM_SECURE_FEEDER_SIZE + FBM_PQ_TOOL_POOL_SIZE + FBM_OD_SIZE + FBM_PNG_POOL_SIZE + FBM_REMUX_SIZE + FBM_JPEVDP_POOL_SIZE + FBM_DMX1_SIZE + FBM_DMX2_SIZE+ FBM_DMX3_SIZE + FBM_DMX4_SIZE + FBM_MPEG_Y_POOL_SIZE + FBM_SEAML_POOL_SIZE + FBM_DIVX_SIZE+ FBM_W2DR2R_POOL_SIZE  + FBM_SWDMX_SIZE + FBM_DRM_BUF_SIZE + FBM_SRS_SIZE)
//#define FBM_SIZE_FORMULAR3(x)    (x  +FBM_DRAMHOTBOOTCALIBR_SIZE +FBM_MJC_RSV_POOL_SIZE + FBM_MPEG_C_POOL_SIZE+FBM_SEAML_C_POOL_SIZE + FBM_W2DR2R_POOL_Y_SIZE + FBM_VENC_SIZE + FBM_FEEDER1_SIZE + FBM_FEEDER2_SIZE + FBM_FEEDER3_SIZE + FBM_FEEDER4_SIZE)
#endif

#define FBM_SIZE_FORMULAR_FHD(x)     (x  + FBM_VSS_SIZE + FBM_JPEG_POOL_SIZE + FBM_TDCAV_POOL_SIZE + FBM_PQ_3DC_POOL_SIZE + FBM_OD_SIZE + FBM_DMX_PID_BUF_SIZE + FBM_SCPOS_SUB_2K_SIZE + FBM_VENC_SIZE  + FBM_PVR_2K_SIZE  + FBM_DSP_SIZE + FBM_DSP_BIN_POOL_SIZE)
#define FBM_SIZE_FORMULAR2_FHD(x)    (x  + FBM_SECURE_FEEDER_2K_SIZE +FBM_PQ_TOOL_POOL_SIZE + FBM_MPEG1_2K_Y_SIZE + FBM_MPEG2_2K_Y_SIZE + FBM_PNG_POOL_SIZE + FBM_REMUX_SIZE + FBM_JPEVDP_POOL_SIZE + FBM_DMX1_2K_SIZE + FBM_DMX2_2K_SIZE+ FBM_MPEG1_2K_C_SIZE + FBM_MPEG2_2K_C_SIZE + FBM_SCPOS_MAIN_2K_SIZE  + FBM_FEEDER1_2K_SIZE + FBM_FEEDER2_2K_SIZE + FBM_SWDMX_SIZE + FBM_DRM_BUF_SIZE + FBM_SRS_SIZE + FBM_W2DR2R_POOL_2K_SIZE)
#define FBM_SIZE_FORMULAR3_FHD(x)    (x  + FBM_MJC_RSV_POOL_SIZE)

#define FBM_SIZE_FORMULAR_4K(x)     (x + FBM_DRAMHOTBOOTCALIBR_SIZE + FBM_TVE_SIZE + FBM_HW_DEMOD_SIZE + FBM_JPEG_POOL_SIZE + FBM_TDCAV_POOL_SIZE + FBM_PQ_3DC_POOL_SIZE  + FBM_REMUX_SIZE + FBM_DMX_PID_BUF_SIZE  + FBM_PVR_4K_SIZE  + FBM_VSS_SIZE + FBM_DSP_SIZE + FBM_DSP_BIN_POOL_SIZE +FBM_SCPOS_MAIN_4K_SIZE)
#define FBM_SIZE_FORMULAR2_4K(x)    (x + FBM_LAX1_SIZE + FBM_LAX2_SIZE + FBM_DRAMHOTBOOTCALIBR_SIZE + FBM_SWDMX_SIZE + FBM_GFX_SIZE + FBM_SECURE_FEEDER_4K_SIZE + FBM_PQ_TOOL_POOL_SIZE + FBM_OD_SIZE  + FBM_JPEVDP_POOL_SIZE + FBM_DMX1_4K_SIZE + FBM_DMX2_4K_SIZE+ FBM_DMX3_4K_SIZE  +FBM_MPEG1_4K_Y_SIZE + FBM_MPEG2_4K_Y_SIZE + FBM_MPEG3_4K_Y_SIZE + FBM_MPEG4_4K_Y_SIZE +  FBM_SEAML1_4K_SIZE + FBM_SEAML2_4K_SIZE + FBM_SEAML3_4K_SIZE + FBM_SEAML4_4K_SIZE  + FBM_FEEDER1_4K_SIZE + FBM_FEEDER2_4K_SIZE   + FBM_SWDMX_SIZE + FBM_DRM_BUF_SIZE + FBM_SRS_SIZE)
#define FBM_SIZE_FORMULAR3_4K(x)    (x + FBM_DRAMHOTBOOTCALIBR_SIZE + FBM_MJC_RSV_POOL_SIZE + FBM_MPEG1_4K_C_SIZE+ FBM_MPEG2_4K_C_SIZE + FBM_MPEG3_4K_C_SIZE + FBM_MPEG4_4K_C_SIZE +FBM_SEAML1_C_4K_SIZE + FBM_SEAML2_C_4K_SIZE+FBM_SEAML3_C_4K_SIZE+FBM_SEAML4_C_4K_SIZE + FBM_VENC_SIZE +FBM_SCPOS_SUB_4K_SIZE + FBM_REST_MEM_POOL_SIZE_4K)

#if !defined(__MODEL_slt__)
#define FBM_SIZE_FORMULAR_61(x)    (x  + FBM_DRAMHOTBOOTCALIBR_SIZE + FBM_HW_DEMOD_SIZE + FBM_DMX_PID_BUF_SIZE + FBM_JPEG_POOL_SIZE + FBM_TDCAV_POOL_SIZE   + FBM_VENC_SIZE  + FBM_PVR_SIZE  + FBM_DSP_SIZE + FBM_DSP_BIN_POOL_SIZE + FBM_REMUX_SIZE + FBM_VSS_SIZE  + FBM_SCPOS_SUB_SIZE + FBM_SCPOS_MAIN_SIZE)
#define FBM_SIZE_FORMULAR2_61(x)    (x + FBM_LAX1_SIZE + FBM_LAX2_SIZE + FBM_DRAMHOTBOOTCALIBR_SIZE + FBM_SWDMX_POOL_SIZE + FBM_SEAML_C_POOL_SIZE +FBM_SLT_GFX_POOL_SIZE + FBM_SECURE_FEEDER_SIZE +FBM_SEAML_POOL_SIZE + FBM_GFX_SIZE + FBM_PQ_TOOL_POOL_SIZE + FBM_OD_SIZE + FBM_PNG_POOL_SIZE  + FBM_JPEVDP_POOL_SIZE + FBM_PQ_3DC_POOL_SIZE + FBM_DMX1_SIZE + FBM_DMX2_SIZE+ FBM_DMX3_SIZE + FBM_DMX4_SIZE + FBM_MPEG_Y_POOL_SIZE + FBM_MPEG_C_POOL_SIZE   + FBM_FEEDER1_SIZE + FBM_FEEDER2_SIZE + FBM_FEEDER3_SIZE + FBM_FEEDER4_SIZE  + FBM_DRM_BUF_SIZE + FBM_SRS_SIZE + FBM_MJC_RSV_POOL_SIZE )
#define FBM_SIZE_FORMULAR3_61(x)    0
#else
#define FBM_SIZE_FORMULAR_61(x)    (x  + FBM_DRAMHOTBOOTCALIBR_SIZE + FBM_HW_DEMOD_SIZE + FBM_DMX_PID_BUF_SIZE + FBM_JPEG_POOL_SIZE + FBM_TDCAV_POOL_SIZE   + FBM_VENC_SIZE  + FBM_PVR_SIZE  + FBM_DSP_SIZE + FBM_DSP_BIN_POOL_SIZE + FBM_REMUX_SIZE + FBM_VSS_SIZE  + FBM_SCPOS_SUB_SIZE + FBM_SCPOS_MAIN_SIZE + FBM_FEEDER1_SIZE + FBM_FEEDER2_SIZE + FBM_FEEDER3_SIZE + FBM_FEEDER4_SIZE)
#define FBM_SIZE_FORMULAR2_61(x)    (x + FBM_LAX1_SIZE + FBM_LAX2_SIZE + FBM_DRAMHOTBOOTCALIBR_SIZE + FBM_SWDMX_POOL_SIZE + FBM_SEAML_C_POOL_SIZE + FBM_SLT_GFX_POOL_SIZE + FBM_SECURE_FEEDER_SIZE +FBM_SEAML_POOL_SIZE + FBM_GFX_SIZE + FBM_PQ_TOOL_POOL_SIZE + FBM_OD_SIZE + FBM_PNG_POOL_SIZE  + FBM_JPEVDP_POOL_SIZE + FBM_PQ_3DC_POOL_SIZE + FBM_DMX1_SIZE + FBM_DMX2_SIZE+ FBM_DMX3_SIZE + FBM_DMX4_SIZE + FBM_MPEG_Y_POOL_SIZE + FBM_MPEG_C_POOL_SIZE   + FBM_DRM_BUF_SIZE + FBM_SRS_SIZE + FBM_MJC_RSV_POOL_SIZE )
#define FBM_SIZE_FORMULAR3_61(x)    0
#endif

#define FBM_SIZE_FORMULAR_2K80(x)    (x  + FBM_VSS_SIZE + FBM_JPEG_POOL_SIZE + FBM_TDCAV_POOL_SIZE + FBM_PQ_3DC_POOL_SIZE + FBM_OD_SIZE + FBM_DMX_PID_BUF_SIZE  + FBM_VENC_SIZE  + FBM_PVR_2K_SIZE  + FBM_SCPOS_SUB_2K_SIZE + FBM_DSP_SIZE + FBM_DSP_BIN_POOL_SIZE)
#define FBM_SIZE_FORMULAR2_2K80(x)    (x  + FBM_SECURE_FEEDER_2K_SIZE +FBM_PQ_TOOL_POOL_SIZE + FBM_MPEG1_2K_Y_SIZE + FBM_MPEG2_2K_Y_SIZE + FBM_PNG_POOL_SIZE + FBM_REMUX_SIZE + FBM_JPEVDP_POOL_SIZE + FBM_DMX1_2K_SIZE + FBM_DMX2_2K_SIZE  + FBM_FEEDER1_2K_SIZE + FBM_FEEDER2_2K_SIZE + FBM_SWDMX_SIZE + FBM_DRM_BUF_SIZE + FBM_SRS_SIZE + FBM_W2DR2R_POOL_2K_SIZE)
#define FBM_SIZE_FORMULAR3_2K80(x)    (x  + FBM_SCPOS_MAIN_2K_SIZE +  FBM_MPEG1_2K_C_SIZE + FBM_MPEG2_2K_C_SIZE + FBM_MJC_RSV_POOL_SIZE)

#ifdef __MODEL_slt__
#define FBM_SLT_EXTRA_SIZE      0xD0000
#else
#define FBM_SLT_EXTRA_SIZE      0x0
#endif

#ifdef CC_CDC_SUPPORT
#define FBM_PQ_TOOL_SIZE 0x1800000 //24M = 8M*3
#else
#define FBM_PQ_TOOL_SIZE 0
#endif

#if defined(CC_SUPPORT_OD)
#define FBM_OD_SIZE             0
#else
#define FBM_OD_SIZE             0x0
#endif

#if defined(CC_SUPPORT_VSS)
#define FBM_VSS_SIZE            0xFE0000
#else
#define FBM_VSS_SIZE            0x0
#endif

#if defined(CC_SUPPORT_MONITOR_OUT_TVE)
#if defined(CC_FLIP_MIRROR_SUPPORT)
#define FBM_TVE_POOL_FBM_SIZE  0x350000
#else
#define FBM_TVE_POOL_FBM_SIZE  0x240000
#endif
#else
#define FBM_TVE_POOL_FBM_SIZE  0
#endif

#ifdef ADSP_BIN_SUPPORT
#ifdef CC_AUD_DOLBY_SUPPORT_MS12
#define FBM_DSP_BIN_POOL_SIZE                      (0x400000) // add for MS12 libraries
#else
#define FBM_DSP_BIN_POOL_SIZE                      (0x300000)
#endif // CC_AUD_DOLBY_SUPPORT_MS12
#else
#define FBM_DSP_BIN_POOL_SIZE                      (0)
#endif

#if defined(TIME_SHIFT_SUPPORT)
#ifndef CC_FBM_SUPPORT_PVR
#define CC_FBM_SUPPORT_PVR
#endif
#endif

#define CC_FBM_SUPPORT_PNG

#ifndef FBM_PNG_POOL_SIZE
#if defined(CC_FBM_SUPPORT_PNG)
#if !defined(CC_SUPPORT_PNG_SW_DECODE)
#define FBM_PNG_POOL_SIZE       0x800000
#else
#define FBM_PNG_POOL_SIZE       0x0
#endif
#else
#define FBM_PNG_POOL_SIZE       0x0
#endif
#endif


#if defined(CC_FBM_SUPPORT_PVR)
#if defined(CC_DUAL_PVR_SUPPORT)
#define FBM_PVR_SIZE            (0x600000*2)
#else
#define FBM_PVR_SIZE            0x380000
#endif
#define FBM_PVR_4K_SIZE  (0x780000) //sony 4k //archer
#define FBM_PVR_2K_SIZE  (0xc80000)  //sony 2k
#else
#define FBM_PVR_SIZE            0x0
#define FBM_PVR_4K_SIZE  (0)
#define FBM_PVR_2K_SIZE  (0)
#endif

#if defined(CC_FBM_SUPPORT_SWDMX)
#define FBM_SWDMX_SIZE          0x240000
#else
#define FBM_SWDMX_SIZE          0x0
#endif

#if defined(CC_FBM_SUPPORT_DMXPID)
#define FBM_DMX_PID_BUF_SIZE    0x680000 // 0x400000
#else
#define FBM_DMX_PID_BUF_SIZE    0x0
#endif

#define FBM_IC_TAG              0x4000

#if defined(CC_SUPPORT_VENC)
#define FBM_VENC_SIZE           (0x1F00000)
#define FBM_VENC_720P_SIZE      (0x1000000)
#else
#define FBM_VENC_SIZE           (0x0)
#define FBM_VENC_720P_SIZE      (0x0)
#endif

#define FBM_DMX_SIZE                            0x300000
#if defined(CC_FIX_AV_BAD_INTER)
#define FBM_DMX_H264_SIZE                       (0x500000+0x600000)
#else
#define FBM_DMX_H264_SIZE                       (0x500000)
#endif

#if defined(CC_FBM_ADD_VFIFO_SIZE)
#define FBM_DMX_ADD_SIZE       0x500000
#else
#define FBM_DMX_ADD_SIZE       0
#endif

#if defined(CC_FBM_SUPPORT_MUXER)
#define FBM_MUXER_SIZE          0x400000
#else
#define FBM_MUXER_SIZE          0x0
#endif

#define FBM_DTCPIP_SIZE          0x1900000 //25MB


#if defined(CC_SUPPORT_STR_CORE_OFF)
#define FBM_DRAMHOTBOOTCALIBR_SIZE    0x80000  //512K
#else
#define FBM_DRAMHOTBOOTCALIBR_SIZE    0
#endif

#if defined(CC_RAMOOPS_SUPPORT)
#define FBM_RAMOOPS_SIZE          0x100000  //1M
#else
#define FBM_RAMOOPS_SIZE          0x0
#endif

#if defined(CC_SUPPORT_DUAL_3D_BROADCASTING)
#define FBM_IMGRZ_3D_KR_BUF     0x600000
#else
#define FBM_IMGRZ_3D_KR_BUF     0
#endif

#if defined(CC_AUD_ARM_SUPPORT)
#define FBM_AUDIO_APROC_SIZE 0x300000 //3M
#else
#define FBM_AUDIO_APROC_SIZE 0
#endif

#ifdef CC_AUD_ARM_RENDER
#define FBM_APROC_IO_BUFFER_SZ 0x24000*4
#else
#define FBM_APROC_IO_BUFFER_SZ 0
#endif

#ifdef CC_AUD_DISABLE_2ND_DSP
#define FBM_AUDIO_2ND_DSP_SIZE 0
#else
//#define FBM_AUDIO_2ND_DSP_SIZE 0x2BA800 //2716KB+39KB(AFIFO1)+39KB(AFIFO2)
#define FBM_AUDIO_2ND_DSP_SIZE 0x2BB000
#endif

#if defined(CC_IC_VERIFY_FBM_MODE)
#define FBM_BIG_SIZE            0x800000
#else
#define FBM_BIG_SIZE            0x0
#endif
#if defined(CC_SUPPORT_4K2K)
#define FBM_EXTRA_FOR_4K2K_VIDEO    (0x1d00000) //the 0x1d00000 values comes from system fail-booting hint! // 0x120d800+0x160ac00
#else
#define FBM_EXTRA_FOR_4K2K_VIDEO    (0)
#endif

#if defined(ANDROID) && defined(CC_SUPPORT_4K2K)
#define FBM_EXTRA_FOR_4K2K_FEEDER_DMX (0x2000000) //request by cong.wang
#else
#define FBM_EXTRA_FOR_4K2K_FEEDER_DMX (0)
#endif

#if defined(CC_FBM_TWO_FBP)
#define FBM_TWO_FBP_SIZE        (0x800000 + 0x1780000 + FBM_EXTRA_FOR_4K2K_VIDEO)
#else
#define FBM_TWO_FBP_SIZE        (0)
#endif

#if defined(CC_FBM_3D_OSD)||defined(CC_MHP_SUPPORT)
#if defined(CC_MT5891_LINUX_SHRINK)
#define FBM_JPEVDP_POOL_SIZE (0x800000)
#else
#define FBM_JPEVDP_POOL_SIZE (0x1000000)// 20220429 base is: 0x400000, change to 16M. // for M3 shrink(0x1000000)
#endif
#else
#define FBM_JPEVDP_POOL_SIZE (0)
#endif

#define FBM_JPEVDP_4K_SIZE (0x400000)

#define FBM_FD_SIZE             (0xc00000)

#define FBM_DRM_BUF_SIZE        (0x100000)

#if defined(CC_H264_LV5_SUPPORT_SINGLE_POOL)
#define FBM_EXTRA_FRAME_NUM     2
#define FMB_EXTRA_FOR_H264_LV5  ((((FBM_EXTRA_FRAME_NUM)*1920*1088*3)>>1) + (((FBM_EXTRA_FRAME_NUM)*1920*1088)>>2))
#else
#define FMB_EXTRA_FOR_H264_LV5  0
#endif


#if defined(DIVX_PLUS_CER) || defined(CC_NETFLIX_CE3_SUPPORT) || defined(CC_FBM_FULL_3D_SUPPORT) || defined(CC_ENABLE_SEAMLESS_FOR_2D)
#if defined(CC_ENABLE_SEAMLESS_FOR_MVC)
#define FBM_DIVX_SIZE           (0xC00000 + FMB_EXTRA_FOR_H264_LV5)
#else
#define FBM_DIVX_SIZE           (0x600000 + FMB_EXTRA_FOR_H264_LV5)
#endif
#else
#define FBM_DIVX_SIZE           (0 + FMB_EXTRA_FOR_H264_LV5)
#endif

#define FBM_TVE_SIZE            (0x380000)

#ifdef CC_SUPPORT_RECORD_AV
#define FBM_TDCAV_POOL_SIZE     (0x2c6000)
#else
#define FBM_TDCAV_POOL_SIZE     (0)
#endif

#if defined(CC_TRUSTZONE_SUPPORT)&& defined(CC_SVP_SUPPORT)
#ifdef CC_FBM_TWO_FBP
#define FBM_REDUCE_FBM_DMX_SIZE (0x700000 +FBM_DMX_ADD_SIZE)// 2M for dmx,5M for dmx2
#else
#define FBM_REDUCE_FBM_DMX_SIZE 0x200000
#endif
#else
#define FBM_REDUCE_FBM_DMX_SIZE 0
#endif

#ifdef CC_BYPASS_MJC
#define FBM_MJC_RSV_POOL_SIZE   (0)
#else
#define FBM_MJC_RSV_POOL_SIZE   (0)
#endif

#define FBM_REST_MEM_POOL_SIZE_2K   (0x20000000 - 0xad00000 - FBM_SCPOS_MAIN_2K_SIZE -  FBM_MPEG1_2K_C_SIZE - FBM_MPEG2_2K_C_SIZE - FBM_MJC_RSV_POOL_SIZE - FBM_W2DR2R_POOL_2K_SIZE)//0x11800000)//280
#define FBM_REST_MEM_POOL_SIZE_4K   0//(0x20000000 - 0xad00000 - FBM_MJC_RSV_POOL_SIZE - FBM_MPEG1_4K_C_SIZE - FBM_MPEG2_4K_C_SIZE - FBM_MPEG3_4K_C_SIZE - FBM_MPEG4_4K_C_SIZE  - FBM_VENC_720P_SIZE - FBM_SCPOS_SUB_4K_SIZE- (FBM_SEAML1_C_4K_SIZE+FBM_SEAML2_C_4K_SIZE+FBM_SEAML3_C_4K_SIZE+FBM_SEAML4_C_4K_SIZE))//(0xb400000)//180

#if defined CC_SUPPORT_TV_STAGEFRIGHT
#if defined(CC_VOMX_TV_COEXIST)
#define VOMX_EXTRA_FRAME_BUFFER_SZ  0x1200000
#else
#define VOMX_EXTRA_FRAME_BUFFER_SZ  0x900000
#endif
#else
#define VOMX_EXTRA_FRAME_BUFFER_SZ  0x0
#endif

#define FBM_MEM_CFG_MT5890_3DTV             FBM_ALIGN_MASK(0,4095)
#define FBM_MEM_CFG_MT5890_3DTV_CHB         FBM_ALIGN_MASK(0,4095)
#define FBM_MEM_CFG_MT5890_3DTV_CHC         FBM_ALIGN_MASK(0,4095)

#define FBM_MEM_CFG_MT5891_3DTV             FBM_ALIGN_MASK(FBM_SIZE_FORMULAR(0x30000),4095)
#define FBM_MEM_CFG_MT5891_3DTV_CHB         FBM_ALIGN_MASK(FBM_SIZE_FORMULAR2(0x10000),4095)
#define FBM_MEM_CFG_MT5891_3DTV_CHC         FBM_ALIGN_MASK(FBM_SIZE_FORMULAR3(0x10000),4095)

// mt5895 FBM size define
#define FBM_MEM_CFG_MT5895_3DTV             FBM_ALIGN_MASK(FBM_SIZE_FORMULAR_MT5895(0x30000+0x1000000),(FBM_PAGE_SIZE-1))
#define FBM_MEM_CFG_MT5895_3DTV_MJC             FBM_ALIGN_MASK(FBM_SIZE_FORMULAR_MT5895_MJC(0x30000+0x1000000),(FBM_PAGE_SIZE-1))
#define FBM_MEM_CFG_MT5895_3DTV_NOMJC            FBM_ALIGN_MASK(FBM_SIZE_FORMULAR_MT5895_NOMJC(0x30000+0x1000000),(FBM_PAGE_SIZE-1))

// mt5893 FBM size define
#define FBM_MEM_CFG_MT5893_3DTV             FBM_ALIGN_MASK(FBM_SIZE_FORMULAR(0x30000+0x1000000),(FBM_PAGE_SIZE-1))
#define FBM_MEM_CFG_MT5893_3DTV_4K_MAINONLY FBM_ALIGN_MASK(FBM_SIZE_FORMULAR_4KMAINONLY(0x30000+0x1000000),(FBM_PAGE_SIZE-1))

#define FBM_MEM_CFG_MT5890_3DTV_FHD             FBM_ALIGN_MASK(FBM_SIZE_FORMULAR_FHD(0x40000),4095)
#define FBM_MEM_CFG_MT5890_3DTV_FHD_CHB         FBM_ALIGN_MASK(FBM_SIZE_FORMULAR2_FHD(0x20000),4095)
#define FBM_MEM_CFG_MT5890_3DTV_FHD_CHC         FBM_ALIGN_MASK(FBM_SIZE_FORMULAR3_FHD(0),4095)

#define FBM_MEM_CFG_MT5891_3DTV_4K             FBM_ALIGN_MASK(FBM_SIZE_FORMULAR_4K(0x50000),4095)
#define FBM_MEM_CFG_MT5891_3DTV_4K_CHB         FBM_ALIGN_MASK(FBM_SIZE_FORMULAR2_4K(0x30000),4095)
#define FBM_MEM_CFG_MT5891_3DTV_4K_CHC         FBM_ALIGN_MASK(FBM_SIZE_FORMULAR3_4K(0x30000),4095)

#define FBM_MEM_CFG_MT5890_3DTV_4K             FBM_ALIGN_MASK(0,4095)
#define FBM_MEM_CFG_MT5890_3DTV_4K_CHB         FBM_ALIGN_MASK(0,4095)
#define FBM_MEM_CFG_MT5890_3DTV_4K_CHC         FBM_ALIGN_MASK(0,4095)

#define FBM_MEM_CFG_MT5861_3DTV             FBM_ALIGN_MASK(0,4095)
#define FBM_MEM_CFG_MT5861_3DTV_CHB         FBM_ALIGN_MASK(0,4095)
#define FBM_MEM_CFG_MT5861_3DTV_CHC         FBM_ALIGN_MASK(0,4095)
#ifdef CC_TVP_SUPPORT
#define FBM_MEM_CFG_MT5891_3DTV_2CH             FBM_ALIGN_MASK(FBM_SIZE_FORMULAR_61(0x1060000),4095)
#else
#define FBM_MEM_CFG_MT5891_3DTV_2CH             FBM_ALIGN_MASK(FBM_SIZE_FORMULAR_61(0x60000),4095)
#endif
#define FBM_MEM_CFG_MT5891_3DTV_2CH_CHB         FBM_ALIGN_MASK(FBM_SIZE_FORMULAR2_61(0x40000),4095)
#define FBM_MEM_CFG_MT5891_3DTV_2CH_CHC         FBM_ALIGN_MASK(FBM_SIZE_FORMULAR3_61(0),4095)

#define FBM_MEM_CFG_MT5890_3DTV_2K80             FBM_ALIGN_MASK(FBM_SIZE_FORMULAR_2K80(0x70000),4095)
#define FBM_MEM_CFG_MT5890_3DTV_2K80_CHB         FBM_ALIGN_MASK(FBM_SIZE_FORMULAR2_2K80(0x50000),4095)
#define FBM_MEM_CFG_MT5890_3DTV_2K80_CHC         FBM_ALIGN_MASK(FBM_SIZE_FORMULAR3_2K80(0x50000),4095)

// mt5398 FBM size define----------------------------------------------------------------------
#if defined(ANDROID)
#define FBM_MEM_CFG_MT5399_3DTV             FBM_SIZE_FORMULAR(0x4A80000 + 0xD00000 )
#else
#define FBM_MEM_CFG_MT5399_3DTV             FBM_SIZE_FORMULAR(0x4A80000 + 0x1c1000)
#endif
#define FBM_MEM_CFG_MT5399_3DTV_NOSUB       FBM_SIZE_FORMULAR(0x4400000 + 0x1c1000)
#define FBM_MEM_CFG_MT5399_2DTV             FBM_SIZE_FORMULAR(0x3f80000 + 0x1c1000)
#define FBM_MEM_CFG_MT5399_2DTV_NOSUB       FBM_SIZE_FORMULAR(0x3a00000 + 0x1c1000)

#define FBM_MEM_CFG_MT5399_A3               FBM_SIZE_FORMULAR(0x58B0000+0xD7000+0x1780000 + 0x101000)

// mt5881 FBM size define----------------------------------------------------------------------
#ifdef CC_FLIP_MIRROR_SUPPORT
#define FBM_MEM_CFG_MT5881_128Mx1       FBM_SIZE_FORMULAR(0x3305000)
#else
#define FBM_MEM_CFG_MT5881_128Mx1       FBM_SIZE_FORMULAR(0x3185000)
#endif
#define FBM_MEM_CFG_MT5881_64Mx1        FBM_SIZE_FORMULAR(0x2780000)
#define FBM_MEM_CFG_MT5881_SA_64Mx1        FBM_SIZE_FORMULAR(0x27C2000)

// Audio volume define
#define VOL_POS_14_DB               (14*2)
#define VOL_POS_11_DB               (11*2)
#define VOL_POS_10_DB               (10*2)
#define VOL_POS_9_5_DB              (9*2+1)
#define VOL_POS_6_DB                (6*2)
#define VOL_POS_5_5_DB              (5*2+1)
#define VOL_POS_5_DB                (5*2)
#define VOL_POS_4_DB                (4*2)
#define VOL_POS_3_DB                (3*2)
#define VOL_0_DB                    (0)
#define VOL_NEG_3_DB                (-3*2)
#define VOL_NEG_6_DB                (-6*2)
#define VOL_NEG_12_DB               (-12*2)

#define MT8292_SPEAKER_PGA_080V     (0x14)
#define MT8292_SPEAKER_PGA_288V     (0x16)

#define SCPOS_SPECIAL_VGA_DISABLE           0
#define SCPOS_SPECIAL_VGA_USE_DRAM          1   //both Main/Sub go through normal path
#define SCPOS_SPECIAL_VGA_USE_DISPMODE      2   //main=>display mode, sub=>normal mode

#define PANEL_CHANNEL_SWAP_ALWAYS           1
#define PANEL_CHANNEL_SWAP_IN_SIGNAL_PORT   2
#define PANEL_CHANNEL_SWAP_IN_DUAL_PORT     3

#define SCART_FB_IN_SOY0    0
#define SCART_FB_IN_SOY1    1
#define SCART_FB_IN_SOG     2
#define SCART_FB_IN_NONE    3

#define SCART_FULL_TYPE     0   //Scart 1 &2 : CVBS/S-Video/RGB
#define SCART_HALF_TYPE     1   //Scart 1 : CVBS/RGB, Scart2: CVBS/S-Video

#define SCART_SC_FROM_EXT   (0)
#define SCART_SC_FROM_CH1   (1)
#define SCART_SC_FROM_CH3   (2)


#define INTERNAL_PODCI      (0)     //mt5360 pcmcia pinmux
#define mt5360_NAND_PMX     (7)     //mt5360 nand i/f pinmux
#define MT8295_IO_0mA       (0)
#define MT8295_IO_4mA       (4)
#define MT8295_IO_8mA       (8)
#define MT8295_IO_12mA      (12)

#define UPGRADE_PARTITION                eNANDFlashPartOffset32

#define HDMIEEPROM_PORTINFO_OFFSET 0x10090
//-----------------------------------------------------------------------------
// Enum constant
//-----------------------------------------------------------------------------

#if defined(CC_MTK_PRELOADER)

#include "c_model.h"
#include "../drv_cust/drv_default.h"

#define DRVCUST_InitGet(x)          (x)
#define eDdrClock                   (DRVCUST_DramClk(DEFAULT_DDR_CLOCK))
#define eDramType                   (DEFAULT_DRAM_TYPE)
#define eDramColAddr                (DEFAULT_DRAM_COLADDR)
#define eDdrCL                      (DEFAULT_DDR_CL)
#define eDdrBusX8                   (DEFAULT_DDR_BUS_X8)
#define eFlagDDRQfp                 (FLAG_DDR_QFP)
#define eFlagDDR16BitSwap           (FLAG_DDR_16BITSWAP)
#define eFlagDDRDCBalance			(FLAG_DDR_DCBALANCE)
#define eFlag1GBitSupport           (DEFAULT_DRAM_8_BANKS)
#define eFlagReadODT                (DEFAULT_DRAM_RODT)
#define eFlagWriteODT               (DEFAULT_DRAM_WODT)
#define eDmpllSpectrumPermillage    (DMPLL_SPECTRUM_PERMILLAGE)
#define eDmpllSpectrumFrequency     (DMPLL_SPECTRUM_FREQUENCY)
#define eFlagDDRScramble            (FLAG_DDR_SCRAMBLE)
#define eHotBootWdtTimer            (HOTBOOT_RESET_TIMER)

typedef UINT32 QUERY_TYPE_T;
typedef UINT32 QUERY_UPTR_T;

#else /* defined(CC_NAND_BOOT) && defined(CC_MTK_PRELOADER) */

typedef enum
{
    eZeroStart,                 // Default Value

    // Initial configuration
    eFlagBootVerbose,           // 0
    eNorCpuClock,               // 162000000
    eDramType,                  // DDR1x2
    eDramColAddr,               // COL_ADDR_BIT_10
    eDdrClock,                  // 297000000
    eDdrCL,                     // 6
    eDdrBusX8,                  // 0
    eDmpllSpectrumPermillage,   // 0
    eDmpllSpectrumFrequency,    // 0
    eFlag1GBitSupport,          // 0
    eFlagReadODT,               // 150
    eFlagWriteODT,              // 50
    eFlagDDRQfp,                // 0
    eFlagDDRDCBalance,
    eFlagDDR16BitSwap,          // 0
    eSysResetTimer,             // 0xf00000.  (15/27 second)
    eHotBootWdtTimer,
    eSuspendWdtTimer,
    eFlagDDRScramble,

    // Tuner driver customization.
    eTunerCtrl,
    eTunerCtrlAna,
    eTunerTypeDefault,
    eTunerTypeOfst0,
    eTunerTypeOfst1,
    eTunerTypeOfst2,
    eDemodResetGpio,
    eDemodResetGpio2,
    eDemodEwsPwrOnGpio,
    eTunerResetGpio,
    eDemodTypeOfst,
    eDvbsDemodResetGpio,
    eRfTunerPinGpio,            // GPIO pin for sharp tuner control.
    eBrdcstSrcOfst0,
    eDTMBIFAGCGpio,             //tuner AGC switch
    eTunerI2cBusID,             //tuner use which i2c bus
    eDemodI2cBusID,             //demod use which i2c bus
    eChinaATVTuner30v,
    eTunerRFAGCSwitchGpio,      //GPIO pin for tuner RF AGC switch(For ATV,RF AGC use external voltage from ATD;For DTV,RF AGC use internal )

    // Dram setting
    eDramBurstLen,              // 15
    eDramBurstLen0,             //
    eDramBurstLen1,
    eDramGroup1ArbiterTime,     // 5
    eDramGroup2ArbiterTime,     // 4
    eDramGroup3ArbiterTime,     // 15

    // Release version setting
    eReleaseEnableWatchDog,         // 0, only enable at MP.
    eReleaseWatchdogTimeout,        // 5 seconds.
    eReleaseWatchdogPriority,       // 100
	eWatchdogResetWaitTime,         // 3 seconds.
    eReleaseLoaderEnableWatchDog,   // 0, only enable at MP.
    eReleaseLoaderWatchdogTimeout,  // 10 seconds.

    // Memory setting
    eFbmMemAddr,                // g_u4DramSize - FBM_MEM_CFG_SIZE - 0x4000
    eFbmMemSize,                // 0x1300000
    eFbmMemChBSize,
    eFbmMemChBStart,
    eFbmMemChCSize,
    eFbmMemChCStart,
    eFbmMemR20Start,
    eFbmMemR21Start,
    eFbmMem3DLUTStart,
    eFbmMemUartDMAStart,
    eFbmMemUartDMASize,

    // PDWNC setting
    ePdwncPolarity,             // 0
    ePdwncResumeHandleKey,
    ePcdWakeupTheKey,           // XXX
    eWakeupReasonGpio,          // 0, 0 is disable.
    eWakeupReasonGpioPolarity,  // 0
    eSWPowerDetectVoltage,
    eEthernetWakeupSupport,     // 1

    //PWM setting
    ePWM0Port,
    ePWM1Port,
    ePWM2Port,

    // USB upgrade setting
    eAutoUsbUpgradeEnable,              // 0
    eEepromUsbUpgradeEnable,            // 1
	eUsbEepromAutoTestOffset,
	eUsbUpgradeForceDisable,            // 0
    eLoaderStandbyEnableIfUpgradeBreak, // 0
    eLoaderUpgradeBreakStateOffset,
    eLoaderUpgradeDlmVerDataOff,        // 8
    eLoaderUpgradeDlmVerDataLen,        // 8
    eLoaderUpgradeDlmForceVer,          // ffffffff
    eloaderUpgradeOnlyACon,
    eloaderUpgradeAfterLoaderWriteFlagEepromAddress,   // 0
    //MSDC upgrade
    eSDCARDUpgradeOffset,                // SD offset
	eSDCARDUpgradeSupport,				 // SD upgrade support

    // Loader logo
    eLoaderLogoNumber,          // 0
    eLoaderLogoBackground,      // 0xeeeeee
    eLoaderMsgBackground,       // 0xeeeeee
    eLoaderLogoFlashAddr,       // 0
    eLoaderLogoColorMode,       // 0xd
    eLoaderDualBootOffset,      // 0

    // Panel customization
    eDefaultPanelSelect,        // PANEL_DEFAULT
    eLvdsMsbSw,                 // option
    eBackLightGpio,             // 69
    eBackLightGpio2,            // option
    eBackLightOnVal,            // 0
    ePanelPowerGpio,            // Gpio 3
    ePanelPowerOnVal,           // 0
    ePanelDCRGpio,              // Gpio 5
    ePanelDCROnVal,             // 1
    ePanelPdpVsGpio,            // Gpio 3
    ePanelPdpVsOnVal,           // 0
    eTimerDimmingFreq,          // 180~260 (Hz)
    eDimmingFreq60,             // hz
    eDimmingFreq50,             // hz
    eBacklightHigh,             // 0~255
    eBacklightMiddle,           // 0~255
    eBacklightLow,              // 0~255
    eSpreadSpectrumPermillage,  // 0~1000 (0/00)
    ePanelPwmPolarity,          // PWM_LOW_PANEL_BRIGHT
    ePanelPwmPrescalar,         // set bTimeBase to control PWM freq
    ePanelIndexFromEeprom,      // option
    ePanelIndexOffset1,         // option
    ePanelIndexOffset2,         // option
    ePanelIndexOffset3,         // option
    ePanelTableNandFlashPart,   // option Load Panel table from NAND flash PART ID
    ePanelBitSelectCtrlGpio,
    ePanelLvdsSelectCtrlGpio,
    ePanelDisableDimming,       // disable using PWM1, let gpio68 free
    ePanelChannelSwap,          // change even and odd channel
    ePanelIndexFromGpioNum,     // option
    ePanelIndexFromGpioIdx,     // option
    ePanelTTLOutput,            // option
    ePanelVB1LaneSwap,  		// option
    ePanelVB1LanePNSwap,   		// option
    ePanelFlashTableSize,       // option
    ePanelFlashTableAddress,    // option
    ePanelEepromToFlashIndexMap,// option
    eLvdsDrivingCurrent,        // option
    ePanelBacklightPwmPort,     // [0/1/2]
    ePanelBacklightGPIO,        // GPIO or PWM output
    eLvdsACommonModeVoltage,    // option
    eLvdsBCommonModeVoltage,    // option
    ePanelLVDSToGPO,            // option
    ePanelLVDSToGPI,            // option

	ePanelVB1LocknPin,
    ePanelVB1LocknPinFunc,
    ePanelVB1HtpdnPin,
    ePanelVB1HtpdnPinFunc,
    ePanelVB1OsdLocknPin,
    ePanelVB1OsdLocknPinFunc,
    ePanelVB1OsdHtpdnPin,
    ePanelVB1OsdHtpdnPinFunc,

    eLvdsACtrlEven,
    eLvdsACtrlOdd,
    eLvdsBCtrlEven,
    eLvdsBCtrlOdd,
    ePanelPixelShiftHMax,
    ePanelPixelShiftVMax,

    ePanel242530pOutput,

    eFlagBacklightBoostCtrl,        // Support backlight boost control.
    eFlagBacklightBoostPort,        // Select backlight boost port.
    eFlagBacklightBoostInvert,      // Support boost signal invert by BJT circuit.
    eFlagBacklightDimmingLock,      // Support backlight dimming lock to output v-sync.
    eFlagBacklightDimmingInvert,    // Support dimming signal invert by BJT circuit.

    // Audio customization
    eAudioOutPadNormal,
    eAudioOutPadDrvCur,
    eAudioSpkType,
    eAudioSurroundSpkType,
    eAudioCenterSpkType,
    eAudioCh910SpkType,
    eAudioSubwooferOn,
    eAudioBassMngCutOffFreq,
    eAudioSoftMuteOrder,
    eAudioBbeLevel,
    eAudioBbeProcess,
    eAudioBbeLoContour,
    eAudioBbe3dGain,
    eAudioBypassPostProc,
    eAudioDacMclk,
    eAudioInterDacChlSpecialConfig,
    eAudioOpctrlMuteGpioNum,
    eAudioOpctrlMuteGpioPolarity,
    eAudioMuteGpioNum,
    eAudioAmpEnableGpioNum,
    eAudioMuteGpioPolarity,
    eAudioAmpGpioPolarity,
    eAudioAmpResetGpioNum,
    eAudioAmpResetGpioPolarity,
    eAudioArcGpioPolarity,
    eAudioArcEnableGpioNum,
    eAudioScartEnableGpioNum,
    eAudioSCcartGpioPolarity,
    eAudioVolBaseLevel,
    eAudioLineOutFixVol,
    eAudioPowerOnMusicVol,
    eAudioIecRawDelayFlag,
    eAudioIecRawDelay,
    eAudioTableCfg,
    eAudioAdacCfg,
    eAudioHeadphonePlugInGpio,
    eAudioHeadPhonePlugInPolarity,
    eAudioHeadPhonePlugInLineOutMute,
    eAudioDcDetectGpio,
    eAudioDcDetectPolarity,
    eAudioLineOutUseInterDac,
    eAudioMuteAllSource,
    eAudioDvdGpio,
    eAudioDvdPolarity,
    eAudioDvdInputChl,
    eAudioSpkAutoOffWhenVolMute,
    eAudioCustSpecGpioCtrl,
    eAudioCustSpec2GpioCtrl,
    eAudioCustHpGpioCtrl,
    eAudioSpecGpioPolarity,
    eAudioSpec2GpioPolarity,
    eAudioHpGpioPolarity,
    eAudioSpkPath,
    eAudioAvcAttackThres,
    eAudioMT8292PGA0GAIN,
    eAudioMT8292PGA1GAIN,
    eAudioMT8292PGA2GAIN,
    eAudioMT8292HPGAIN,
    eAudioLineInLrSwap,
    eAudioTvSysFineTuneVol,
    eAudioNvmEnable,
    eAudioNvmLength,
    eAudioNvmData,
    eAudioNvmGetCountry,
    eAudioProfileDefault,
    eAudioProfileStart,
    eAudioProfileEnd,
    eAudioLimiterMode,                  // 0: off, 1: Adaptive mode, 2: Fix mode
    eAudioLimiterFixThreshold,          // the max. value is 0x100000
    eAudioTunerATD,
    eAudioSTA335ResetGpio,
    eAudioSTA335ResetGpioPolarity,
    eAudioADCNegDigitalGain,            // [Joel]20101026
    eAudioAL1AR1PhaseInverse,
    eAudioAL2AR2PhaseInverse,
    eAudioAL3AR3PhaseInverse,
    eAudioAL4AR4PhaseInverse,
    eAudioPowerstageUseAL0AR0,
    eAudioPowerstageUseAL1AR1,
    eAudioPowerstageUseAL2AR2,
    eAudioPowerstageUseAL3AR3,
#ifdef CC_AUDIO_EU_PWM_OUTPUT_AUXDEC
    eAudioAuxOutAtAL0AR0,
    eAudioAuxOutAtAL1AR1,
    eAudioAuxOutAtAL2AR2,
    eAudioAuxOutAtAL3AR3,
#endif
    eAudioDacAL0AR0Enable,
    eAudioDacAL1AR1Enable,
    eAudioDacAL2AR2Enable,
    eAudioDacAL3AR3Enable,
    eAudioInternalLDOEnable,
    eAudioDigiAMPResetGpio,
    eAudioDigiAMPResetGpioPolarity,
    eAudioADFlag,
    eAudioDownmixPosition,
    eAudioDownmixLR,
    eAudioDownmixWithBalance,
    eAudioPanFadeControl,
    eAudioMultiPairOutput,
    eAudioBI2SEnable,
    eAudioPcmPrebufBankNum,
    eAudioAI2SuseforSpeaker,
    eAudioMultichlDDCO,
    eAudioAmpFadeOutTime,
    eAudioLoaderMusicData,
    eAudioCustomerMusicTable,
    eAudioFlashAQPartition,
    eAudioFlashAQSize,
    eAudioFlashAQData,
    eAudioFlashAQDataSize,
    eAudioFlashAQDataDscrpt,
    eAudioFlashAQDataDscrptSize,
    eAudioAdspBinPartition,

    eAudioLineoutDACNum,

    // sunman_tshd
    eAudioTSHDInputGain,
    eAudioTSHDOutputGain,
    eAudioTSHDSurrLvl,
    eAudioTSHDSpkSize,
    eAudioTSHDTbCtrl,
    eAudioTSHDDefCtrl,
    eAudioTSHDElevCtrl,
    eAudioTSHDAnaSize,
    eAudioTSHDComprCtrl,
    eAudioTSHDLevelDep,

    // bofeng_cc3d
    eAudioCC3Dflag,
    eAudioCC3Dmode,
    eAudioCC3DInputGain,
    eAudioCC3DOutputGain,
    eAudioCC3DSpkSize,
    eAudioCC3DTbCtrl,
    eAudioCC3DAnaSize,
    eAudioCC3DComprCtrl,
    eAudioCC3DLevelDep,
    eAudioCC3DHpfSize,
    eAudioCC3DIniSize,

    // MTK Virtual Surround
    eAudioMtkVsClarity,
    eAudioMtkVsWidth,
    eAudioMtkVsLRGain,
    eAudioMtkVsXtalk,
    eAudioMtkVsOutputGain,
    eAudioMtkVsBassGain,
    eAudioMtkVsFo,

    // CC_AUD_DSP_SUPPORT_AUDYSSEY
    eAudioAdvChCalbGain_L,
    eAudioAdvChCalbGain_R,
    eAudioAbxFilterSet,
    eAudioAbxDryGainIndx,
    eAudioAbxWetGainIndx,
    eAudioMixsoundGain,
	eAudioMixsoundLength,

#ifdef CC_AUD_SILENCE_SUPPORT
    // add for silence support, should customize to shm.
    eAudioSilenceMode,
    eAudioSilenceFixThreshold,
    eAudioSilenceAttackWait,
    eAudioSilenceAttackFixGain,
    eAudioSilenceReleaseStep,
    eAudioSilenceAttackStep,
#endif

    eAudioAprocEnable,
    eAudioPeqEnable,
    eAudioIsAribDownmix,
    eAudioAacPassthrough,

    eVadDmicPowerOn,
    eVadDmicPDM0Data0,
    eVadDmicPDM1Data0,
    eVadDmicPDMCLK,
    eVadI2sBck,
    eVadI2sLrck,
    eVadI2sSdata,
    // Other GPIO customization
    eExternalStatus,            // 0    bool, 1 to enable loader standby at AC on.
    eStandbySetGpio,            // 207  AC-on detect circuit, only work on IC_AB.
    ePowerStatusGpio,           // 206  AC-on detect circuit, only work on IC_AB.
    eStdbyUsePowerBtnCount,     // 0    Use Power button State to set standby
    eStdbyUsePrevPowerState,    // 0    Use previous power state to set standby
    eStdbyUseVGAStatus,         // 0    Use VGA status to enter standby mode when power key trigger.

    // Boot/PowerDown setup GPIOs, boot set OnVal, PowerDown set !OnVal.
    ePowerLedGpio,              // NULL
    ePowerLedOnVal,             // 0
    eT8032CtrlErrLed,           //NULL
    eT8032CtrlErrLedOnVal,      //NULL
    eBackupLedGpio,             // NULL
    eBackupLedOnVal,            // 0
    ePowerCtrlDelayMs,          // 5 ms.
    ePowerCtrlGpio,             // NULL
    ePowerCtrlOnVal,            // 0
    eDvdCtrlGpio,               // NULL
    eDvdCtrlOnVal,              // 0
    eSupportDarkLed,            // 0
    ePowerLedDarkVal,           // XXX
    eBackupLedDarkVal,          // XXX
    eSpecialWakeupGpio,         // XXX
    eSpecialWakeupOnVal,        // XXX
    eSuspendDramPowGpio,
    eSuspendDramPowPol,
    eWakeupOnWLanGpio,
    eResetWLanGpio,
    eWakeupOnWLanPol,
    eBTWakeupGpio,
    eBTWakeupOnVal,
    eFlagSupportPowerLedOff,    // 0
    eCompanionChipGpio,         // 0    Check Companion chip existed gpio
    eCompanionChipGpioPolarity, // 0
    eFlagBootBlinkingLedSupport,
    eBootBlinkingLed,
    eBootBlinkingLedOnVal,
    eBootBlinkingLedPeriod,

    // MT8292 GPIO support
    eFlagMt8292GpioSupport,     // 0
    eMt8292ResetGpio,
    eMt8292MuteGpio,

    // MT8280 GPIO
    eMt8280ResetGpio,           // 0
    eMt8280ResetGpioPolarity,
    eMT8280CmdAckGpio,
    eMT8280CmdAckGpioPolarity,
    eMT8280SendPanel,

    // EEPROM customization
    eSystemEepromBus,           // 0
    eSystemEepromAddress,       // 0xA0
    eSystemEepromSize,          // 0x800 => 2048 KB.
    eSystemEepromClkDiv,        // 0x200 => 27 Mhz/512.
    eSystemEepromPageSize,      // 8
    eSysEepromWPGpio,
    eSysEepromWPEnablePolarity,
    eSysEepromResetTime,
    eSysEepromEnableRetry,
    #ifdef CC_EEP2EMMC_DUAL_BANK_SUPPORT
	eSystemEepInitHeaderSize,
    eSystemEepHeaderSize,
    #endif

    eHdcpEepromBus,             // 0
    eHdcpEepromAddress,         // 0xA0
    eHdcpEepromSize,
    eHdcpEepromClkDiv,
    eHdcpEepromOffset,
    eHdcpEepromWPGpio,
    eHdcpEepromWPEnablePolarity,

    // HDMI EDID PA address
    eHdmiEdidPARx0,
    eHdmiEdidPARx1,
    eHdmiEdidPARx2,
    eHdmiEdidPARx3,

    eEdidEepromWPGpio,
    eEdidEepromWPEnablePolarity,
    eEdidVgaIndexOffset,
    eEdidVgaSize,
    eEdidVgaStorageSize,
    eEdidHdmiFormatOffset,
    eEdidHdmiLddpOffset,
    eEdidHdmiSize,
    eEepromHdmiEdidOffset ,
    eEdidHdmiStorageSize,
    eEdidMhlFlashId,
    eEdidMhlOffset,
    eEdidMhlStorageSize,
    eEdidHdmi2StandardFlashId,
    eEdidHdmi2StandardOffset,
    eEdidHdmi2StandardStorageSize,
    eEdidHdmi2EnhanceFlashId,
    eEdidHdmi2EnhanceOffset,
    eEdidHdmi2EnhanceStorageSize,
    eEepromHdmiHdcpOffset ,
    eEepromHdmiHdcpSize ,
    eHdmiHdcp22FlashId,
    eHdmiHdcp22Offset ,
    eHdmiHdcp22StorageSize ,
    eHdmiImpCalibOffset,
    eHdmiHpdRTCToggle,

    eEepromVgaEdidOffset ,
    eEepromDtvDriverOffset,
    eEepromDtvDriverSize,
    eEepromNptvDriverOffset,
    eEepromNptvDriverSize,
    eEepromDriverSize,
    eEepromMwOffset,
    eEepromMwSize,
#if 1
    eEepromHDCP2xOffset,
    eEepromHDCP2xSize,
#endif

    eEepromErrorCodeOffset,
    eEepromErrorCodeSize,
    eEepromStateCodeOffset,
    eEepromStateCodeSize,
    eEepromCECMenuLanguageOffset,
    eEepromCECEnableOffset,
    eEepromNHLRCPOffset,
    eEepromCECOneTouchPlayEnableOffset,
    eEepromDataMemOffset,
    eEepromGammaAddr,
    eEepromGammaSize,
    eEepromGammaCheckAddr,
    eEepromGammaCheckAddr1,
    eEepromWatchdogFlagAddr,
    eEepromDIAGFlagAddr,
    eEepromStoreDemoAddr,
    eEepromVLogoAddr,
    eEepromFactoryModeAddr,

    // NOR flash customization
    eNorFlashTotalSize,             // 4*1024*1024 = 4 Mbyte
    eNorFlashLoaderSize,            // 512*1024 =  512 Kbyte
    eNorFlashAppImageSize,          // 3*1024*1024 = 3 Mbyte
    eNorFlashDynamicPartitionSize,  // 3*1024*1024 = 3 Mbyte
    eNorFlashStaticPartitionSize,   // 3*1024*1024 = 3 Mbyte
    eHDCPNorPartId,                 // 0, if 0/1, HDCP on EEPROM, otherwise on NORFlash.
    eVGAEDIDNorPartId,              // 0, if 0/1, vga EDID on EEPROM, otherwise on NORFlash.
    eVGAEDIDNorOffset,              // vga edid offset in the nor partition
    eHDMIEDIDNorPartId,             // 0, if 0/1, hdmi EDID on EEPROM, otherwise on NORFlash.
    eHDMIEDIDNorOffset,             // hdmi edid offset in the nor parition

    // NOR flash partition size customization
    eNorFlashPartSize0,             // if size == 64KB, this partition type = dynamic type.
    eNorFlashPartSize1,             // if size == 64KB, this partition type = dynamic type.
    eNorFlashPartSize2,             // if size == 64KB, this partition type = dynamic type.
    eNorFlashPartSize3,             // if size == 64KB, this partition type = dynamic type.
    eNorFlashPartSize4,             // if size == 64KB, this partition type = dynamic type.
    eNorFlashPartSize5,             // if size == 64KB, this partition type = dynamic type.
    eNorFlashPartSize6,             // if size == 64KB, this partition type = dynamic type.
    eNorFlashPartSize7,             // if size == 64KB, this partition type = dynamic type.
    eNorFlashPartSize8,
    eNorFlashPartSize9,
    eNorFlashPartSize10,
    eNorFlashPartSize11,
    eNorFlashPartSize12,
    eNorFlashPartSize13,
    eNorFlashPartSize14,
    eNorFlashPartSize15,
    eNorFlashPartSize16,
    eNorFlashPartSize17,
    eNorFlashPartSize18,
    eNorFlashPartSize19,
    eNorFlashPartSize20,
    eNorFlashPartSize21,

    // NOR flash partition offset customization
    eNorFlashPartOffset0,
    eNorFlashPartOffset1,
    eNorFlashPartOffset2,
    eNorFlashPartOffset3,
    eNorFlashPartOffset4,
    eNorFlashPartOffset5,
    eNorFlashPartOffset6,
    eNorFlashPartOffset7,
    eNorFlashPartOffset8,
    eNorFlashPartOffset9,
    eNorFlashPartOffset10,
    eNorFlashPartOffset11,
    eNorFlashPartOffset12,
    eNorFlashPartOffset13,
    eNorFlashPartOffset14,
    eNorFlashPartOffset15,
    eNorFlashPartOffset16,
    eNorFlashPartOffset17,
    eNorFlashPartOffset18,
    eNorFlashPartOffset19,
    eNorFlashPartOffset20,
    eNorFlashPartOffset21,

    // NAND flash customization
    eNANDFlashTotalSize,
    eNANDFlashLoaderSize,
    eNANDFlashAppImageSize,
    eNANDFlashDynamicPartitionSize,
    eNANDFlashDynamicPartitionID,
    eNANDFlashStaticPartitionSize,
    eNANDFlashStaticPartitionLastID,
    eHDCPNANDPartId,                    // 0, if 0/1, HDCP on EEPROM, otherwise on NORFlash.
    eVGAEDIDNANDPartId,                 // 0, if 0/1, VGAEDID on EEPROM, otherwise on NORFlash.
    eVGAEDIDNANDOffset,
	eHDMIEDIDNANDPartId,                // 0, if 0/1, VGAEDID on EEPROM, otherwise on NORFlash.
    eHDMIEDIDNANDOffset,

	eHDCP2xNANDPartId,

    // NAND flash partition id
    eNANDFlashPartIdSysImgA,
    eNANDFlashPartIdUpA,
    eNANDFlashPartIdSysImgB,
    eNANDFlashPartIdUpB,
    eNANDFlashPartIdChannelDataA,
    eNANDFlashPartIdChannelDataB,
    eNANDFlashPartIdEepromA,
    eNANDFlashPartIdEepromB,
    eNANDFlashPartEnd,

    // NAND flash partition offset customization
    eNANDFlashPartOffset0,
    eNANDFlashPartOffset1,
    eNANDFlashPartOffset2,
    eNANDFlashPartOffset3,
    eNANDFlashPartOffset4,
    eNANDFlashPartOffset5,
    eNANDFlashPartOffset6,
    eNANDFlashPartOffset7,
    eNANDFlashPartOffset8,
    eNANDFlashPartOffset9,
    eNANDFlashPartOffset10,
    eNANDFlashPartOffset11,
    eNANDFlashPartOffset12,
    eNANDFlashPartOffset13,
    eNANDFlashPartOffset14,
    eNANDFlashPartOffset15,
    eNANDFlashPartOffset16,
    eNANDFlashPartOffset17,
    eNANDFlashPartOffset18,
    eNANDFlashPartOffset19,
    eNANDFlashPartOffset20,
    eNANDFlashPartOffset21,
    eNANDFlashPartOffset22,
    eNANDFlashPartOffset23,
    eNANDFlashPartOffset24,
    eNANDFlashPartOffset25,
    eNANDFlashPartOffset26,
    eNANDFlashPartOffset27,
    eNANDFlashPartOffset28,
    eNANDFlashPartOffset29,
    eNANDFlashPartOffset30,
    eNANDFlashPartOffset31,
#ifdef CC_MTD_SUPPORT_64_PARTITION
    eNANDFlashPartOffset32,
    eNANDFlashPartOffset33,
    eNANDFlashPartOffset34,
    eNANDFlashPartOffset35,
    eNANDFlashPartOffset36,
    eNANDFlashPartOffset37,
    eNANDFlashPartOffset38,
    eNANDFlashPartOffset39,
    eNANDFlashPartOffset40,
    eNANDFlashPartOffset41,
    eNANDFlashPartOffset42,
    eNANDFlashPartOffset43,
    eNANDFlashPartOffset44,
    eNANDFlashPartOffset45,
    eNANDFlashPartOffset46,
    eNANDFlashPartOffset47,
    eNANDFlashPartOffset48,
    eNANDFlashPartOffset49,
    eNANDFlashPartOffset50,
    eNANDFlashPartOffset51,
    eNANDFlashPartOffset52,
    eNANDFlashPartOffset53,
    eNANDFlashPartOffset54,
    eNANDFlashPartOffset55,
    eNANDFlashPartOffset56,
    eNANDFlashPartOffset57,
    eNANDFlashPartOffset58,
    eNANDFlashPartOffset59,
    eNANDFlashPartOffset60,
    eNANDFlashPartOffset61,
    eNANDFlashPartOffset62,
    eNANDFlashPartOffset63,
#endif
    // NAND flash partition size customization
    eNANDFlashPartSize0,
    eNANDFlashPartSize1,
    eNANDFlashPartSize2,
    eNANDFlashPartSize3,
    eNANDFlashPartSize4,
    eNANDFlashPartSize5,
    eNANDFlashPartSize6,
    eNANDFlashPartSize7,
    eNANDFlashPartSize8,
    eNANDFlashPartSize9,
    eNANDFlashPartSize10,
    eNANDFlashPartSize11,
    eNANDFlashPartSize12,
    eNANDFlashPartSize13,
    eNANDFlashPartSize14,
    eNANDFlashPartSize15,
    eNANDFlashPartSize16,
    eNANDFlashPartSize17,
    eNANDFlashPartSize18,
    eNANDFlashPartSize19,
    eNANDFlashPartSize20,
    eNANDFlashPartSize21,
    eNANDFlashPartSize22,
    eNANDFlashPartSize23,
    eNANDFlashPartSize24,
    eNANDFlashPartSize25,
    eNANDFlashPartSize26,
    eNANDFlashPartSize27,
    eNANDFlashPartSize28,
    eNANDFlashPartSize29,
    eNANDFlashPartSize30,
    eNANDFlashPartSize31,
#ifdef CC_MTD_SUPPORT_64_PARTITION
    eNANDFlashPartSize32,
    eNANDFlashPartSize33,
    eNANDFlashPartSize34,
    eNANDFlashPartSize35,
    eNANDFlashPartSize36,
    eNANDFlashPartSize37,
    eNANDFlashPartSize38,
    eNANDFlashPartSize39,
    eNANDFlashPartSize40,
    eNANDFlashPartSize41,
    eNANDFlashPartSize42,
    eNANDFlashPartSize43,
    eNANDFlashPartSize44,
    eNANDFlashPartSize45,
    eNANDFlashPartSize46,
    eNANDFlashPartSize47,
    eNANDFlashPartSize48,
    eNANDFlashPartSize49,
    eNANDFlashPartSize50,
    eNANDFlashPartSize51,
    eNANDFlashPartSize52,
    eNANDFlashPartSize53,
    eNANDFlashPartSize54,
    eNANDFlashPartSize55,
    eNANDFlashPartSize56,
    eNANDFlashPartSize57,
    eNANDFlashPartSize58,
    eNANDFlashPartSize59,
    eNANDFlashPartSize60,
    eNANDFlashPartSize61,
    eNANDFlashPartSize62,
    eNANDFlashPartSize63,
#endif
    // NAND flash partition encypt customization
    eNANDFlashPartEncypt0,
    eNANDFlashPartEncypt1,
    eNANDFlashPartEncypt2,
    eNANDFlashPartEncypt3,
    eNANDFlashPartEncypt4,
    eNANDFlashPartEncypt5,
    eNANDFlashPartEncypt6,
    eNANDFlashPartEncypt7,
    eNANDFlashPartEncypt8,
    eNANDFlashPartEncypt9,
    eNANDFlashPartEncypt10,
    eNANDFlashPartEncypt11,
    eNANDFlashPartEncypt12,
    eNANDFlashPartEncypt13,
    eNANDFlashPartEncypt14,
    eNANDFlashPartEncypt15,
    eNANDFlashPartEncypt16,
    eNANDFlashPartEncypt17,
    eNANDFlashPartEncypt18,
    eNANDFlashPartEncypt19,
    eNANDFlashPartEncypt20,
    eNANDFlashPartEncypt21,
    eNANDFlashPartEncypt22,
    eNANDFlashPartEncypt23,
    eNANDFlashPartEncypt24,
    eNANDFlashPartEncypt25,
    eNANDFlashPartEncypt26,
    eNANDFlashPartEncypt27,
    eNANDFlashPartEncypt28,
    eNANDFlashPartEncypt29,
    eNANDFlashPartEncypt30,
    eNANDFlashPartEncypt31,
#ifdef CC_MTD_SUPPORT_64_PARTITION
    eNANDFlashPartEncypt32,
    eNANDFlashPartEncypt33,
    eNANDFlashPartEncypt34,
    eNANDFlashPartEncypt35,
    eNANDFlashPartEncypt36,
    eNANDFlashPartEncypt37,
    eNANDFlashPartEncypt38,
    eNANDFlashPartEncypt39,
    eNANDFlashPartEncypt40,
    eNANDFlashPartEncypt41,
    eNANDFlashPartEncypt42,
    eNANDFlashPartEncypt43,
    eNANDFlashPartEncypt44,
    eNANDFlashPartEncypt45,
    eNANDFlashPartEncypt46,
    eNANDFlashPartEncypt47,
    eNANDFlashPartEncypt48,
    eNANDFlashPartEncypt49,
    eNANDFlashPartEncypt50,
    eNANDFlashPartEncypt51,
    eNANDFlashPartEncypt52,
    eNANDFlashPartEncypt53,
    eNANDFlashPartEncypt54,
    eNANDFlashPartEncypt55,
    eNANDFlashPartEncypt56,
    eNANDFlashPartEncypt57,
    eNANDFlashPartEncypt58,
    eNANDFlashPartEncypt59,
    eNANDFlashPartEncypt60,
    eNANDFlashPartEncypt61,
    eNANDFlashPartEncypt62,
    eNANDFlashPartEncypt63,
#endif
#ifdef CC_PARTITION_WP_SUPPORT
            //  flash partition write protect  customization
            eNANDFlashPartWp0,
            eNANDFlashPartWp1,
            eNANDFlashPartWp2,
            eNANDFlashPartWp3,
            eNANDFlashPartWp4,
            eNANDFlashPartWp5,
            eNANDFlashPartWp6,
            eNANDFlashPartWp7,
            eNANDFlashPartWp8,
            eNANDFlashPartWp9,
            eNANDFlashPartWp10,
            eNANDFlashPartWp11,
            eNANDFlashPartWp12,
            eNANDFlashPartWp13,
            eNANDFlashPartWp14,
            eNANDFlashPartWp15,
            eNANDFlashPartWp16,
            eNANDFlashPartWp17,
            eNANDFlashPartWp18,
            eNANDFlashPartWp19,
            eNANDFlashPartWp20,
            eNANDFlashPartWp21,
            eNANDFlashPartWp22,
            eNANDFlashPartWp23,
            eNANDFlashPartWp24,
            eNANDFlashPartWp25,
            eNANDFlashPartWp26,
            eNANDFlashPartWp27,
            eNANDFlashPartWp28,
            eNANDFlashPartWp29,
            eNANDFlashPartWp30,
            eNANDFlashPartWp31,
#ifdef CC_MTD_SUPPORT_64_PARTITION
            eNANDFlashPartWp32,
            eNANDFlashPartWp33,
            eNANDFlashPartWp34,
            eNANDFlashPartWp35,
            eNANDFlashPartWp36,
            eNANDFlashPartWp37,
            eNANDFlashPartWp38,
            eNANDFlashPartWp39,
            eNANDFlashPartWp40,
            eNANDFlashPartWp41,
            eNANDFlashPartWp42,
            eNANDFlashPartWp43,
            eNANDFlashPartWp44,
            eNANDFlashPartWp45,
            eNANDFlashPartWp46,
            eNANDFlashPartWp47,
            eNANDFlashPartWp48,
            eNANDFlashPartWp49,
            eNANDFlashPartWp50,
            eNANDFlashPartWp51,
            eNANDFlashPartWp52,
            eNANDFlashPartWp53,
            eNANDFlashPartWp54,
            eNANDFlashPartWp55,
            eNANDFlashPartWp56,
            eNANDFlashPartWp57,
            eNANDFlashPartWp58,
            eNANDFlashPartWp59,
            eNANDFlashPartWp60,
            eNANDFlashPartWp61,
            eNANDFlashPartWp62,
            eNANDFlashPartWp63,
#endif
#endif
    // 8032 customization
    eT8032uPSize,               // 0

    // Reboot reason location in eeprom.
    eRebootEepromAddress,
    eRebootEepromSize,

    // emmc usb upgrade recovery retry count in eeprom.
    eMMCRecoveryEepromAddress,

    // USB Loader polling time in ms.
    eUSBLoaderWaitTime,

    // USB VBUS0 enable
    eUSBVbus0Gpio,
    eUSBVbus0EnablePolarity,

    // USB VBUS1 enable
    eUSBVbus1Gpio,
    eUSBVbus1EnablePolarity,

    // USB VBUS2 enable
    eUSBVbus2Gpio,
    eUSBVbus2EnablePolarity,

    // USB VBUS3 enable
    eUSBVbus3Gpio,
    eUSBVbus3EnablePolarity,

    // USB0 over current flag enable.
    eUSB0OCGpio,
    eUSB0OCEnablePolarity,

    // USB1 over current flag enable.
    eUSB1OCGpio,
    eUSB1OCEnablePolarity,

    // USB2 over current flag enable.
    eUSB2OCGpio,
    eUSB2OCEnablePolarity,

    // USB3 over current flag enable.
    eUSB3OCGpio,
    eUSB3OCEnablePolarity,
    //usb hub reset
	eUSBHubResetGpio,
	eUSBHubResetPolarity,

    // USB Support flag Configure in HW for Loader
    eUSB0LoaderConfig,
    eUSB1LoaderConfig,
    eUSB2LoaderConfig,
    eUSB3LoaderConfig,

	// USB Support flag Configure in HW
	eUSB0Config,
	eUSB1Config,
	eUSB2Config,
	eUSB3Config,

    // USB Delay resume flag
    eUSB0DelayResume,
    eUSB1DelayResume,
    eUSB2DelayResume,
    eUSB3DelayResume,

    // USB HSTERMC impedance control.
    eUSBHSTERMC,

    // USB vbus turn on delay.
    eUSBVbusTurnOnDelay,

    // USB Full speed only enable.
    eUSBFullSpeedOnlyEnable,

    // USB disable suspend mode.
    eUSBDisableSuspendMode,
    eFlagIsUsbLogMode,
    // MSDC gpio
    eMSDC0DetectGpio,
    eMSDC0WriteProtectGpio,
    eMSDC0PoweronoffDetectGpio,
    eMSDC0VoltageSwitchGpio,
    eMSDCbackup1Gpio,
    eMSDCbackup2Gpio,
    // FCI card detect pin
    eFCICardDetectGpio,

    // Button customization
    eFlagButtonSupport,         // 0
    eKeyPadWakeupBit,           // DKBIT_POWER
    eKeyPadPollingTime,         // 50ms
    eKeyPadCheckTime,           // 2

    // P/I Gain customization
    ePIGainSetting,             //PIGain table Modify by W.C Shih
    ePIGainTLSize,              //PIGain table Modify by W.C Shih

    // Auto Check Polarity
    ePolitaryCheck,             // VGA Politary Check Modify by W.C Shih2006/10/30

    eVGAADSpec,                 // VGA AD Spec Modify by W.C Shih 2006/12/01
    eVGAHFreqSpecHeight,        // VGA H-Frequence Modify by W.C Shih 2007/01/08
    eVGAHFreqSpecLow,           // VGA H-Frequence Modify by W.C Shih 2007/01/08
    eVGAVFreqSpecHeight,        // VGA H-Frequence Modify by W.C Shih 2007/01/08
    eVGAVFreqSpecLow,           // VGA H-Frequence Modify by W.C Shih 2007/01/08

    // IRRX customization
    eIrrxType,                  // NEC
    eIrrxKeyUpTimeout,          // 200 ms.
    eIrrxRepeatValidTime,       // 200 ms.
    eIrrxNecMapArraySize,       //
    eIrrxNecPulse1,             // 8, 0xff to disable
    eIrrxNecPulse2,             // 0, 0xff to disable
    eIrrxNecPulse3,             // 0, 0xff to disable
    eIrrxRc5MapArraySize,       //
    eIrrxHotkeyArraySize,       // Hotkey Size
    eIrrxFlagPowerOnWakeup,     //
    eIrrxFlagBlinking,          // 0, flag to blink led when ir receiving.
    eIrrxFlagPrgUpDownWakeup,   // 0, flag to enable IR CH+/- wakeup.
    eIrrxFlagAllWakeup,         // 0, flag to enable all key wakeup.
    eIrrxFlagUserDefineWakeup,  // 0, flag to enable user defined wakeup key settings.
    eIrrxUsrConfig,             // 0x4121
    eIrrxUsrSaperiod,           // 0x0032
    eIrrxUsrThreshold,          // 0x0001
    eUsrIRClkSel,
    eIrrxRepeatPulseUp,         // 5
    eIrrxRepeatPulseDown,       // 2
    eIrrxLedBlinkGpio,
    eIrrxLedBlinkOnVal,
    eIrrxLedBlinkDuration,
    eFlagIrrxSoundSupport,
    eFlagIrrxSoundSupportAlwaysEnable,
    eIrrcCheckRepeatByRaw,      // 0
	eIrrcNfyBlinkCfgChg,
    eIrHotKeyWakeupSupport,
    eIrHotKeyNumEepOffset,

    // Factory
    eFlagFactoryEdid,               // 0
    eFlagFactoryMode2,              // 0
    eMagicMaxInputForceFactory,     // NULL, define the magic char to force factory mode. must > 0x80
    eMagicMinInputForceFactory,     // NULL, define the magic char to force factory mode. must < 0x20

    // SCPOS_SUPPORT_SPECIAL_VGA
    eFlagScposSpecalVGA,            // 0
    eFlagMuteDispFmtChg,

    // Non-linear Scaling Factor
    eFlagScposFixedNonLinearFactor,
    eFlagScposNonLinearSlope,
    eFlagScposNonLinearEndPointRatio,

    // VGA Max Pixel Rate for Dispmode
    eVGAMaxRateForDispmode,

    // VGA Wakeup setting by the external controller
    eVGAMaxHSyncFreqForExtCtrl,
    eVGAMinHSyncFreqForExtCtrl,
    eVGAMaxVSyncFreqForExtCtrl,
    eVGAMinVSyncFreqForExtCtrl,

    // Quality customization
    eAdpBacklightAplDark,           // APL lower bound for auto backlight.
    eAdpBacklightAplBright,         // APL higher bound for auto backlight.
    eFlagBind2DNRWithMpegNR,        // Bind 2D NR With Mpeg NR
    eFlagAutoNR,                    // Auto NR enable toggle.
    eFlagUIQTYLinearMap,            // Use Linear Calculation instead of Using Min,Def,Max Directly
    eFlagBindContrastSaturation,    // Bind Contrast and Saturation
    eFlagDolbyCfgPartition,			// DolbyCfg  partition for NAND flash
    eFlagFlashPqEnable,             // FlashPQ enable toggle.
    eFlashPqUseNandFalsh,           // FlashPQ base partition for NAND flash
    eFlashPqBasePartition,          // FlashPQ base partition for NAND flash
    eFlashPqBaseAddress,            // FlashPQ base address, 0x28??????
    eFlashPqOffset,                 // FlashPQ additional offset address.
    eFlashPqBlockSize,              // FlashPQ block size, unit: 64KB.
    eFlagFlashPqEnableGamma,        // FlashPQ load gamma from image.
    eFlagFlashPqEnableSCE,          // FlashPQ load SCE from image.
    eFlagFlashPqEnableQty,          // FlashPQ load Qty table from image.
    eFlagFlashPqEnableQtyMaxMin,    // FlashPQ load min/max table from image.
    eFlagFlashPqEnableQtySmartPic,  // FlashPQ load smartPic table from image.
	eFlagFlashPqQtySmartPicNewMode,	// FlashPQ smartpic new mode
    eFlagFlashPqSmartPicOffset,     // FlashPQ additional image offset for smartPic.

    eFlagFlashPqSCEMax,             // FlashPQ Use Base and Max to Calculate SCE
    eFlagFlashPqSCEMin,             // FlashPQ Use Base and Min to Calculate SCE

    eFlagFlashPanelEnable,

    eFlashPq2ndpartBasePartition,           // FlashPQ base partition for NAND flash
    eFlashPq2ndpartBaseAddress,             // FlashPQ base address, 0x28??????
    eFlashPq2ndpartOffset,                  // FlashPQ additional offset address.
    eFlashPq2ndpartBlockSize,               // FlashPQ block size, unit: 64KB.
    eFlagFlashPq2ndpartEnableGamma,         // FlashPQ load gamma from image.
    eFlagFlashPq2ndpartEnableSCE,           // FlashPQ load SCE from image.
    eFlagFlashPq2ndpartEnableQty,           // FlashPQ load Qty table from image.
    eFlagFlashPq2ndpartEnableQtyMaxMin,     // FlashPQ load min/max table from image.
    eFlagFlashPq2ndpartEnableQtySmartPic,   // FlashPQ load smartPic table from image.
    eFlagFlashPq2ndpartQtySmartPicNewMode,  // FlashPQ smartpic new mode

    eFlagLinkM4ContrastSaturation,          // Link matrix4 saturation with contrast.
    eFlagGain1AsColorTemp,
    eFlagVideoLvlExtPosition,       // 0: RGB gain1 as video level extend; RGB gain2 as color temp.
                                    // 1: Matrix4 as video level extend; RGB gain1 as color temp.
                                    // 2: Matrix4 as video level extend; RGB gain2 as color temp.

    eBrightInterval,        // Brightness Register Value = 0x400 + (Dummy - 0x80) << (BIRGHT_INTERVAL)
    eHueInterval,           // SCE Hue Register Value = 0x200 + (Dummy - 0x80) << (HUE_INTERVAL)
    eFlagUseMatrixPQAdj,    // Use OS matrix for global Cont/Bri/Sat/Hue adjustment
    eFlagxvYCCClip,         // Clip to RGB unsign 10 bit after xvYCC
    eOSOptionPos,           // Set OS RGB Gain/Gamma position
    eMatrixHDYCbCr709,      // Use YCbCr709 color space in video path for HD timing
    eSupportHdmiYCbCr444,   // Support YCbCr444 format in video path for HDMI input
    eSupportVgaYCbCr444,    // Support YCbCr444 format in video path for VGA input
    eShareBnrHwCfg,         // Use HW BNR setting for BNR FW

    eNVMGamma,              // Read gamma from EEPROM
    eCustSetGammaTopPoint,  // Costomization of Gamma toppest point
    eFlagControlBacklightPWM,
    eFlagSupportOD,

    // RTC external H/W Option
    eRtcHw,
    eRtcExtIntGpio,
    eRtcExtClkDiv,

    // SCART FS Status Servo ADC
    eScart1FSServoAdc,
    eScart2FSServoAdc,

    // CEC
    eCECFunctionPinmuxEn,

    // HDMI
    eHDMISupportExtSwitch,
    eHDMIBypassInitialFlow,
    eHDMIOffOnMuteCount,
    eDVIWaitStableCount,
    eDVIWaitNosignalCount,
    eDVIWaitSCDTStableCount,
    eHDMIEQZEROVALUE,   // josh
    eHDMIEQBOOSTVALUE,  // josh
    eHDMIEQSELVALUE,
    eHDMIEQGAINVALUE,
    eHDMILBWVALUE,
    eHDMIHDCPMASK1,
    eHDMIHDCPMASK2,
    eMHLVBUSCtrlGpio,
    eMHLOCPDetGpio,
    eHDMIEQ_LOW1_KPGAIN,
    eHDMIEQ_LOW1_RXMODE,
    eHDMIEQ_LOW1_EQGAIN,
    eHDMIEQ_LOW1_ZSEL,
    eHDMIEQ_LOW1_VREF,
    eHDMIEQ_LOW2_KPGAIN,
    eHDMIEQ_LOW2_RXMODE,
    eHDMIEQ_LOW2_EQGAIN,
    eHDMIEQ_LOW2_ZSEL,
    eHDMIEQ_LOW2_VREF,
    eHDMIEQ_MIDDLE_KPGAIN,
    eHDMIEQ_MIDDLE_RXMODE,
    eHDMIEQ_MIDDLE_EQGAIN,
    eHDMIEQ_MIDDLE_ZSEL,
    eHDMIEQ_MIDDLE_VREF,
    eHDMIEQ_HIGH_KPGAIN,
    eHDMIEQ_HIGH_RXMODE,
    eHDMIEQ_HIGH_EQGAIN,
    eHDMIEQ_HIGH_ZSEL,
    eHDMIEQ_HIGH_VREF,

    // Run on NOR flash or not
    eFlagRunOnNor,
	eHDMIPortMappingHDMI1,//fll
    eHDMIPortMappingHDMI2,//fll
    eHDMIPortMappingHDMI3,//fll
    eHDMIPortMappingHDMI4,

    // TVD
    eTVDSupportNTSCOnly,
    eTVDSupportPedEn,
    eTVDPalNtscMixAutosearch,
    eTVDLLockFreeRun,
    eTVDCCNRLThresholdBlock,    //block CC if NRL beyong this,  (range: 0~80)
    eTVDCCNRLThresholdUnblock,  //unblock CC if NRL below this, (range: 0~eTVDCCNRLThresholdBlock)
    eTVDCCPERThresholdBlock,    //block CC if PER beyong this,  (range: 0~128)
    eTVDCCPERThresholdUnblock,  //unblock CC if PER below this, (range: 0~eTVDCCPERThresholdBlock)
    eTVDSupportOutput216,
    eTVDSupportEFuseCVBS,
    eTVDSupportEFuseCVBSOffset,
    eTVDUseVPres4,
    eTVDScan_Diff_Min_TH,                   //Auto Search Diff Min TH
    eTVDMenu_Av_Delay_PAL_N,                //PAL_N H Porch Value
    eTVDMenu_Av_Delay_PAL,                  //PAL H Porch Value
    eTVDMenu_Av_Delay_PAL_M,                //PAL_M H Porch Value
    eTVDMenu_Av_Delay_NTSC358,              //NTSC358 H Porch Value
    eTVDMenu_Av_Delay_SECAM,                //SECAM H Porch Value
    eTVDMenu_Av_Delay_PAL_60,               //PAL_60 H Porch Value
    eTVDMenu_Av_Delay_NTSC443,              //NTSC443 H Porch Value
    eTVDMenu_Av_Delay_SV_CS_UNSTABLE,       //SV_CS_UNSTABLE H Porch Value
    eTVDMenu_Av_Delay_SHNA_PAL_N,           //SHNA PAL_N H Porch Value
    eTVDMenu_Av_Delay_SHNA_PAL,             //SHNA PAL H Porch Value
    eTVDMenu_Av_Delay_SHNA_PAL_M,           //SHNA PAL_M H Porch Value
    eTVDMenu_Av_Delay_SHNA_NTSC358,         //SHNA NTSC358 H Porch Value
    eTVDMenu_Av_Delay_SHNA_SECAM,           //SHNA SECAM H Porch Value
    eTVDMenu_Av_Delay_SHNA_PAL_60,          //SHNA PAL_60 H Porch Value
    eTVDMenu_Av_Delay_SHNA_NTSC443,         //SHNA NTSC443 H Porch Value
    eTVDMenu_Av_Delay_SHNA_SV_CS_UNSTABLE,  //SHNA SV_CS_UNSTABLE H Porch Value
    eTVDMenu_Av_V_Delay,                    //V Porch Value
    eTVDTgt_Sync_Height_625,                //PAL Sync Height
    eTVDTgt_Sync_Height_525,                //NTSC Sync Height
    eTVDPAL_Ip_Tgt_A,
    eTVDPAL_Ip_Tgt_B,
    eTVDNTSC_Ip_Tgt_A,
    eTVDNTSC_Ip_Tgt_B,
    eTVDNTSC_J_Ip_Tgt_A,
    eTVDNTSC_J_Ip_Tgt_B,
    eTVDSECAM_Ip_Tgt_A,
    eTVDSECAM_Ip_Tgt_B,
    eTVD_BstLock_Thr1_LN_525,  //Low NA burst lock --> unlock
    eTVD_BstLock_Thr2_LN_525,  //Low NA burst unlock --> lock
    eTVD_BstLock_Thr1_HN_525,  //High&Super NA burst lock --> unlock
    eTVD_BstLock_Thr2_HN_525,  //High&Super NA burst unlock --> lock
    eTVD_BstLock_Thr1_LN_625,  //Low NA burst lock --> unlock
    eTVD_BstLock_Thr2_LN_625,  //Low NA burst unlock --> lock
    eTVD_BstLock_Thr1_HN_625,  //High&Super NA burst lock --> unlock
    eTVD_BstLock_Thr2_HN_625,  //High&Super NA burst unlock --> lock
    eTVD_BstLock_Thr1_PAL_N,   //High&Super NA burst lock --> unlock
    eTVD_BstLock_Thr2_PAL_N,   //High&Super NA burst unlock --> lock
    eTVD_SCkill_UP,            //Secam CKILL UP TH
    eTVD_SCkill_DN,            //Secam CKILL DN TH

    // SCART
    eSCART1FBInSelect,
    eSCART2FBInSelect,
    eScart1Type,
    eScart2Type,
    eScart1IntScCh,
    eScart2IntScCh,

    // MT8295
    eMT8295ResetGpio,
    eMT8295DrivingCurrent,
    eMT8295TSDrivingCurrent,
    eMT8295PBIDrivingCurrent,
    eCI_PMX_CFG,
    eMT8295IntGpio,
    eCI5VPowerOnGpio,
    eCI5VPowerOnPolarity,
    eCI5VOcGpio,
    eCI5VOcPolarity,
    eCISysClock,
    eCITsClock,
    eCISpiClock,

    // Smart Card
    eSMCHotplugGpio,
    eSMCHotplugGpioPolarity,

    // UART
    eUART1Support,
    eUART2Support,

    // VGA AD Spec
    eVFE_HW_SPECIAL_TARGET,
    eVFE_HW_YPbPrMapToVGA,
    eVGAADSPECSupport,
    eVFE_HW_075ohm,
    eYPBPR_ADC_SUPPORT_120,
    eDoAutoPhaseAfterAutoColor,
    eSCART_DO_AUTOCOLOR,                 //MC20081115 add for SCART
    eEFuseAutocolor,
    eAUTOCOLOR_FAIL_SHOW_PATTERN,
#ifdef CC_YPBPR_ADAPTIVE_SLICER_REDUCE_TIME
    eYDetect_GPIO,
#endif

    // SCART RGB
    eSCARTRGBOrder,
    eSCARTPin8LowThres,
    eSCARTPin8HiThres,

    // ON_CHIP_AUTO_COLOR
    eOnChipAutoColor,
    eMtkPublicVersion,
    eOnChipYPbPrCounterAddr,
    eOnChipVGACounterAddr,
    eOnChipOffsetCounter,

#if 0
    // Notification function
    eNotifyFEColorSystem,
    eNotifyFECombFilter,
    eNotifyFESoundSys,
    eNotifyAFSoundProperties,
    eNotifyAFDRCAllowed,
#endif

    // Trustzone customization.
    eTrustzoneEnable,
    eTzCodeBase,
    eTzFlashPartition,

    // Linux memory usage related customization
    eLinuxKernelMemSize,
    eTotalMemSize,
    eFBMemSize,
    eDirectFBMemSize,
    eTotalchBMemSize,
    e_config_osd_plane1_mem_size,
    e_config_osd_plane2_mem_size,
    e_config_osd_plane3_mem_size,
    e_config_osd_plane4_mem_size,
    e_config_osd_plane5_mem_size,
    e_config_osd_3d_plane1_mem_size,
    e_config_osd_3d_plane2_mem_size,
    e_config_osd_3d_plane3_mem_size,
    e_config_osd_3d_plane4_mem_size,
    e_config_osd_3d_plane5_mem_size,
    e_config_osd_dec_plane1_mem_size,
    e_config_osd_dec_plane2_mem_size,
    e_config_osd_dec_plane3_mem_size,
    e_config_osd_dec_plane4_mem_size,
    e_config_osd_dec_plane5_mem_size,
    e_config_gfx_temp_mem_size,
    eDmxSharedMemSize,
    eReservedMemSize,
    eTrustzoneMemSize,

    // SIF
    eSifEnableSclStretch,
    eSifDisableOpenDrain,
    eSifEnablePdwncMaster,
    eSifEnablePdwncMaster1,
    eSifcfgFixClkDiv,

    // Support Function Query
    eIsSupportDivX,
    eIsSupportMP2,
    eIsSupportMPEG4,
    eIsSupportVC1,

    // Driver Logo
    eDrvLogoEnable,
    eDrvLogoWidth,
    eDrvLogoHeight,
    eDrvLogoColorMode,
    eDrvLogoVdecEnable,
    eDrvLogoVdecDefault,
    eDrvLogoVdecMode,
    eDrvLogoVdecDataAddr,
    eDrvLogoVdecDataSize,
    eDrvLogoVdecFlashAddr,
    eDrvLogoVdecFlashSize,
    eDrvLogoVdecFlashSlotNum,
    eDrvLogoVdecFlashDevId,
    eDrvLogoVdecTimeStartDelay, // to control sync with audio sound. Ex. 0 (ms)
    eDrvLogoVdecTimeFadeIn,     // alpha: 0 -> 255 duration. Ex. 1000 (ms)
    eDrvLogoVdecTimeDisplay,    // alpha: 255 duration. Ex. 1000 (ms)
    eDrvLogoVdecTimeFadeOut,    // alpha: 255 -> 0 duration. Ex. 1000 (ms)
    eDrvLogoEarlyReturnCounter,

    eTVESupportAFD,

    eCountryDefaultSetting,
    eCountryFromEEPROM,         // Save target country information in EEPROM
    eCountryEEPROMOffset1,
    eCountryEEPROMOffset2,
    eCountryEEPROMOffset3,

    eDDDSErrorLimit,
    eDDDSLockOnOthers,
    eFrameTrackMode,
    eFrameTrackStableCnt,

    eDISP_RLVDSEncodeLink,
    eDmxFramerSet0PostiveEdge,
    eDmxFramerSet0ExternalSync,
    eDmxFramerSet0ParallelInput,
    eDmxFramerSet1PostiveEdge,
    eDmxFramerSet1ExternalSync,
    eDmxFramerSet1ParallelInput,

    // sunman_viq
    eAudioVIQRefLvl,
    eAudioVIQMode,
    eAudioVIQMaxGain,
    eAudioVIQInputGain,
    eAudioVIQOutputGain,
    eAudioVIQNoiseTh,

    // sunman_peq
    eAudioSRSPeqHpfFactory,
    eAudioSRSPEQInputGain,
    eAudioSRSPEQOutputGain,
    eAudioSRSPEQBands,
    eAudioMtkHpfFc,
    eAudioMtkHpf2Fc,

    // sunman_lmt
    eAudioSRSLmtInputGain,
    eAudioSRSLmtOutputGain,
    eAudioSRSLmtRefBoost,
    eAudioSRSLmtRefLevel,
    eAudioSRSLmtRefDelay,
    eAudioSRSLmtRefCoeff,
    eAudioSRSLmtRefThresh,

   // bofeng_aeq
	eAudioSRSAeqInputGain,
	eAudioSRSAeqOutputGain,
	eAudioSRSAeqFilterSize,

    // Gfx FB partition size
    eGfxFBPartitionSize,

    // 3D Enable GPIO
    e3DEnableGPIO,
    e3DLRPin,
    e3GlassResetGPIO,
    e3DLRPinFunc,
#ifdef CC_PHP_SUPPORT
	e2D3DSelGPIO,
	e3DIRTXPinSel,
#endif
    // PCIE reset gpio
    ePcieResetGpio,       // Low = reset, high = release.

    // CC_AUD_QUERY_VDO_INFO
    eAudioVdoDelayTableDtv,
    eAudioVdoDelayTableHdmi,
    eAudioExtraMute,

    eHidKbCountry,
    // HDMI HPD NUM
    eHDMIHPD0GPIONUM,
    eHDMIHPD1GPIONUM,
    eHDMIHPD2GPIONUM,
    eHDMIHPD3GPIONUM,

    eDisplayOffCtrlByAp,
    eDisplayOffCtrlByDriver,

#ifdef CC_PAA_GET_COUNTRY_SUPPORT
	ePaaCountrySetFunc,
	ePaaCountryGetFunc,
#endif
// BE
#ifdef CC_MAPLE_BE_LOADER_BOOT_FLOW
    eBELBootPowerOnGpio,
    eBELBootPowerOnPolarity,
    eBELBootUpNotifyGpio,
    eBELBootUpNotifyGpioPolarity,
    eBELBootVx1ReqGpio,
    eBELBootVx1ReqGpioPolarity,
    eBELBootPnlPwrNotifyGpio,
    eBELBootPnlPwrNotifyGpioPolarity,
    eBELBootXPqResetGpio,
    eBELBootXPqResetGpioPolarity,
    eBELFrameCfgTbl,
    eBELFrameCfgTblSize,
    eBELPartitionId,
    eBELMinfPartitionId,
#endif
//SPQ
#ifdef CC_MAPLE_CUST_DRV
	eSPQDPartition,
	eSPQCPartition,
#endif
#ifdef CC_COMBINE_4K_2K
	eGet2KModelSupport,
    eGet4KModelBEType,
    eGetFRCType,
    eGetPQType,
	eGetAllInOneSeries,
	eGetIlluminationLEDType,
	eGetFPKeyType,
#endif
    eGetInterMemcType,
#if defined (CC_ENABLE_MTK_MODEL_INDEX)
    eModelIndexOffset1,         // option
    eModelIndexOffset2,         // option
    eModelIndexOffset3,         // option
#endif

	eThermalRebootTemp,
	eThermalInfoTriggerHot,
	eThermalInfoTriggerHot2Nor,
	eThermalInfoTriggerCold2Nor,
	eThermalInfoTriggerCold,

    eThermalCpufreqHot,
    eThermalCpufreqNor,
    eThermalCpufreqCold,

#ifdef CC_CUSTOM_PMIC_I2C_SUPPORT
	eGetVCPUdevaddr,
	eGetVCPUdataddr,
	eGetVCPUmodaddr,
	eGetVCPUmodmask,
	eGetVCPUmodepwm_en,
	eGetVCPUvmin,
	eGetVCPUvmax,
	eGetVCPUvstep,
	eGetVCPUchannelid,
	eGetVGPUdevaddr,
	eGetVGPUdataddr,
	eGetVGPUmodaddr,
	eGetVGPUmodmask,
	eGetVGPUmodepwm_en,
	eGetVGPUvmin,
	eGetVGPUvmax,
	eGetVGPUvstep,
	eGetVGPUchannelid,
#endif
    //#ifdef CC_QHB_UPGRADE_SUPPORT
    #if 0
    #ifdef  CC_MTK_LOADER
    eIrrxLoaderIrqInit,   //for loader IR
    #endif
	#endif
	eBackLightMuteGpio,
    eBackLightMuteOnVal,
    ePanelPower1Gpio,
    ePanelPower1OnVal,
    ePanelPower2Gpio,
    ePanelPower2OnVal,
	eWfdHdcp22FlashId,
	eWfdHdcp22Offset ,
    eHdmiEARCEnable,
    eGetTrialLv,

    eWakeupOnEWBSGpio, //For EWBS
    eWakeupOnEWBSPol,
	eGetSeries,
    eGetExtDecModel,
    eDramResetGpio,
    eLastOne
} QUERY_TYPE_T;

typedef enum
{
    eStart3000 = 3000,

    // Common information
    eBuildDate,                 // __DATE__
    eBuildTime,                 // __TIME__
    eBrdCstIf,                  // $(BRDCST_IF)
    eDrvCust,                   // $(DRV_CUST)

    // Dram setting
    eDramAgentPriority,         // priority list

#ifdef CC_DRAM_PRIORITY_LIST_BY_CH
    eDramAgentPriorityCHB,      // priority list CHB
    eDramAgentPriorityCHC,      // priority list CHC
#endif

    // USB upgrade setting
    eUsbUpgradeFileName,                // upgrade.pkg
    eUsbUpgradeGoldenFileName,          // upgrade.golden
    eUsbUpgradeFileNamePrefix,          // mtk
    eUsbUpgradeFileNameSuffix,          // .bin
	eUsbUpgradeGolednFileNameSuffix,	// .golden
    #ifdef CC_C4TV_AUTO_PROCESS
    eUsbUpgradeFileNamePrefixOta,       // ota
    eUsbUpgradeFileNameSuffixOta,       //.zip
    #endif
    eLoaderUpgradeBreakFunc,            // NULL
    eLoaderUpgradeVerCmpFunc,           // NULL
    eLoaderUpgradeDlmCbFunc,            // NULL
    eLoaderUpgradeDlmGetTagVerCbFunc,   // NULL
	eLoaderUpgradeDlmSetTagVerCbFunc,	// NULL
    eLoaderUpgradeDlmCmpTagVerCbFunc,   // NULL
    #ifdef CC_LDR_ATOMIC_MODE_SUPPORT
    eLdrAtomicUpgFileName,                // bootimg.atomic
    eLdrAtomicUpgFileNamePrefix,          //bootimg
    eLdrAtomicUpgFileNameSuffix,          //atomic
    #endif

    // Loader Misc
    eLoaderEnvInitFunc,         // NULL
    eLoaderCustFDRRstFunc,      //NULL
    eLoaderCECConfigQueryFunc,
    eLoaderUpgradeCheckFunc,    // NULL
    eLoaderCheckStandByFunc,    // NULL

    // Loader logo
    eLoaderLogoWidthArray,      // NULL
    eLoaderLogoHightArray,      // NULL
    eLoaderLogoDataIdx0,        // LOADER_LOGO_DATAIDX0 in XXX_bootlogo.h
    eLoaderLogoDataIdx1,        // LOADER_LOGO_DATAIDX1 in XXX_bootlogo.h
    eLoaderLogoDataIdx2,        // LOADER_LOGO_DATAIDX2 in XXX_bootlogo.h
    eLoaderLogoDataIdx3,        // LOADER_LOGO_DATAIDX3 in XXX_bootlogo.h
    eLoaderLogoDataIdx4,        // LOADER_LOGO_DATAIDX4 in XXX_bootlogo.h
    eLoaderLogoDataIdx5,        // LOADER_LOGO_DATAIDX5 in XXX_bootlogo.h
    eLoaderLogoDataIdx6,        // LOADER_LOGO_DATAIDX6 in XXX_bootlogo.h
    eLoaderLogoDataIdx7,        // LOADER_LOGO_DATAIDX7 in XXX_bootlogo.h
    eLoaderLogoDataIdx8,        // LOADER_LOGO_DATAIDX8 in XXX_bootlogo.h
    eLoaderLogoDataIdx9,        // LOADER_LOGO_DATAIDX9 in XXX_bootlogo.h
    eLoaderPanelLogoCheckFunc,  //NULL
	eLoaderImgDecompressionFunc,	//NULL

    // Panel customization
    ePanelIndexFromGpioMap,     // option
    ePanelLvds8bitPinMap,       // option
    ePanelLvds10bitPinMap,      // option
    ePanelLvds10bitPNSwap,      // option

    // Audio customization
    eAudioAoutPadConfig,
    eAudioDacUsage,
    eAudioAeq5BandTable,
    eAudioMtsFactory,
    eAudioA2Factory,
    eAudioPalFactory,
    eAudioDigitalDataConfig,
    eAudioIecChannelStatusBySource,
    eAudioIecWordLength,
    eAudioIecCategory,
    eAudioIecCopyright,
    eAudioChannelDelay,
    eAudioInputSrcAgcFlag,
    eAudioInputSwGpioSel,
    eAudioInputMuxSelTable,
    eAudioOutFmtTable,
    eAudioOutFmtTable2,
    eAudioOutFmtTable3,
    eAudioInFmtTable,
    eAudioInputVolTable,
    eAudioAvInputSrcVolTable,
    eAudioAvChlEqTable,
    eAudioAvChlEqCoefTable,
    eAudioBassTrebleCoefTable,
    eAudioVSModeCfg,
    eAudioInputSrcAgcVol,
    eAudioVolTable,
    eAudioChannelVolTable,
    eAudioAvcTarget,
    eAudioAvcGainUp,
    eAudioAvcAdjustRate,
    eAudioAvcUiAdjustRate,
    eAudioChlVolExtraGain,
    eAudioVolumeOffset,
    eCiCustomQueryFunc,
    eAudioInterDacChlConfig,

    // Driver Logo
    eDrvLogoBmpAddr,
    eDrvLogoPalAddr,

    // Other GPIO customization
    eGpiotimerInitFunc,         // NULL

    // Boot/PowerDown setup GPIOs, boot set OnVal, PowerDown set !OnVal.
    eGpioPowerOnFunc,           // GPIO_MtkPowerOnFunc()
    eGpioPowerOffFunc,          // GPIO_MtkPowerOffFunc()
    eGpioLedCtrlFunc,           // GPIO_MtkLedCtrlFunc()
	eGpioPowerOffSelfDiagShutDownfunc,	// CustomPowerOffSelfDiagShutDown()

    // Button customization
    eSingleGpioKeyList,         // NULL
    eSingleServoKeyList,        // NULL
    eGreedGpioKeyList,          // NULL
    eMultiKeyList,
    eCombKeyList,

    // IRRX customization
    eIrrxNecKeyMap,             // All NEC key maps
    eIrrxRc5KeyMap,             // All RC5 key maps
    eIrrxHotkeyArray,           // Hotkey Array
    eIrrxRc5KeyMapFunc,         // NULL, Key map function
    eIrrxRc6KeyMapFunc,         // NULL, Key map function
    eIrrxXferUsrToCrystalFunc,  // NULL, Raw data to Key xfer function.
	eIrrxUsrGetCystalKeyFunc,
    eIrrxSetUsrWakeupKeyFunc,   // NULL, Set wakeup key in PDWNC register
    eIrrxSetUsrNotifyFunc,
    eIrrcIsUsrLongPress,
    eSetSignalUsrNotifyFunc,
    // 8032 customization
    eT8032uPOffset,
    eT8032uPDualOffset,
#if 0
    // Notification function
    eNotifyMuteFunc,
    eNotifyMixerVideoLayerFunc,
    eNotifyMixerFunc,
#endif
    eNotifyVideoPropertyFunc,
    eNotifyVideoAutoDoneFunc,

    // system setting
    eCustomerPassword,
    eCustomerName,

    // SIF
    eSifCfgPinSetFunc,
    eSifCfgGetConfigFunc,

    ePowerStateQueryFunc,
    eCustomerPowerOnSequence,
    eCustomerPowerOffSequence,
    eCheckFrcInitStatus,
    eReadFRCVersionFromPanel,
    eFRCUnmute,
    eEnterFRCRegisterMode,
    eExitFRCRegisterMode,
    eEnableFRCVx1Out,
    eDisableFRCVx1Out,

    eDmxFrontendConfigTable,
    eDmxScrambleDetectTable,
#ifdef CC_S_PLATFORM
    eDmxFrontendExtConfigTable,
    eDmxFrontendIntConfigTable,
#endif

    #ifdef CC_PAA_GET_COUNTRY_SUPPORT
	ePaaCountrySetFunc,
	ePaaCountryGetFunc,
    #endif

    // NAND flash partition name customization
    eNANDFlashPartName0,
    eNANDFlashPartName1,
    eNANDFlashPartName2,
    eNANDFlashPartName3,
    eNANDFlashPartName4,
    eNANDFlashPartName5,
    eNANDFlashPartName6,
    eNANDFlashPartName7,
    eNANDFlashPartName8,
    eNANDFlashPartName9,
    eNANDFlashPartName10,
    eNANDFlashPartName11,
    eNANDFlashPartName12,
    eNANDFlashPartName13,
    eNANDFlashPartName14,
    eNANDFlashPartName15,
    eNANDFlashPartName16,
    eNANDFlashPartName17,
    eNANDFlashPartName18,
    eNANDFlashPartName19,
    eNANDFlashPartName20,
    eNANDFlashPartName21,
    eNANDFlashPartName22,
    eNANDFlashPartName23,
    eNANDFlashPartName24,
    eNANDFlashPartName25,
    eNANDFlashPartName26,
    eNANDFlashPartName27,
    eNANDFlashPartName28,
    eNANDFlashPartName29,
    eNANDFlashPartName30,
    eNANDFlashPartName31,
#ifdef CC_MTD_SUPPORT_64_PARTITION
    eNANDFlashPartName32,
    eNANDFlashPartName33,
    eNANDFlashPartName34,
    eNANDFlashPartName35,
    eNANDFlashPartName36,
    eNANDFlashPartName37,
    eNANDFlashPartName38,
    eNANDFlashPartName39,
    eNANDFlashPartName40,
    eNANDFlashPartName41,
    eNANDFlashPartName42,
    eNANDFlashPartName43,
    eNANDFlashPartName44,
    eNANDFlashPartName45,
    eNANDFlashPartName46,
    eNANDFlashPartName47,
    eNANDFlashPartName48,
    eNANDFlashPartName49,
    eNANDFlashPartName50,
    eNANDFlashPartName51,
    eNANDFlashPartName52,
    eNANDFlashPartName53,
    eNANDFlashPartName54,
    eNANDFlashPartName55,
    eNANDFlashPartName56,
    eNANDFlashPartName57,
    eNANDFlashPartName58,
    eNANDFlashPartName59,
    eNANDFlashPartName60,
    eNANDFlashPartName61,
    eNANDFlashPartName62,
    eNANDFlashPartName63,
#endif
#if (defined(CC_HK_CUST) || defined(CC_CP_CUST))&&defined(CC_S_PLATFORM)
	eUsbUpgradeViaDramBufAddr,
	eUsbUpgradeViaDramBufSize,
#endif
    eHEAACDefaultDialnorm,
    eCustomerCCIRStatusGet,
    eCustomerCCIRStatusSet,
    eDrvTurnOnPanel,
    eDrvTurnOffPanel,
    eDrvTurnOnBacklt,
    eDrvTurnOffBacklt,
    ePanelIsOnFunc,
    ePanelSetPanelPower1OnFunc,
    ePanelSetPanelPower1OffFunc,
    ePanelSetPanelPower2OnFunc,
    ePanelSetPanelPower2OffFunc,
    ePanelSetBackLightMuteOnFunc,
    ePanelSetBackLightMuteOffFunc,
    eGpioPowerSetExtDecModelfunc,
    eEnd3000
} QUERY_UPTR_T;

#endif /* defined(CC_NAND_BOOT) && defined(CC_MTK_PRELOADER) */


typedef enum _LVDS_MODE
{
    eLvdsVidNormal        = 0,      // (mode 0) Video normal mode
    eLvdsVidYuv422OnePort = 1,      // (mode 1) Video YUV 422 one-channel
    eLvdsVidRgb444OnePort = 2,      // (mode 2) Video RGB 444 one-channel
    eLvdsVidYuv422TwoPort = 3,      // (mode 3) Video YUV 422 two-channel
    eLvdsVidRgb444TwoPort = 4,      // (mode 4) Video RGB 444 two-channel
    eLvdsVidYuv422OnePort8Bit = 5,  // (mode 5) Video YUV 422 one-channel
    eLvdsVidRgb444OnePort8Bit = 6,  // (mode 6) Video RGB 444 one-channel
    eLvdsVidYuv422TwoPort8Bit = 7   // (mode 7) Video YUV 422 two-channel
} LVDS_MODE_T;

typedef enum _LVDS_COLOR_DOMAIN
{
    eColorDomainYUV = 1,
    eColorDomainRGB = 2
} LVDS_COLOR_DOMAIN_T;

typedef enum
{
    VDP_ARG_BACKLT_UI,
    VDP_ARG_BACKLT_DBL,
    VDP_ARG_BACKLT_LIGHT_SNSR,
    VDP_ARG_BACKLT_OPC,
    VDP_ARG_BACKLT_SYSTEM_SET,
    VDP_ARG_BACKLT_MAX
} BACKLIGHT_SRC_INDEX;

//-----------------------------------------------------------------------------
// Dram enum
//-----------------------------------------------------------------------------
enum
{
    COL_ADDR_MIN = 7,
    COL_ADDR_BIT_8,     ///< Dram chip column address 8 bit setting
    COL_ADDR_BIT_9,     ///< Dram chip column address 9 bit setting
    COL_ADDR_BIT_10,    ///< Dram chip column address 10 bit setting
    COL_ADDR_BIT_11,    ///< Dram chip column address 10 bit setting
    COL_ADDR_MAX
};

// DDR type definitions
#define DDR_MIN_VAL     	0
#define DDR_LP4_x4 	     1
#define DDR_LP4_x6 	     2
#define DDR_LP4_x6_4       3
#define DDR_LP4_x6_2          	4
#define DDR_II_x2           5
#define DDR_II_x3           6
#define DDR_II_x4			7
#define DDR_III_x1         	8
#define DDR_III_x2          9
#define DDR_III_x3          10
#define DDR_III_x4 			11
#define DDR_III_x5 			12
#define DDR_IV_x4 			13
#define DDR_IV_x3 			14
#define DDR_MAX_VAL     	15


enum
{
    LVDS_AO0 = 0,
    LVDS_AO1 = 1,
    LVDS_AO2 = 2,
    LVDS_AO3 = 3,
    LVDS_AO4 = 4,
    LVDS_AE0 = 5,
    LVDS_AE1 = 6,
    LVDS_AE2 = 7,
    LVDS_AE3 = 8,
    LVDS_AE4 = 9,
    LVDS_ACLK1 = 0xa,
    LVDS_ACLK2 = 0xb,
    LVDS_ADEFAULT = 0xf
};

enum
{
    LVDS_BO0 = 0,
    LVDS_BO1 = 1,
    LVDS_BO2 = 2,
    LVDS_BO3 = 3,
    LVDS_BO4 = 4,
    LVDS_BE0 = 5,
    LVDS_BE1 = 6,
    LVDS_BE2 = 7,
    LVDS_BE3 = 8,
    LVDS_BE4 = 9,
    LVDS_BCLK1 = 0xa,
    LVDS_BCLK2 = 0xb,
    LVDS_BDEFAULT = 0xf
};

// for LVDSA_EXT/DRV_PWD/PREM_PWD bit allignment
enum
{
    VB1_LANE0 = 0,  // AO0
    VB1_LANE1 = 1,  // AO1
    VB1_LANE2 = 2,  // AO2
    //VB1_LANE3 = 5,  // AOCK (Husky)
    //VB1_LANE4 = 3,  // AO3
    //VB1_LANE5 = 4,  // AO4
    VB1_LANE3 = 3,  // AOCK
    VB1_LANE4 = 4,  // AO3
    VB1_LANE5 = 5,  // AO4
    VB1_LANE6 = 6,  // AE0
    VB1_LANE7 = 7,  // AE1

    VB1_OSD_LANE0 = 8,    // AE2, 3rd lane0
    //VB1_OSD_LANE1 = 11,   // AECK, 3rd lane1(Husky)
    //VB1_OSD_LANE2 = 9,    // AE3, 3rd lane2
    //VB1_OSD_LANE3 = 10,   // AE4, 3rd lane3
    VB1_OSD_LANE1 = 9,   // AECK, 3rd lane1
    VB1_OSD_LANE2 = 10,    // AE3, 3rd lane2
    VB1_OSD_LANE3 = 11,   // AE4, 3rd lane3
    VB1_OSD_LANE4 = 12,   // BO0, 3rd lane4
    VB1_OSD_LANE5 = 13,   // BO1, 3rd lane5
    VB1_OSD_LANE6 = 14,   // BO2, 3rd lane6
    //VB1_OSD_LANE7 = 17,   // BOCK, 3rd lane7(Husky)
    VB1_OSD_LANE7 = 15,   // BOCK, 3rd lane7

    //VB1_LANE8 =  15,  // BO3, 2nd lane0(Husky)
    //VB1_LANE9 =  16,  // BO4, 2nd lane1
    VB1_LANE8 =  16,  // BO3, 2nd lane0
    VB1_LANE9 =  17,  // BO4, 2nd lane1
    VB1_LANE10 = 18,  // BE0, 2nd lane2
    VB1_LANE11 = 19,  // BE1, 2nd lane3
    VB1_LANE12 = 20,  // BE2, 2nd lane4
    //VB1_LANE13 = 23,  // BECK, 2nd lane5(Husky)
    //VB1_LANE14 = 21,  // BE3, 2nd lane6
    //VB1_LANE15 = 22,  // BE4, 2nd lane7
    VB1_LANE13 = 21,  // BECK, 2nd lane5
    VB1_LANE14 = 22,  // BE3, 2nd lane6
    VB1_LANE15 = 23,  // BE4, 2nd lane7

    VB1_LANE24 = 24,  // 4th lane0
    VB1_LANE25 = 25,  // 4th lane1
    VB1_LANE26 = 26,  // 4th lane2
    VB1_LANE27 = 27,  // 4th lane3
    VB1_LANE28 = 28,  // 4th lane4
    VB1_LANE29 = 29,  // 4th lane5
    VB1_LANE30 = 30,  // 4th lane6
    VB1_LANE31 = 31,  // 4th lane7

    VB1_LANE_DEFAULT = 0xff
};

// for Capy lane allignment(0x12008064~0x12008078)
enum
{
    VB1_DATA_LANE0 = 0,  // AO0
    VB1_DATA_LANE1 = 1,  // AO1
    VB1_DATA_LANE2 = 2,  // AO2
    VB1_DATA_LANE3 = 5,  // AOCK
    VB1_DATA_LANE4 = 3,  // AO3
    VB1_DATA_LANE5 = 4,  // AO4
    VB1_DATA_LANE6 = 6,  // AE0
    VB1_DATA_LANE7 = 7,  // AE1

    VB1_GRAPH_LANE0 = 8,    // AE2, 3rd lane0
    VB1_GRAPH_LANE1 = 11,   // AECK, 3rd lane1
    VB1_GRAPH_LANE2 = 9,    // AE3, 3rd lane2
    VB1_GRAPH_LANE3 = 10,   // AE4, 3rd lane3
    VB1_GRAPH_LANE4 = 12,   // BO0, 3rd lane4
    VB1_GRAPH_LANE5 = 13,   // BO1, 3rd lane5
    VB1_GRAPH_LANE6 = 14,   // BO2, 3rd lane6
    VB1_GRAPH_LANE7 = 17,   // BOCK, 3rd lane7

    VB1_DATA_LANE8 =  15,  // BO3, 2nd lane0
    VB1_DATA_LANE9 =  16,  // BO4, 2nd lane1
    VB1_DATA_LANE10 = 18,  // BE0, 2nd lane2
    VB1_DATA_LANE11 = 19,  // BE1, 2nd lane3
    VB1_DATA_LANE12 = 20,  // BE2, 2nd lane4
    VB1_DATA_LANE13 = 23,  // BECK, 2nd lane5
    VB1_DATA_LANE14 = 21,  // BE3, 2nd lane6
    VB1_DATA_LANE15 = 22,  // BE4, 2nd lane7

    VB1_DATA_LANE24 = 24,  // 4th lane0
    VB1_DATA_LANE25 = 25,  // 4th lane1
    VB1_DATA_LANE26 = 26,  // 4th lane2
    VB1_DATA_LANE27 = 27,  // 4th lane3
    VB1_DATA_LANE28 = 28,  // 4th lane4
    VB1_DATA_LANE29 = 29,  // 4th lane5
    VB1_DATA_LANE30 = 30,  // 4th lane6
    VB1_DATA_LANE31 = 31,  // 4th lane7

    VB1_DEFAULT = 0xff
};

// for LVDSA_EXT/DRV_PWD/PREM_PWD bit allignment
enum
{
    LVDS_PAD_LANE0_AO0 = 0,
    LVDS_PAD_LANE1_AO1 = 1,
    LVDS_PAD_LANE2_AO2 = 2,
    //LVDS_PAD_LANE4_AO3 = 3,  // Husky
    //LVDS_PAD_LANE5_AO4 = 4,
    //LVDS_PAD_LANE3_AOCLK = 5,
    LVDS_PAD_LANE3_AOCLK = 3,
    LVDS_PAD_LANE4_AO3 = 4,
    LVDS_PAD_LANE5_AO4 = 5,

    LVDS_PAD_LANE6_AE0 = 6,
    LVDS_PAD_LANE7_AE1 = 7,
    LVDS_PAD_LANE8_AE2 = 8,
    //LVDS_PAD_LANE10_AE3 = 9,  // Husky
    //LVDS_PAD_LANE11_AE4 = 0x0A,
    //LVDS_PAD_LANE9_AECLK = 0xB,
    LVDS_PAD_LANE9_AECLK = 9,
    LVDS_PAD_LANE10_AE3 = 0x0A,
    LVDS_PAD_LANE11_AE4 = 0x0B,

    LVDS_PAD_LANE12_BO0 = 0xC,
    LVDS_PAD_LANE13_BO1 = 0xD,
    LVDS_PAD_LANE14_BO2 = 0xE,
    //LVDS_PAD_LANE16_BO3 = 0xF,  // Husky
    //LVDS_PAD_LANE17_BO4 = 0x10,
    //LVDS_PAD_LANE15_BOCLK = 0x11,
    LVDS_PAD_LANE15_BOCLK = 0xF,
    LVDS_PAD_LANE16_BO3 = 0x10,
    LVDS_PAD_LANE17_BO4 = 0x11,

    LVDS_PAD_LANE18_BE0 = 0x12,
    LVDS_PAD_LANE19_BE1 = 0x13,
    LVDS_PAD_LANE20_BE2 = 0x14,
    LVDS_PAD_LANE21_BECLK = 0x15,
    LVDS_PAD_LANE22_BE3 = 0x16,
    LVDS_PAD_LANE23_BE4 = 0x17,

    LVDS_PAD_LANE24 = 0x18,
    LVDS_PAD_LANE25 = 0x19,
    LVDS_PAD_LANE26 = 0x1A,
    LVDS_PAD_LANE27 = 0x1B,
    LVDS_PAD_LANE28 = 0x1C,
    LVDS_PAD_LANE29 = 0x1D,
    LVDS_PAD_LANE30 = 0x1E,
    LVDS_PAD_LANE31 = 0x1F,

    LVDS_PAD_ADEFAULT = 0xff
};

//-----------------------------------------------------------------------------
// Loader Misc
//-----------------------------------------------------------------------------
typedef void (* PFN_LDR_ENVINIT_FUNC)(void *prLdrData, UINT32 fgValidFlag);
typedef void (* PFN_GPIO_TIMERINIT_FUNC)(void);

// customization enter stnadby or not
typedef UINT32 (* PFN_LDR_StandbyCheck_FUNC)(void);
#define DEFINED_PFN_LDR_StandbyCheck_FUNC

// customization show loader logo or not
typedef UINT32 (* PFN_LDR_PanelLogoCheck_FUNC)(void);
#define DEFINED_PFN_LDR_PanelLogoCheck_FUNC

typedef UINT32 (* PFN_LDR_USB_UpgradeCheck_FUNC)(void);
#define DEFINED_PFN_LDR_USB_UpgradeCheck_FUNC

typedef UINT32 (* PFN_LDR_Img_Decompression_FUNC)(void);
#define DEFINED_PFN_LDR_Img_Decompression_FUNC

typedef void (* PFN_LDR_Cust_FDR_Rst_FUNC)(void);
#define DEFINED_PFN_LDR_Cust_FDR_Rst_FUNC

//-----------------------------------------------------------------------------
// GPIO & ServoADC pins
//-----------------------------------------------------------------------------

// Total number definitions
#define TOTAL_SERVOADC_NUMBER       (10)  //Oryx ServoADC channel 0 ~ 9
#define TOTAL_GPIO_NUMBER           (200)
#define TOTAL_OPCTRL_NUMBER         (TOTAL_PDWNC_GPIO_NUM)

// ServoADC
#define MAX_SERVOADC_NUM            TOTAL_SERVOADC_NUMBER

// GPIO alias
#define GPIO_OPWM0              (86)
#define GPIO_OPWM1              (87)
#define GPIO_OPWM2              (88)
#define GPIO(x)                 (x)
#define ADIN(x)                 (SERVO(x))
#define SERVO(x)                (SERVO0 + (x))
#define OPCTRL(x)               (OPCTRL0 + (x))
//#define MT8292_GPIO(x)          (MT8292_GPIO0 + (x))
//#define MT8295_GPIO(x)          (MT8295_GPIO0 + (x))
//#define MT5135_GPIO(x)          (MT5135_GPIO0 + (x))
//#define GPIO_LVDS_PWR_ON      (79)
//#define GPIO_USB_PWR_EN0      (46)
//#define GPIO_USB_PWR_ERR0     (47)
#define GPIO_HDMI_HPD0          (217)
#define GPIO_HDMI_HPD1          (221)
#define GPIO_HDMI_HPD2          (225)
//#define GPIO_LVDS_CTRL1       (80)
//#define GPIO_LVDS_CTRL2       (81)

#define GPIO_JTDO               (125)
#define GPIO_JTRST_             (129)

// PDWNC PWR GPIO 0~7
//#define PWR_GPIO0               (200)           ///< define gpio macro for OPCTRL0
//#define PWR_GPIO1               (201)           ///< define gpio macro for OPCTRL1
//#define PWR_GPIO2               (202)           ///< define gpio macro for OPCTRL2
//#define PWR_GPIO3               (203)           ///< define gpio macro for OPCTRL3
//#define PWR_GPIO4               (204)           ///< define gpio macro for OPCTRL4
//#define PWR_GPIO5               (205)           ///< define gpio macro for OPCTRL5
//#define PWR_GPIO6               (206)           ///< define gpio macro for OPCTRL6
//#define PWR_GPIO7               (207)           ///< define gpio macro for OPCTRL7
//#define PWR_GPIO8               (208)           ///< define gpio macro for OPCTRL8
//#define PWR_GPIO9               (209)           ///< define gpio macro for OPCTRL9
//#define PWR_GPIO10              (210)           ///< define gpio macro for OPCTRL10
//#define PWR_GPIO11              (211)           ///< define gpio macro for OPCTRL11
//#define PWR_GPIO12              (212)           ///< define gpio macro for OPCTRL12
//#define PWR_GPIO13              (213)           ///< define gpio macro for OPCTRL13
//#define PWR_GPIO14              (214)           ///< define gpio macro for OPCTRL14
//#define PWR_GPIO15              (215)           ///< define gpio macro for OPCTRL15

// PDWNC OPCTRL 0~7
#define OPCTRL0                 (200)           ///< define gpio macro for OPCTRL0
#define OPCTRL1                 (201)           ///< define gpio macro for OPCTRL1
#define OPCTRL2                 (202)           ///< define gpio macro for OPCTRL2
#define OPCTRL3                 (203)           ///< define gpio macro for OPCTRL3
#define OPCTRL4                 (204)           ///< define gpio macro for OPCTRL4
#define OPCTRL5                 (205)           ///< define gpio macro for OPCTRL5
#define OPCTRL6                 (206)           ///< define gpio macro for OPCTRL6
#define OPCTRL7                 (207)           ///< define gpio macro for OPCTRL7
#define OPCTRL8                 (208)           ///< define gpio macro for OPCTRL8
#define OPCTRL9                 (209)           ///< define gpio macro for OPCTRL9
#define OPCTRL10                (210)           ///< define gpio macro for OPCTRL10
#define OPCTRL11                (211)           ///< define gpio macro for OPCTRL11
#define OPCTRL12                (212)           ///< define gpio macro for OPCTRL12
#define OPCTRL13                (213)           ///< define gpio macro for OPCTRL13
#define OPCTRL14                (214)           ///< define gpio macro for OPCTRL14
#define OPCTRL15                (215)           ///< define gpio macro for OPCTRL15

#define SERVO_0_ALIAS           (400)

#define SERVO0                  (400)
#define SERVO1                  (401)
#define SERVO2                  (402)
#define SERVO3                  (403)
#define SERVO4                  (404)
#define SERVO5                  (405)
#define SERVO6                  (406)
#define SERVO7                  (407)
#define SERVO8                  (408)
#define SERVO9                  (409)

//#define SERVO_GPIO0             (229)	//not real gpio, just for judge ather sevoad_gpio function
#define SERVO_GPIO1             (256)
#define SERVO_GPIO2             (257)
#define SERVO_GPIO3             (258)
#define SERVO_GPIO4             (259)
#define SERVO_GPIO5             (260)
#define SERVO_GPIO6             (261)
#define SERVO_GPIO7             (262)
#define SERVO_GPIO8             (263)
#define SERVO_GPIO9             (264)

#define ADIN0                   SERVO(0)        ///< define ADIN0
#define ADIN1                   SERVO(1)        ///< define ADIN1
#define ADIN2                   SERVO(2)        ///< define ADIN2
#define ADIN3                   SERVO(3)        ///< define ADIN3
#define ADIN4                   SERVO(4)        ///< define ADIN4
#define ADIN5                   SERVO(5)        ///< define ADIN5
#define ADIN6                   SERVO(6)        ///< define ADIN6
#define ADIN7                   SERVO(7)        ///< define ADIN7
#define ADIN8                   SERVO(8)        ///< define ADIN8
#define ADIN9                   SERVO(9)        ///< define ADIN9


#define MT5135_GPIO0    (700)
#define MT5135_GPIO1    (701)
#define MT5135_GPIO2    (702)
#define MT5135_GPIO3    (703)
#define MT5135_GPIO4    (704)
#define MT5135_GPIO5    (705)
#define MT5135_GPIO6    (706)
#define MT5135_GPIO7    (707)
#define MT5135_GPIO8    (708)
#define MT5135_GPIO9    (709)
#define MT5135_GPIO10   (710)
#define MT5135_GPIO11   (711)
#define MT5135_GPIO12   (712)
#define MT5135_GPIO13   (713)
#define MT5135_GPIO14   (714)
#define MT5135_GPIO15   (715)
#define MT5135_GPIO16   (716)
#define MT5135_GPIO17   (717)
#define MT5135_GPIO18   (718)
#define MT5135_GPIO30   (730)
#define MT5135_GPIO_MAX MT5135_GPIO30

#define WT6720_GPIO0    (800)
#define WT6720_GPIO1    (801)
#define WT6720_GPIO2    (802)
#define WT6720_GPIO3    (803)
#define WT6720_GPIO4    (804)
#define WT6720_GPIO5    (805)
#define WT6720_GPIO6    (806)
#define WT6720_GPIO7    (807)
#define WT6720_GPIO8    (808)
#define WT6720_GPIOB    WT6720_GPIO8
#define WT6720_GPIO_MAX WT6720_GPIO8

//-------------------------------------------------------------------------------------

#define GPIO_INIT_CUSTOM_MODE0      (0)     // normal mode
#define GPIO_INIT_CUSTOM_MODE1      (1)     // special panel mode
#define GPIO_INIT_CUSTOM_MODE2      (2)     // panel mode
#define GPIO_INIT_CUSTOM_MODE3      (3)     // sdm mode
#define GPIO_INIT_CUSTOM_MASK       (0xfU)
#define GET_INIT_CUSTOM_MODE()      (DRVCUST_GetBootupMode() & GPIO_INIT_CUSTOM_MASK)
#define GPIO_INIT_COMPANION_MASK    (0xffff0000)
#define GPIO_INIT_COMPANION_CHIP    (0x82800000)
#define IS_COMPANION_CHIP_ON()      ((DRVCUST_GetBootupMode() & GPIO_INIT_COMPANION_MASK) == GPIO_INIT_COMPANION_CHIP)

#ifdef CC_SAKURA_LED_ILLUMINATION
typedef enum
{
    eLedNullEvent = -1,
    eLedSelfDiagnosis = 0,
    eLedAgingMode,
    eLedSWUpdate,
    eLedUpdateFinish,
    eLedTestReset,
    eLedErrPanelID,
    eLedPowerOnAnime,
    eLedSkypeCallRecv,
    eLedSIRCSResponse,
    eLedEPOP,
    eLedPicOff,
    eLedPreparingContent,
    eLedContentCtrling,
    eLedContentPlay,
    eLedDevConnectSuccess,
    eLedREC,
    eLedTimer,
    eLedPowerOn,
    eLedSTBY,
    eLedAppResponse,
    eLedRemoteAppCtrl,
    eLedStoreDispMode,
    eLedErrDetection,
    eLedSocialExciting1,
    eLedSocialExciting2,
    eLedSocialExciting3,
    eLedAppNotify,
    eLedDevConnectDetect,
    eLedCameraMicTally,
    eLedEPOPOneShot,
    eLedRECOneShot,
    eLedTimerOneShot,
    eLedPicOffOneShot,
    eLedEPOPLit,
    eLedRECLit,
    eLedTimerLit,
    eLedPicOffLit,
    eLedNotificationW,
    eLedNotificationR,
    eLedNotificationG,
    eLedNotificationB,
	eLedListening,
	eLedThinking,
	eLedResponding,
	eLedTimeout,
	eLedMicMute,
    eLedKeyResponse,
    eLedInspectionW,
    eLedInspectionR,
    eLedInspectionG,
    eLedInspectionB,
    eLedInspectionRGB,
    eLedInspectionAllCancel,
    eLedPatternTotal,

    /*Below are extra special events, there's no pattern in them*/
    eLedEventCancel = 0xE0,
    eLedEventAmberOn,
    eLedEventAmberOff,
    eLedEventEnableSirc,
    eLedEventDisableSirc,
    eLedEventSircKeyDown,
    eLedEventSircKeyUp,
    eLedEventResume,
    eLedPatternLastEntry
} LED_PATTERN_IDX_T;

typedef enum
{
    eLedBrightAuto = 0,
    eLedBrightStandard,
    eLedBrightLow,
    eLedBrightOff,
    eLedBrightAllOff
}LED_U_BRIGHTNESS_T;
typedef enum
{
    eLedIdKeyResponse = 0,
    eLedIdSWUpdate = 2,
    eLedIdTally = 3,
    eLedIdTotal
} LED_ID_T;
#endif

#ifdef CC_COMBINE_4K_2K
#define MVI_INFO_FORCE_2K_DISPLAY       (0x40)
#define MVI_INFO_2K_MODULE              (0x0)
#define MVI_INFO_4K_MODULE              (0x01)
#define MVI_INFO_8K_MODULE              (0x02)
#define MVI_INFO_16K_MODULE             (0x03)


enum {
    DRV_CUST_BE_TYPE_NONE       = 0,
    DRV_CUST_BE_TYPE_S_Y15      = 1,
    DRV_CUST_BE_TYPE_S_Y16      = 2,
    DRV_CUST_BE_TYPE_S_4K_Y18   = 3,
    DRV_CUST_BE_TYPE_S_8K_Y18   = 4,
    DRV_CUST_BE_TYPE_S_4K_Y20   = 5,
    DRV_CUST_BE_TYPE_S_8K_Y20   = 6,
    DRV_CUST_BE_TYPE_INVALID
};

enum {
    DRV_CUST_FRC_TYPE_NONE       = 0,
    DRV_CUST_FRC_TYPE_VENDOR_N   = 1,
    DRV_CUST_FRC_TYPE_VENDOR_M   = 2,
    DRV_CUST_FRC_TYPE_INVALID
};

enum {
    DRV_CUST_FRC_TYPE_DEVICE_NONE       = 0,
    DRV_CUST_FRC_TYPE_DEVICE_1          = 1,
    DRV_CUST_FRC_TYPE_DEVICE_2          = 2,
    DRV_CUST_FRC_TYPE_DEVICE_INVALID
};

enum {
    DRV_CUST_PQ_TYPE_NONE       = 0,
    DRV_CUST_PQ_TYPE_S_Y17      = 1,
    DRV_CUST_PQ_TYPE_INVALID
};

enum {
    DRV_CUST_FE_TYPE_NONE       = 0,
    DRV_CUST_FE_TYPE_JP_SHV      = 1,
    DRV_CUST_FE_TYPE_INVALID
};

enum {
    DRV_CUST_ILLUMINATION_LED_WRGB       = 0,
    DRV_CUST_ILLUMINATION_LED_RGB        = 1,
    DRV_CUST_ILLUMINATION_LED_WR       = 2,
    DRV_CUST_ILLUMINATION_LED_INVALID
};

enum {
    DRV_CUST_FP_KEY_3KEY               = 0,
    DRV_CUST_FP_KEY_1KEY_CENTER        = 1,
    DRV_CUST_FP_KEY_1KEY_LEFT          = 2,
    DRV_CUST_FP_KEY_1KEY_RIGHT         = 3,
    DRV_CUST_FP_KEY_OTHER
};

#endif

typedef enum
{
    eLedZero,
    eLedLoaderPowerOn,
    eLedLoaderPowerOff,
    eLedSystemPowerOn,
    eLedSystemPowerOff,
    eLedDarkLed,
    eLedIrOn,
    eLedIrOff,
    eLedVgaStandby,
    eLedUpgradeBlink,
    eLedDetectBlink,
    eLedUpgradeFail,
    eLedUpgradeFinish,
    eLedPanelIDFail,
    eLedUpgIntegrityFail,
    eLedAtomicSuccess,
    eLedAtomicFail,
    eLedInFDRMode,
    eLedLast
} LED_STATUS_T;

#define INTERNAL_PODCI  (0)     //mt5387 pcmcia pinmux
#define MT5387_NAND_PMX (7)     //mt5391 nand i/f pinmux
#define MT8295_IO_0mA   (0)
#define MT8295_IO_4mA   (4)
#define MT8295_IO_8mA   (8)
#define MT8295_IO_12mA  (12)

//-----------------------------------------------------------------------------
// Driver Key Pad data structure
//-----------------------------------------------------------------------------

#define DKBIT_POWER         (1U << 0)       ///< Driver internal power button id
#define DKBIT_MENU          (1U << 1)       ///< Driver internal menu button id
#define DKBIT_INPUT_SRC     (1U << 2)       ///< Driver internal input soruce button id
#define DKBIT_PRG_UP        (1U << 3)       ///< Driver internal channel up button id
#define DKBIT_PRG_DOWN      (1U << 4)       ///< Driver internal channel down button id
#define DKBIT_VOL_UP        (1U << 5)       ///< Driver internal volume up button id
#define DKBIT_VOL_DOWN      (1U << 6)       ///< Driver internal volume down button id
#define DKBIT_EJECT         (1U << 7)       ///< Driver internal dvd eject button id
#define DKBIT_PLAY_PAUSE    (1U << 8)       ///< Driver internal dvd play/pause button id
#define DKBIT_STOP          (1U << 9)       ///< Driver internal dvd stop button id
#define DKBIT_FACTORY       (1U << 10)      ///< Driver internal factory button id
#define DKBIT_ENTER         (1U << 11)      ///< Driver internal enter button id
#define DKBIT_EXIT          (1U << 12)      ///< Driver internal enter button id
#define DKBIT_TV            (1U << 13)      ///< Driver internal enter button id
#define DKBIT_CENTER        (1U << 14)      ///< Driver internal enter button id
#define DKBIT_LEFT          (1U << 15)      ///< Driver internal enter button id
#define DKBIT_RIGHT         (1U << 16)      ///< Driver internal enter button id
#define DKBIT_NONE          (0xffffffff)    ///< Driver internal button id for none

typedef struct _MultiKey
{
    UINT32 u4CrystalKey;    ///< System internal key id.
    UINT32 u4DrvKeyBits;    ///< Driver internal button id.
} MULTI_KEY_T;

typedef struct _CombIrKp
{
    UINT32 u4CrystalKey;    ///< System internal key id.
    UINT32 u4IrBtn;         ///< Driver internal button id.
    UINT32 u4KeyPadBtn;     ///< Driver internal button id.
} COMB_IR_KP_T;

//-----------------------------------------------------------------------------
// GPIO Key Pad data structure
//-----------------------------------------------------------------------------
typedef struct _SingleGpio
{
    UINT32 u4Gpio;          ///< Gpio number
    UINT32 u4Val;           ///< Gpio polarity
    UINT32 u4Key;           ///< Gpio pin/polarity for System internal key id.
} SGL_GPIO_T;

//-----------------------------------------------------------------------------
// ServoADC Key Pad data structure
//-----------------------------------------------------------------------------
typedef struct _SingleServo
{
    UINT32 u4Servo;         ///< ServoADC pin
    UINT32 u4Top;           ///< ServoADC top value
    UINT32 u4Btm;           ///< ServoADC button value
    UINT32 u4Key;           ///< ServoADC pin/range for System internal key id.
} SGL_SERVO_T;

//-----------------------------------------------------------------------------
// Greed GPIO Key Pad data structure
//-----------------------------------------------------------------------------
typedef struct _GreedKey
{
    UINT32 u4GpioOut;       ///< Greed GPIO output pin
    UINT32 u4Val;           ///< Greed GPIO polarity
    UINT32 u4GpioIn;        ///< Greed GPIO input pin
    UINT32 u4Key;           ///< System key for this Greed GPIO setting.
} GREED_KEY_T;

typedef enum {
E_CUST_BE_TX_PATH_VIDEO,
E_CUST_BE_TX_PATH_GFX,
E_CUST_BE_TX_PATH_INVALID,
} E_CUST_BE_TX_PATH;

typedef enum {
E_CUST_BE_PLANE_ORDER_0 = 0,//below
E_CUST_BE_PLANE_ORDER_1,//middle
E_CUST_BE_PLANE_ORDER_2,//above
E_CUST_BE_PLANE_ORDER_MAX,
} E_CUST_BE_PLANE_ORDER;


typedef enum {
E_CUST_BE_SCL_TYPE_PQ,
E_CUST_BE_SCL_TYPE_VIDEO,
E_CUST_BE_SCL_TYPE_GFX,
E_CUST_BE_SCL_TYPE_INVALID,
} E_CUST_BE_SCL_TYPE;
///< GPIO power function pointer type.
typedef void (* PFN_GPIO_POWER_FUNC)(void);
///< GPIO setup at power on stage function pointer type.
typedef void (* PFN_GPIO_POWERON_FUNC)(void);
///< GPIO setup at power off stage function pointer type.
typedef void (* PFN_GPIO_POWEROFF_FUNC)(UINT32);
///< GPIO setup at led status function pointer type.
typedef void (* PFN_GPIO_LEDCTRL_FUNC)(LED_STATUS_T);
///< GPIO external control function by customization.
typedef INT32 (* PFN_CUSTOM_EXT_CTRL_FUNC)(VOID*, UINT32);
///< GPIO setup at power off for SelfDiag ShutDown function pointer type.
typedef void (* PFN_GPIO_POWEROFF_SELFDIAG_SHUTDOWN_FUNC)(void);
///< GPIO setup at power set for ExternalDecoderModel function pointer type.
typedef BOOL (* PFN_GPIO_POWERSET_EXT_DEC_MODEL_FUNC)(BOOL);
//-----------------------------------------------------------------------------
// Panel Function
//-----------------------------------------------------------------------------
///< Panel power and setting flag check function pointer type.
typedef UINT8 (* PFN_PANEL_IS_ON_FUNC)(void);
typedef UINT8 (* PFN_PANLE_SET_PANEL_POWER_1_ON_FUNC)(void);
typedef UINT8 (* PFN_PANLE_SET_PANEL_POWER_1_OFF_FUNC)(void);
typedef UINT8 (* PFN_PANLE_SET_PANEL_POWER_2_ON_FUNC)(void);
typedef UINT8 (* PFN_PANLE_SET_PANEL_POWER_2_OFF_FUNC)(void);
typedef UINT8 (* PFN_PANLE_SET_BACKLIGHT_MUTE_ON_FUNC)(void);
typedef UINT8 (* PFN_PANLE_SET_BACKLIGHT_MUTE_OFF_FUNC)(void);
//-----------------------------------------------------------------------------
// Sif Config Before/After Action
//-----------------------------------------------------------------------------
#define SIF_MAX_NUM_BUS     7
#define SIF_MAX_NUM_MASTER     6

typedef struct _SIF_CONFIG_T
{
    UINT8 u1NumBus;
    UINT8 au1Master[SIF_MAX_NUM_BUS];
} SIF_CONFIG_T;

///< SIF config before action function pointer type.
typedef void (* PFN_SIF_CFG_BEFORE_ACTION_FUNC)(UINT8,UINT16, UINT8, UINT8 *, UINT32,UINT8 *, UINT32,UINT8);
///< < SIF config after action function pointer type.
typedef void (* PFN_SIF_CFG_AFTER_ACTION_FUNC)(UINT8,UINT16, UINT8, UINT8 *, UINT32,UINT8 *, UINT32,UINT8);
/// Pin mux configuration
typedef void (* PFN_SIF_CFG_PIN_SET_FUNC)(UINT8);
/// Configurations
typedef SIF_CONFIG_T* (* PFN_SIF_CFG_GET_CONFIG_FUNC)(void);
typedef INT8 (* PFN_SIF_CFG_PIN_AND_MAP_FUNC)(UINT8);
//-----------------------------------------------------------------------------
// Flash address
//-----------------------------------------------------------------------------
#define ADDR_NOR_FLASH      (0x28000000)
#define ADDR_NAND_FLASH     (0x90000000)

//-----------------------------------------------------------------------------
// Notification Function
//-----------------------------------------------------------------------------

#define NOTIFICATION_MUTE_ACTUALMUTECHANGED         0
#define NOTIFICATION_MUTE_ACTUALMUTECOLORCHANGED    1
#define NOTIFICATION_MUTE_BLANKEDCHANGED            2

typedef struct _NotifyMute
{
    UINT32 u4NotifyId;
    UINT32 u4VdpId;
    UINT32 u4Data1;
    UINT32 u4Data2;
} NOTIFY_MUTE_T;

///< Mute status notification
typedef void (* PFN_NOTIFICATION_MUTE_FUNC)(NOTIFY_MUTE_T);


#define NOTIFICATION_MIXER_NEWPROPERTIES            0
#define NOTIFICATION_MIXER_NEWSETTINGSCOMPLETED     1
#define NOTIFICATION_MIXER_NEWSETTINGINTERRUPTED    2

typedef struct _NotifyMixer
{
    UINT32 u4NotifyId;
    UINT32 u4VdpId;
    UINT32 u4Data1;
} NOTIFY_MIXER_VIDEOLAYER_T;

///< Mute status notification
typedef void (* PFN_NOTIFICATION_MIXER_VIDEOLAYER_FUNC)(NOTIFY_MIXER_VIDEOLAYER_T);

#define NOTIFICATION_VIDEO_SIGNALCHANGED                0
#define NOTIFICATION_VIDEO_VIDEOPRESENTCHANGED          1
#define NOTIFICATION_VIDEO_SIGNALPRESENTCHANGED         2
#define NOTIFICATION_VIDEO_FIELDFREQUENCYCHANGED        3
#define NOTIFICATION_VIDEO_NUMBEROFVISIBLELINESCHANGED  4
#define NOTIFICATION_VIDEO_NUMBEROFVISIBLEPIXELSCHANGED 5
#define NOTIFICATION_VIDEO_NUMBEROFFRAMELINESCHANGED    6
#define NOTIFICATION_VIDEO_INTERLACEDCHANGED            7
#define NOTIFICATION_VIDEO_IMAGEFORMATCHANGED           8
#define NOTIFICATION_VIDEO_FILMMODECHANGED              9
#define NOTIFICATION_VIDEO_FROMVCRCHANGED               10
#define NOTIFICATION_VIDEO_VIDEOCODINGCHANGED           11
#define NOTIFICATION_VIDEO_VIDEOPROTECTIONCHANGED       12

typedef struct _NotifyVideo
{
    UINT32 u4NotifyId;
    UINT32 u4VdpId;
    UINT32 u4Data1;
    UINT32 u4Data2;
} NOTIFY_VIDEO_T;

///< vip status notification
typedef void (* PFN_NOTIFICATION_VIDEO_FUNC)(NOTIFY_VIDEO_T);


#define NOTIFICATION_VIDEO_AUTODONE         0
#define NOTIFICATION_VIDEO_AUTOCOLORDONE    1

typedef struct _NotifyVideoAutoDone
{
    UINT32 u4NotifyId;
    UINT32 u4VdpId;
    UINT32 u4Data1;
} NOTIFY_VIDEO_AUTO_DONE_T;

///< video auto done notification
typedef void (* PFN_NOTIFICATION_VIDEO_AUTO_DONE_FUNC)(NOTIFY_VIDEO_AUTO_DONE_T);

typedef struct _CiCustomInfo_T
{
    BOOL fgDisableCI;
} CiCustomInfo_T;
typedef void (* PFN_CI_CUSTOM_QUERY_FUNC)(CiCustomInfo_T *);

//-----------------------------------------------------------------------------
// IRRX Key Map data structure and Key Map array.
//-----------------------------------------------------------------------------

#define BTN_NONE                ((UINT32) 0xffffffff)

enum
{
    IRRX_NEC_TYPE = 1,          ///< IR receiver NEC type setting
    IRRX_RC5_TYPE,              ///< IR receiver RC5 type setting
    IRRX_SHARP_TYPE,            ///< IR receiver SHARP type setting
    IRRX_FUNAI_FACTORY_TYPE,
    IRRX_USR_TYPE,              ///< IR receiver User define type.
    IRRX_END_TYPE
};

#define WAKEUP_KEY_TYPE_RC5     (1 << 0)
#define WAKEUP_KEY_TYPE_RC6     (1 << 1)
#define WAKEUP_KEY_TYPE_NEC     (1 << 2)
#define WAKEUP_KEY_TYPE_SHARP   (1 << 3)
#define WAKEUP_KEY_TYPE_RC5_RC6 ((1 << 0) | (1 << 1))

/*! type define for IR key unit.
 */
typedef struct _KeyMapUnit
{
    UINT32  u4Key;              // Only Use 8bits.
    UINT32  u4Crystal;
} KEYUNIT_T;

/*! type define for key table with group id and key table size.
 */
typedef struct _KeyArray
{
    UINT32  u4GroupId;
    UINT32  u4Size;
    const   KEYUNIT_T *prKeyMap;
} KEYARRAY_T;

/*! type define for IR wakeup key unit.
 */
typedef struct _WakeupKeyMapUnit
{
    UINT32  u4Key;              // Only Use 8bits.
    UINT32  u4Crystal;
    UINT8   u1Type;
} WAKEUPKEYUNIT_T;

/*! type define for key table with group id and wakeup key table size.
 */
typedef struct _WakeupKeyArray
{
    UINT32  u4GroupId;
    UINT32  u4Size;
    const   WAKEUPKEYUNIT_T *prKeyMap;
} WAKEUPKEYARRAY_T;

/* Definition of maximum raw data size */
#define IRRX_MAX_RAW_DATA_SIZE                  ((UINT8) 11) /* byte */

typedef struct _IRRX_RAW_DATA_T
{
    UINT8   u1Protocol;
    UINT32  u4Len;      /* byte */
    UINT8   au1Data[IRRX_MAX_RAW_DATA_SIZE];
} IRRX_RAW_DATA_T;

/*! function pointer for user define type.
 */
typedef UINT32 (* PFN_XFER_USR_TO_CRYSTAL)(UINT32 u4Into, const UINT8 *pu1Data, IRRX_RAW_DATA_T *prRaw);
typedef UINT32 (* PFN_IS_USR_LONG_PRESS)(UINT32 rDelta_MS, IRRX_RAW_DATA_T *rRaw, IRRX_RAW_DATA_T *rPrevRaw);
typedef UINT32 (*PFN_USR_GET_CRYSTAL_KEY)(UINT32 u4GroupId, UINT8 u1Data, UINT32 u4BitCnt);
typedef void (*PFN_IRRC_LED_BLINK_CONFIG_CHG)(BOOL bEnable);
/*! function type for user define wakeup function pointer.
 */
typedef void (* PFN_SET_USR_WAKEUP_KEY)(void);
typedef void (* PFN_USR_POWER_SEQUENCE)(void);
typedef void (* PFN_SET_TURN_ON_PANEL)(void);
typedef void (* PFN_SET_TURN_OFF_PANEL)(void);
typedef void (* PFN_SET_TURN_ON_BACKLT)(void);
typedef void (* PFN_SET_TURN_OFF_BACKLT)(void);
typedef void (* PFN_ENTER_FRC_REGISTER_MODE)(void);
typedef void (* PFN_EXIT_FRC_REGISTER_MODE)(void);
typedef void (* PFN_ENABLE_FRC_VX1_OUT)(void);
typedef void (* PFN_DISABLE_FRC_VX1_OUT)(void);
typedef UINT8 (* PFN_CHECK_FRC_INIT_STATUS)(void);
typedef UINT8 (* PFN_READ_FRC_VERSION_FROM_PANEL)(void);
typedef UINT8 (* PFN_FRC_UNMUTE)(void);

//-----------------------------------------------------------------------------
//PIGain table Modify by W.C Shih
//-----------------------------------------------------------------------------
typedef struct _PIUnit
{
    UINT8 LowerBound;
    UINT8 UpperBound;
    UINT8 PValue;
    UINT8 IValue;
} PIUNIT_T;


//-----------------------------------------------------------------------------
// VGA table structure
//-----------------------------------------------------------------------------
#ifndef _VGAMODE_STRUCT_
#define _VGAMODE_STRUCT_
typedef struct VGAMODE      // 14 bytes
{
    UINT16  IHF;            // Horizontal Frequency for timing search
    UINT8   IVF;            // Vertical Frequency for timing search
    UINT16  ICLK;           // Pixel Frequency
    UINT16  IHTOTAL;        // H Total
    UINT16  IVTOTAL;        // V Total
    UINT16  IPH_SYNCW;      // H Sync Width
    UINT16  IPH_WID;        // H Resolution
    UINT16  IPH_BP;         // H Back Porch
    UINT16  IPV_STA;        // V Back Porch + Sync Width
    UINT16  IPV_LEN;        // V Resolution
    UINT16  COMBINE;        // ??
    //UINT32 CLKIN_CWCODE;  // ??
}  VGAMODE ;
#endif

// non-linear drv_cust table
typedef struct
{
    UINT8   bDecType;
    UINT32  u4PanelW;
    UINT32  u4PanelH;
    UINT32  u4Width;
    UINT32  u4Height;
    UINT32  u4Interlace;
    /* Non Linear Factor */
    BOOL    bAuto;
    UINT32  u4Start;
    UINT32  u4Slope;
    UINT32  u4Middle;
    UINT32  u4Stop;
} NONLINEAR_PRM_T;

//-----------------------------------------------------------------------------
// Driver customization macro function for key map
//-----------------------------------------------------------------------------
#ifndef NDEBUG
    #define DBGLOG(STR...) Printf(STR)
#else
    #define DBGLOG(STR...)
#endif

/*! Define macro for IR RC5 driver customization.
 */
#define DECLARE_MAP_BEGIN(MAPFUNC) \
    UINT32 MAPFUNC(UINT32 u4GroupCode, UINT32 u4KeyCode) \
    { \
        UINT32 u4CrystalCode = (UINT32)0xffffffff; /* BTN_NONE */ \
        switch(u4GroupCode) \
        { \

    /* the line above is intendedly to be blanc */

#define DECLARE_MAP_END() \
     default: \
         DBGLOG("keymap : group none\n"); \
            break; \
        } \
        return u4CrystalCode; \
    } \

    /* the line above is intendedly to be blanc */

#define MAP_GROUP_AS_BELOW(GROUPCODE) \
    case (GROUPCODE): \

    /* the line above is intendedly to be blanc */

#define MAP_GROUP_BEGIN(GROUPCODE) \
    case (GROUPCODE): \
    { \
        switch (u4KeyCode) \
        { \

    /* the line above is intendedly to be blanc */

#define MAP_GROUP_END() \
        default: \
            DBGLOG("keymap : key none\n"); \
            return u4CrystalCode; \
        } \
    } \

    /* the line above is intendedly to be blanc */

#define MAP_FACTORY1_END()          \
        default:                    \
            if (u4KeyCode < 128)    \
            {                       \
                u4CrystalCode = BTN_DRIVER1_FACTORY(u4KeyCode); \
                DBGLOG("keymap : factory1 key %d\n", u4KeyCode); \
            }                       \
            else                    \
            {                       \
                DBGLOG("keymap : key none\n"); \
            }                       \
            break; \
        } \
    } \

    /* the line above is intendedly to be blanc */

#define MAP_FACTORY2_END() \
        default: \
            if (u4KeyCode < 128)    \
            {                       \
                u4CrystalCode = BTN_DRIVER2_FACTORY(u4KeyCode); \
                DBGLOG("keymap : factory2 key %d\n", u4KeyCode); \
            }                       \
            else                    \
            {                       \
                DBGLOG("keymap : key none\n"); \
            }                       \
            break; \
        } \
    } \

    /* the line above is intendedly to be blanc */


#define MAP_INSERT(KEYCODE, CRYSTALCODE, KEYDESCRIPTION) \
    case (KEYCODE) : \
        u4CrystalCode = (CRYSTALCODE); \
        DBGLOG("keymap : " KEYDESCRIPTION "\n"); \
        return u4CrystalCode; \

    /* the line above is intendedly to be blanc */

typedef enum
{
    RTC_INTERNAL = 0,
    RTC_EXT = 1
}   RTC_HW_T;

typedef void (* PFN_UPGRADE_BREAK_FUNC)(void);
typedef INT32 (* PFN_VER_CMP_FUNC)(CHAR *szCurVer, CHAR *szUpgVer);
typedef void (* PFN_DLM_CB_FUNC)(UINT32);
typedef void (* PFN_DLM_GET_TAG_VER_CB_FUNC)(UCHAR *ucTagName, CHAR *szCurVer);
typedef void (* PFN_DLM_SET_TAG_VER_CB_FUNC)(UCHAR *ucTagName, CHAR *szUpgVer);
typedef INT32 (* PFN_DLM_CMP_TAG_VER_CB_FUNC)(UCHAR *ucTagName, CHAR *szCurVer, CHAR *szUpgVer);
typedef UINT32 (* PFN_POWER_STATE_QUERY_FUNC)(void);
typedef BOOL (* PFN_CEC_CONFIG_QUERY_FUNC)(void);

//-----------------------------------------------------------------------------
// Driver customization interface function.
//-----------------------------------------------------------------------------

#if !defined(CC_NAND_BOOT) || !defined(CC_MTK_PRELOADER)

//-----------------------------------------------------------------------------
/** Driver customization interface function.
 *  This function is driver module to get different setting of PCB at boot stage.
 *
 *  @param  eQryType        The query type definition.
 *  @param  pu4Data         The pointer points to the setting data of the type.
 *  @retval 0               Succeed
 *  @retval otherwise       Fail. There is no setting.
 */
//-----------------------------------------------------------------------------
EXTERN INT32 DRVCUST_InitQuery(QUERY_TYPE_T eQryType, UINT32 *pu4Data);
EXTERN INT32 DRVCUST_InitQueryUptr(QUERY_UPTR_T eQryType, UPTR *pu4Data);

//-----------------------------------------------------------------------------
/** Driver customization interface function.
 *  This function is driver module to get different setting of PCB at boot stage.
 *
 *  @param  eQryType        The query type definition.
 *  @retval The value of the query type setting data.
 */
//-----------------------------------------------------------------------------
#if !defined(CC_MTK_PRELOADER)
EXTERN UINT32 DRVCUST_InitGet(QUERY_TYPE_T eQryType);
EXTERN UPTR DRVCUST_InitGetUptr(QUERY_UPTR_T eQryType);
#endif
//-----------------------------------------------------------------------------
/** Driver customization interface function.
 *  This function is driver module to get different setting of PCB at boot stage.
 *
 *  @param  eQryType        The query type definition.
 *  @param  pu4Data         The pointer points to the setting data of the type.
 *  @retval 0               Succeed
 *  @retval otherwise       Fail. There is no setting.
 */
//-----------------------------------------------------------------------------
EXTERN INT32 DRVCUST_InitQuery64(QUERY_TYPE_T eQryType, UINT64 *pu8Data);

//-----------------------------------------------------------------------------
/** Driver customization interface function.
 *  This function is driver module to get different setting of PCB at boot stage.
 *
 *  @param  eQryType        The query type definition.
 *  @retval The value of the query type setting data.
 */
//-----------------------------------------------------------------------------
EXTERN UINT64 DRVCUST_InitGet64(QUERY_TYPE_T eQryType);

#endif /* !defined(CC_NAND_BOOT) || !defined(CC_MTK_PRELOADER) */

//-----------------------------------------------------------------------------
/** Driver customization interface function.
 *  This function is driver module to get different setting of PCB.
 *
 *  @param  eQryType        The query type definition.
 *  @param  pu4Data         The pointer points to the setting data of the type.
 *  @retval 0               Succeed
 *  @retval otherwise       Fail. There is no setting.
 */
//-----------------------------------------------------------------------------
EXTERN INT32 DRVCUST_OptQuery(QUERY_TYPE_T eQryType, UINT32 *pu4Data);
EXTERN INT32 DRVCUST_OptQueryUptr(QUERY_UPTR_T eQryType, UPTR *pu4Data);

//-----------------------------------------------------------------------------
/** Driver customization interface function.
 *  This function is driver module to get different setting of PCB.
 *
 *  @param  eQryType        The query type definition.
 *  @retval The value of the query type setting data.
 */
//-----------------------------------------------------------------------------
EXTERN UINT32 DRVCUST_OptGet(QUERY_TYPE_T eQryType);
EXTERN UPTR DRVCUST_OptGetUptr(QUERY_UPTR_T eQryType);

EXTERN NONLINEAR_PRM_T* DRVCUST_NonLinearTblGet(void);

EXTERN UINT32 DRVCUST_NonLinearTblSizeGet(void);

//-----------------------------------------------------------------------------
/** Driver customization interface function.
 *  This function is driver module to get different setting of PCB.
 *
 *  @param  eQryType        The query type definition.
 *  @param  pu4Data         The pointer points to the setting data of the type.
 *  @retval 0               Succeed
 *  @retval otherwise       Fail. There is no setting.
 */
//-----------------------------------------------------------------------------
EXTERN INT32 DRVCUST_PanelQuery(QUERY_TYPE_T eQryType, UINT32 *pu4Data);
EXTERN INT32 DRVCUST_PanelQueryUptr(QUERY_TYPE_T eQryType, UPTR *pu4Data);

//-----------------------------------------------------------------------------
/** Driver customization interface function.
 *  This function is driver module to get different setting of PCB.
 *
 *  @param  eQryType        The query type definition.
 *  @retval The value of the query type setting data.
 */
//-----------------------------------------------------------------------------
EXTERN UINT32 DRVCUST_PanelGet(QUERY_TYPE_T eQryType);
EXTERN UPTR DRVCUST_PanelGetUptr(QUERY_TYPE_T eQryType);

//-----------------------------------------------------------------------------
/** Set DrvInit Flag
 */
//-----------------------------------------------------------------------------
EXTERN void DRVCUST_SetDrvInit(UINT32 fgFlag);

//-----------------------------------------------------------------------------
/** Get DrvInit Flag
 */
//-----------------------------------------------------------------------------
EXTERN UINT32 DRVCUST_GetDrvInit(void);

//-----------------------------------------------------------------------------
/** Get Bootup mode
 */
//-----------------------------------------------------------------------------
EXTERN INT32 DRVCUST_GetBootupMode(void);

//-----------------------------------------------------------------------------
/** Set DRVCUST Bootup Checking.
 */
//-----------------------------------------------------------------------------
EXTERN void DRVCUST_BootupCheck(void);

//-----------------------------------------------------------------------------
/** Set user defined LISR handler
 */
//-----------------------------------------------------------------------------
EXTERN void DRVCUST_UserLISR(INT32 i4Vector);

#if defined(CC_DYNAMIC_FBMSRM_CONF)
EXTERN INT32  FBMDynIs4KMode(void);
#endif

//-----------------------------------------------------------------------------
/** Query DRVCUST Logo setting.
 */
//-----------------------------------------------------------------------------
EXTERN INT32 DRVCUST_IsLogoDisableInEeprom(void);

//-----------------------------------------------------------------------------
/** Set GPIO For DCR
 */
//-----------------------------------------------------------------------------
EXTERN void DRVCUST_LDMHWInit(void);   //mtk70763, 2010-7-21

EXTERN void DRVCUST_HwInit(void);
EXTERN void DRVCUST_HUPSCaleCoeff(UINT8 bPath);
EXTERN void DRVCUST_VUPSCaleCoeff(UINT8 bPath);
EXTERN void DRVCUST_VideoInit(void);
EXTERN void DRVCUST_VdoModeChgDone(UINT8 bPath);
EXTERN void DRVCUST_VideoMainloop(void);
EXTERN void DRVCUST_OutVSyncISR(void);
EXTERN void DRVCUST_PostOutVSyncISR(void);
EXTERN void DRVCUST_PSCDeFallingISR(void);
EXTERN void DRVCUST_PostDEEndISR(void);
EXTERN void DRVCUST_VdoInISR(void);
EXTERN UINT32 DRVCUST_OpCodeQuery(QUERY_TYPE_T eQryType);
EXTERN UINT32 DRVCUST_DramClk(UINT32 clk);

EXTERN UINT16 DRVCUST_GetFrcFrmDly(void);
EXTERN UINT16 DRVCUST_GetPnlBlDly(void);

EXTERN INT32 DRVCUST_GetPartIDByName(char *szPartName, UINT32  *pu4PartId);

#ifndef CC_MTK_PRELOADER
EXTERN void DRVCUST_VideoSysInit(void);
#endif //#ifndef CC_MTK_PRELOADER

#if defined(CC_S_PLATFORM)
EXTERN void DRVCUST_MEMC_CalDynMode(void);
#endif

//-----------------------------------------------------------------------------
/** Audio AMP related settings
 */
//-----------------------------------------------------------------------------
typedef enum
{
    FORMAT_RJ,
    FORMAT_LJ,
    FORMAT_I2S
} DATA_FORMAT_T;

typedef enum
{
    MCLK_128FS,
    MCLK_192FS,
    MCLK_256FS,
    MCLK_384FS,
    MCLK_512FS,
    MCLK_768FS
} MCLK_FREQUENCY_T;

typedef void (*AMP_INIT)(void);
typedef void (*AMP_MUTE)(BOOL fgMute);
typedef void (*AMP_SET_DAC_IN_FMT)(DATA_FORMAT_T eFormat, MCLK_FREQUENCY_T eMclk);
typedef void (*AMP_SET_DAC_GAIN)(UINT8 u1HpId, INT16 i2Gain);
typedef void (*AMP_REG_WRITE)(UINT8 u1Offset, UINT8 u1Data);
typedef UINT8 (*AMP_REG_READ)(UINT8 u1Offset);
typedef void (*AMP_DISABLE_EFFCT)(void);

// driver call back
typedef struct
{
    AMP_DISABLE_EFFCT   pfnDisableEffect;
} AMP_DRV_CB_T;

/// Audio amplify function table.
typedef struct
{
    AMP_INIT           pfnInit;
    AMP_MUTE           pfnMute;
    AMP_SET_DAC_IN_FMT pfnSetDacInFmt;
    AMP_SET_DAC_GAIN   pfnSetDacGain;
    AMP_REG_WRITE      pfnRegWrite;
    AMP_REG_READ       pfnRegRead;
    AMP_DRV_CB_T      *prAmpDrvCBFunc;  // driver call back funciton table
} AMP_FUNCTBL_T;

/// Audio amplify configuration table.
typedef struct
{
    CHAR            szName[32];
    INT16           i2MaxGain;
    INT16           i2MinGain;
    UINT8           u1DacNum;
    AMP_FUNCTBL_T  *prAmpFunc;
} AMP_T;

EXTERN AMP_T *_AMP_GetAmpCustFunTbl(void);

#if 0

#define XSTR(x) STR(x)
#define STR(x) #x
#pragma message "the value of FBM_SCPOS_SUB_SIZE=" XSTR(FBM_SCPOS_SUB_SIZE)
#pragma message "the value of FBM_PQ_3DC_POOL_SIZE=" XSTR(FBM_PQ_3DC_POOL_SIZE)
#pragma message "the value of FBM_OD_SIZE=" XSTR(FBM_OD_SIZE)
#pragma message "the value of FBM_DMX_PID_BUF_SIZE=" XSTR(FBM_DMX_PID_BUF_SIZE)
#pragma message "the value of FBM_VENC_SIZE=" XSTR(FBM_VENC_SIZE)
#pragma message "the value of FBM_PVR_SIZE=" XSTR(FBM_PVR_SIZE)
#pragma message "the value of FBM_DSP_SIZE=" XSTR(FBM_DSP_SIZE)

#pragma message "the value of FBM_DMX1_SIZE=" XSTR(FBM_DMX1_SIZE)
#pragma message "the value of FBM_DMX2_SIZE=" XSTR(FBM_DMX2_SIZE)
#pragma message "the value of FBM_DMX3_SIZE=" XSTR(FBM_DMX3_SIZE)
#pragma message "the value of FBM_DMX4_SIZE=" XSTR(FBM_DMX4_SIZE)
#pragma message "the value of FBM_MPEG_Y_POOL_SIZE=" XSTR(FBM_MPEG_Y_POOL_SIZE)
#pragma message "the value of FBM_DIVX_SIZE=" XSTR(FBM_DIVX_SIZE)
#pragma message "the value of FBM_W2DR2R_POOL_SIZE=" XSTR(FBM_W2DR2R_POOL_SIZE)
#pragma message "the value of FBM_SCPOS_MAIN_SIZE=" XSTR(FBM_SCPOS_MAIN_SIZE)
#pragma message "the value of FBM_MJC_RSV_POOL_SIZE=" XSTR(FBM_MJC_RSV_POOL_SIZE)
#pragma message "the value of FBM_MPEG_C_POOL_SIZE=" XSTR(FBM_MPEG_C_POOL_SIZE)
#pragma message "the value of FBM_SCPOS_SUB_SIZE=" XSTR(FBM_SCPOS_SUB_SIZE)

#pragma message "the value of FBM_PNG_POOL_SIZE=" XSTR(FBM_PNG_POOL_SIZE)
#pragma message "the value of FBM_JPEG_POOL_SIZE=" XSTR(FBM_JPEG_POOL_SIZE)
#pragma message "the value of FBM_VSS_SIZE=" XSTR(FBM_VSS_SIZE)
#pragma message "the value of FBM_FEEDER1_SIZE=" XSTR(FBM_FEEDER1_SIZE)
#pragma message "the value of FBM_FEEDER2_SIZE=" XSTR(FBM_FEEDER2_SIZE)
#pragma message "the value of FBM_FEEDER3_SIZE=" XSTR(FBM_FEEDER3_SIZE)
#pragma message "the value of FBM_FEEDER4_SIZE=" XSTR(FBM_FEEDER4_SIZE)
#pragma message "the value of FBM_SWDMX_SIZE=" XSTR(FBM_SWDMX_SIZE)
#pragma message "the value of FBM_DRM_BUF_SIZE=" XSTR(FBM_DRM_BUF_SIZE)

#endif

#endif /* DRVCUST_IF_H */

