/* SPDX-License-Identifier: LGPL-2.1-only OR BSD-3-Clause */
/******************************************************************************
 *
 * This file is provided under a dual license.  When you use or
 * distribute this software, you may choose to be licensed under
 * version 2.1 of the GNU Lesser General Public License
 * ("LGPLv2.1 License") or BSD License.
 *
 * LGPLv2.1 License
 *
 * Copyright(C) 2019 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2.1 of the GNU Lesser General Public
 * License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 * See https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html for more
 * details.
 *
 * BSD LICENSE
 *
 * Copyright(C) 2019 MediaTek Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name of the copyright holder nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/

/*-----------------------------------------------------------------------------
 *
 * $Author: taka.chiu $
 * $Date  $
 * $RCSfile: source_table.c,v $
 * $Revision: #2 $
 *
 *---------------------------------------------------------------------------*/

#include "hw_vdoin.h"
#include "sv_const.h"
#include "source_table.h"
#include "drv_adcset.h"
#include "drv_video.h"
#include "x_gpio.h"
#include "drv_hdmi2.h"
#include "x_printf.h"


/**
 * This table customize NPTV driver layer PIP/POP decoder dependencies
 */
struct VSS_Major_Rules VSS_major_rule[VSS_MAJORNR]=
{
/*VSS_ATV*/            {VSS_TVDDEC1},
/*VSS_ATD*/            {VSS_TVDDEC1},
/*VSS_CVBS*/           {VSS_TVDDEC1},
/*VSS_SV*/             {VSS_TVDDEC1},
/*VSS_YPBPR*/          {VSS_HDTVDEC1},
/*VSS_VGACOMP*/        {VSS_HDTVDEC1},
/*VSS_VGA*/            {VSS_HDTVDEC1},
/*VSS_HDMI*/           {VSS_HDMIDEC1},
/*VSS_DVI*/            {VSS_HDMIDEC1},
/*VSS_DTV*/            {VSS_DTVDEC1},
/*VSS_DTD*/            {VSS_DTVDEC1},
/*VSS_SCART*/          {VSS_TVDDEC1|VSS_HDTVDEC1},
/*VSS_RESERVE*/        {0}
};


#ifdef CC_SOURCE_AUTO_DETECT
/**
 * auto detection enable/disable table
 */
source_detect_t src_det_tbl[] =
{
   {SV_VS_ATV1,    FALSE }, //SRC_DET_ATV1,
   {SV_VS_ATD1,    FALSE }, //SRC_DET_ATD1,
   {SV_VS_CVBS1,   FALSE  }, //SRC_DET_CVBS1,
   {SV_VS_CVBS2,   FALSE  }, //SRC_DET_CVBS2,
   {SV_VS_CVBS3,   FALSE  }, //SRC_DET_CVBS3,
   {SV_VS_CVBS4,   FALSE  }, //SRC_DET_CVBS4,
   {SV_VS_S1,      FALSE }, //SRC_DET_S1,
   {SV_VS_S2,      FALSE }, //SRC_DET_S2,
   {SV_VS_S3,      FALSE }, //SRC_DET_S3,
   {SV_VS_YPbPr1,  FALSE  }, //SRC_DET_YPbPr1,
   {SV_VS_YPbPr2,  FALSE }, //SRC_DET_YPbPr2,
   {SV_VS_VGACOMP1,FALSE }, //SRC_DET_VGACOMP1,
   {SV_VS_VGA,     FALSE }, //SRC_DET_VGA,
   {SV_VS_HDMI1,   FALSE }, //SRC_DET_HDMI1,
   {SV_VS_HDMI2,   FALSE }, //SRC_DET_HDMI2,
   {SV_VS_HDMI3,   FALSE }, //SRC_DET_HDMI3,
   {SV_VS_HDMI4,   FALSE }, //SRC_DET_HDMI4,
   {SV_VS_DVI1,    FALSE }, //SRC_DET_DVI1,
   {SV_VS_DVI2,    FALSE }, //SRC_DET_DVI2,
   {SV_VS_DVI3,    FALSE }, //SRC_DET_DVI3,
   {SV_VS_DTV1,    FALSE }, //SRC_DET_DTV1,
   {SV_VS_DTD1,    FALSE }, //SRC_DET_DTD1,
   {SV_VS_DTV2,    FALSE }, //SRC_DET_DTV2,
   {SV_VS_DTD2,    FALSE }, //SRC_DET_DTD2,
   {SV_VS_SCART1,  FALSE }, //SRC_DET_SCART1,
   {SV_VS_SCART2,  FALSE }, //SRC_DET_SCART2,
};

#endif

/**
 * This table customize NPTV driver layer input port maping & avmux
 */
const rPortmap_t portmap_table[] =
{
	{SV_VS_ATV1	,P_C0	,AVMUX(CVBS1,0), 0},
	{SV_VS_ATD1	,P_C0	,AVMUX(CVBS1,0), 0},
	{SV_VS_CVBS1	,P_C1	,AVMUX(CVBS0,0), 0},  //  proto board n.ms = AV1 ,but HW PCB is conencted to CVBS1P {SV_VS_CVBS1	,P_C1	,AVMUX(CVBS1,0), 0},
	{SV_VS_CVBS2	,P_C2	,AVMUX(CVBS1,0), 0},
	{SV_VS_CVBS3	,P_C3	,AVMUX(CVBS3,0), 0},
#ifdef __MODEL_slt__
	{SV_VS_CVBS3	,P_C3	,AVMUX(CVBS2,0), 0},
#endif
	{SV_VS_CVBS4	,P_C4	,AVMUX(CVBSINY,0), P_YP0}, //for CVBS in Y
	{SV_VS_S1	,P_SV0	,AVMUX(CVBS1,CVBS0), 0},
	{SV_VS_S2	,P_SV1	,AVMUX(SY1,SC1), 0},
	{SV_VS_S3	,P_SV2	,AVMUX(SY2,SC2), 0},
	{SV_VS_YPbPr1	,P_YP0	,	0, 0},  // n.ms =YPBPR1 PCB=RGB1   //Scart is the same YPBPR PIN!!!!!!
	{SV_VS_YPbPr2	,P_YP0	,	0, 0},
	{SV_VS_VGACOMP1,P_VGACOMP,	0, 0},
	{SV_VS_VGA	,P_VGA	,	0, 0},
	{SV_VS_HDMI1	,P_DVI	,	0, 0},
	{SV_VS_HDMI2	,P_DVI	,	0, 0},
	{SV_VS_HDMI3	,P_DVI	,	0, 0},
	{SV_VS_HDMI4	,P_DVI	,	0, 0},
	{SV_VS_DVI1	,P_DVI	,	0, 0},
	{SV_VS_DVI2	,P_DVI	,	0, 0},
	{SV_VS_DVI3	,P_DVI	,	0, 0},
	{SV_VS_DTV1	,P_DT1	,	0, 0},
	{SV_VS_DTD1	,P_DT1	,	0, 0},
	{SV_VS_DTV2	,P_DT2	,	0, 0},
	{SV_VS_DTD2	,P_DT2	,	0, 0},
	{SV_VS_SCART1 	,P_FB0	,AVMUX(CVBS2,SC2), P_YP0},   //SC2 is for internal path    // n.ms=scart1=PCB= CVBS 2 && RGB0
	{SV_VS_SCART2	,P_FB1	,AVMUX(CVBS1,SC2), P_YP0},
	{SV_VS_MAX	,P_MA	,	0, 0},	/* must have this line*/
};

const UINT8 portmap_table_num=sizeof(portmap_table)/sizeof(rPortmap_t);


static UINT8 vss_portmap(UINT8 src)
{
	UINT8 i;
	for(i=0;i<portmap_table_num; i++)
	{
		if(portmap_table[i].vs_src==src)
			return portmap_table[i].ic_port;
	}
	return P_FA;
}


/**
 * Set external gpio mux, according to Main/Sub path's input video source.
 *
 * @param bMainSrc
 * @param bSubSrc
 * @return Main/Sub's input port
 */
UINT16 bDrvGetMapIntMode(UINT8 bMainSrc, UINT8 bSubSrc)
{
	UINT8 m_major,s_major;
	UINT8 m_port,s_port;

	m_major=VSS_MAJOR(bMainSrc);
	s_major=VSS_MAJOR(bSubSrc);

	if(m_major>VSS_RESERVE)
		m_major=VSS_RESERVE;
	if(s_major>VSS_RESERVE)
		s_major=VSS_RESERVE;

	/* 1st support minor mask check */
	m_port=vss_portmap(bMainSrc);
	s_port=vss_portmap(bSubSrc);

	if((m_port==P_FA)||(s_port==P_FA))
	{
		return MS(P_FA, P_FA);
	}

	/* special rule,eg. to support special VGA, now empty*/

	/* resource conflict check */
	#if 0
	if(VSS_major_rule[m_major].hwdec_mask&VSS_major_rule[s_major].hwdec_mask)
	{
        #ifndef CC_SUPPORT_TVE
		return MS(P_FA, P_FA);
        #endif
	}
	#endif
	return MS(m_port, s_port);

}


/**
 * Set external gpio mux, according to Main/Sub path's input video source.
 *
 * @param bMainSrc
 * @param bSubSrc
 * @return NONE
 */
void vDrvSetExternalMux(UINT8 bMainSrc, UINT8 bSubSrc)
{
	UINT8 i,bSrc;
	/* INT32 low=0,high=1; */

	for(i=0;i<2;i++)
	{
		bSrc=i?bSubSrc:bMainSrc;
		switch(VSS_MAJOR(bSrc))
		{
			case VSS_HDMI:
			case VSS_DVI:
				_bDviExtSrc = (UINT8)SV_DV_HDMI;
				vHDMISetSwitch((HDMI_SWITCH_1+VSS_MINOR(bSrc)),i);
				break;
			/*
			case VSS_SCART:
				switch(VSS_MINOR(bSrc))
				{
					case 0:	UNUSED(GPIO_Output(39,&low));
						break;
					case 1:
					default:	UNUSED(GPIO_Output(39,&high));
						break;
				}
				break;
			*/
			default:
				break;
		}
	}
}

#if 0

/**
 * @brief SCART input port mapping to CVBS/SV input port
 * @param bInPort P_FB0/P_FB1
 * @return CVBS/SV input port
 */
UINT8 bDrvGetFBCVBS(UINT8 bInPort)
{
	UNUSED(bInPort);
	return (UINT8)P_SV1;
}

/**
 * @brief SCART input port mapping to RGB input port
 * @param bInPort P_FB0/P_FB1
 * @return RGB input port
 */
UINT8 bDrvGetFBRGB(UINT8 bInPort)
{
	UNUSED(bInPort);
	return (UINT8)P_YP0;
}
#endif

